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    • 3. 发明申请
    • Electrophoretic Display and Method of Manufacturing Thereof
    • 电泳显示及其制造方法
    • US20080012821A1
    • 2008-01-17
    • US11860314
    • 2007-09-24
    • Yong-Uk LeeJoon-Hak OhJong-Hyun SeoBo-Sung KimMun-Pyo Hong
    • Yong-Uk LeeJoon-Hak OhJong-Hyun SeoBo-Sung KimMun-Pyo Hong
    • G09G3/34
    • G02F1/167
    • A electrophoretic display is provided, which includes: a thin film transistor array panel including a plurality of data lines having a plurality of source electrodes and a plurality of drain electrodes, a plurality of organic semiconductor islands at least covering the portion of the source and the drain electrodes and disposed between the source and the drain electrodes, a plurality of gate insulators formed on the organic semiconductor islands, a plurality of gate lines including a plurality of gate electrodes disposed on the gate insulators, and a plurality of pixel electrodes connected to the drain electrodes; a common electrode panel facing the thin film transistor array panel and having a common electrode; and a plurality of micro-capsules containing a plurality of negative and positive pigment particles and interposed between the thin film transistor array panel and the common electrode panel.
    • 提供一种电泳显示器,其包括:薄膜晶体管阵列面板,包括具有多个源电极和多个漏电极的多条数据线,多个有机半导体岛至少覆盖源的部分, 漏电极,并且设置在源极和漏极之间,形成在有机半导体岛上的多个栅极绝缘体,多个栅极线,包括设置在栅极绝缘体上的多个栅电极,以及多个像素电极, 漏电极; 面对薄膜晶体管阵列面板并具有公共电极的公共电极面板; 以及包含多个负极和正性颜料颗粒的多个微胶囊,并且插入在薄膜晶体管阵列面板和公共电极面板之间。
    • 4. 发明授权
    • Electrophoretic display and method of manufacturing thereof
    • 电泳显示及其制造方法
    • US07286281B2
    • 2007-10-23
    • US11152897
    • 2005-06-14
    • Yong-Uk LeeJoon-Hak OhJong-Hyun SeoBo-Sung KimMun-Pyo Hong
    • Yong-Uk LeeJoon-Hak OhJong-Hyun SeoBo-Sung KimMun-Pyo Hong
    • G02B26/00G09G3/34G03G17/04
    • G02F1/167
    • A electrophoretic display is provided, which includes: a thin film transistor array panel including a plurality of data lines having a plurality of source electrodes and a plurality of drain electrodes, a plurality of organic semiconductor islands at least covering the portion of the source and the drain electrodes and disposed between the source and the drain electrodes, a plurality of gate insulators formed on the organic semiconductor islands, a plurality of gate lines including a plurality of gate electrodes disposed on the gate insulators, and a plurality of pixel electrodes connected to the drain electrodes; a common electrode panel facing the thin film transistor array panel and having a common electrode; and a plurality of micro-capsules containing a plurality of negative and positive pigment particles and interposed between the thin film transistor array panel and the common electrode panel.
    • 提供一种电泳显示器,其包括:薄膜晶体管阵列面板,包括具有多个源电极和多个漏电极的多条数据线,多个有机半导体岛至少覆盖源的部分, 漏电极,并且设置在源极和漏极之间,形成在有机半导体岛上的多个栅极绝缘体,多个栅极线,包括设置在栅极绝缘体上的多个栅电极,以及多个像素电极, 漏电极; 面对薄膜晶体管阵列面板并具有公共电极的公共电极面板; 以及包含多个负极和正性颜料颗粒的多个微胶囊,并且插入在薄膜晶体管阵列面板和公共电极面板之间。
    • 5. 发明申请
    • Electrophoretic display and method of manufacturing thereof
    • 电泳显示及其制造方法
    • US20060139733A1
    • 2006-06-29
    • US11152897
    • 2005-06-14
    • Yong-Uk LeeJoon-Hak OhJong-Hyun SeoBo-Sung KimMun-Pyo Hong
    • Yong-Uk LeeJoon-Hak OhJong-Hyun SeoBo-Sung KimMun-Pyo Hong
    • G02B26/00
    • G02F1/167
    • A electrophoretic display is provided, which includes: a thin film transistor array panel including a plurality of data lines having a plurality of source electrodes and a plurality of drain electrodes, a plurality of organic semiconductor islands at least covering the portion of the source and the drain electrodes and disposed between the source and the drain electrodes, a plurality of gate insulators formed on the organic semiconductor islands, a plurality of gate lines including a plurality of gate electrodes disposed on the gate insulators, and a plurality of pixel electrodes connected to the drain electrodes; a common electrode panel facing the thin film transistor array panel and having a common electrode; and a plurality of micro-capsules containing a plurality of negative and positive pigment particles and interposed between the thin film transistor array panel and the common electrode panel.
    • 提供一种电泳显示器,其包括:薄膜晶体管阵列面板,包括具有多个源电极和多个漏电极的多条数据线,多个有机半导体岛至少覆盖源的部分, 漏电极,并且设置在源极和漏极之间,形成在有机半导体岛上的多个栅极绝缘体,多个栅极线,包括设置在栅极绝缘体上的多个栅电极,以及多个像素电极, 漏电极; 面对薄膜晶体管阵列面板并具有公共电极的公共电极面板; 以及包含多个负极和正性颜料颗粒的多个微胶囊,并且插入在薄膜晶体管阵列面板和公共电极面板之间。
    • 9. 发明授权
    • Thin film transistor array panel and liquid crystal display
    • 薄膜晶体管阵列面板和液晶显示器
    • US07332743B2
    • 2008-02-19
    • US11224103
    • 2005-09-13
    • Young-Chol YangKeun-Kyu SongBo-Sung KimMun-Pyo Hong
    • Young-Chol YangKeun-Kyu SongBo-Sung KimMun-Pyo Hong
    • H01L31/00
    • H01L27/12G02F1/133502G02F1/136227H01L27/1248
    • A thin film transistor array panel is provided, which includes an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer covering the gate line, a data line formed on the gate insulating layer, a lower passivation layer covering the data line, an upper passivation layer formed on the lower passivation layer and made of organic insulating material, and a pixel electrode formed on the upper passivation layer. The thicknesses of the gate insulating layer, the lower passivation layer, and the pixel electrode are respectively represented as dG, dP, and dI, the refraction indexes of the gate insulating layer, the passivation layer, and the pixel electrode are respectively represented as nG, nP, and nI, and condition equations are satisfied according to: 4(dGnG+dPnP)=, which is an even multiple of the wavelength; and 4dInI=, which is an even multiple of the wavelength.
    • 提供薄膜晶体管阵列面板,其包括绝缘基板,形成在绝缘基板上的栅极线,覆盖栅极线的栅极绝缘层,形成在栅极绝缘层上的数据线,覆盖该数据的下部钝化层 形成在下钝化层上并由有机绝缘材料制成的上钝化层,以及形成在上钝化层上的像素电极。 栅绝缘层,下钝化层和像素电极的厚度分别表示为d,G,D,P, >,栅极绝缘层,钝化层和像素电极的折射率分别表示为n N,N,N, / SUB>,并且根据以下条件满足条件方程式:4(d> G N n + P<< >)=,这是波长的偶数倍; 和4d I I,其为波长的偶数倍。
    • 10. 发明申请
    • Wire for a display device, a method for manufacturing the same, a thin film transistor array panel including the wire, and a method for manufacturing the same
    • 用于显示装置的线,其制造方法,包括该线的薄膜晶体管阵列面板及其制造方法
    • US20050173732A1
    • 2005-08-11
    • US10501597
    • 2002-07-29
    • Seung-Hee YuMun-Pyo HongSoo-Guy RhoNam-Seok RhoKeun-Kyu SongHee-Hwan ChoeBo-Sung KimSang-Gab KimSung-Chul KangHong-Sick Park
    • Seung-Hee YuMun-Pyo HongSoo-Guy RhoNam-Seok RhoKeun-Kyu SongHee-Hwan ChoeBo-Sung KimSang-Gab KimSung-Chul KangHong-Sick Park
    • G02F1/1343G02F1/1362G02F1/1368G09F9/30H01L21/28H01L21/3205H01L23/52H01L29/417H01L29/423H01L29/49H01L29/786H01L27/10
    • G02F1/136286G02F2001/136295
    • First, a Cr film and a CrOx film are deposited and patterned using an etchant including 8-12% Ce(NH4)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a gate wire including a plurality of gate lines, a plurality of gate electrodes and a plurality of gate pads. Next, a gate insulating film, a semiconductor layer and an ohmic contact layer are formed in sequence. A Cr film and CrOx film are deposited in sequence and patterned using an etchant including 8-12% Ce(N114)2(NO3)6, 10-20% NH3 and remaining ultra pure water to form a data wire including a plurality of data lines, a plurality of source electrodes, a plurality of drain electrodes and a plurality of data pads. A passivation layer is deposited and pattered to form a plurality of contact holes respectively exposing the drain electrodes, the gate pads and the data pads. A transparent conductive material or a reflective conductive material is deposited and patterned to form a plurality of pixel electrodes, a plurality of subsidiary gate pads and a plurality of subsidiary data pads electrically connected to the drain electrodes, the gate pads and the data pads, respectively. The gate lines and the data lines with low reflectance are used as a light-blocking film for blocking the light leakage between the pixel areas, and do not increase the black brightness. Accordingly, a separate black matrix need not be provided on the color filter panel, thereby securing both aperture ration of the pixel and high contrast ratio.
    • 首先,使用包括8-12%Ce(NH 4)2(NO 3)6的蚀刻剂沉积和图案化Cr膜和CrOx膜, SUB,10-20%NH 3和剩余的超纯水,以形成包括多个栅极线,多个栅电极和多个栅极焊盘的栅极线。 接下来,依次形成栅极绝缘膜,半导体层和欧姆接触层。 依次沉积Cr膜和CrOx膜,并使用包括8-12%Ce(N11 4)2(NO 3)3的蚀刻剂进行图案化, )6N,10-20%NH 3和剩余的超纯水,以形成数据线,其包括多条数据线,多个源电极,多个漏极 电极和多个数据焊盘。 钝化层被沉积并图案化以形成分别暴露漏电极,栅极焊盘和数据焊盘的多个接触孔。 沉积透明导电材料或反射导电材料以形成多个像素电极,分别与漏电极,栅极焊盘和数据焊盘电连接的多个辅助栅极焊盘和多个辅助数据焊盘 。 栅极线和低反射率的数据线被用作阻挡像素区域之间的漏光的遮光膜,并且不增加黑色亮度。 因此,不需要在滤色器面板上设置单独的黑矩阵,从而确保像素的孔径比和高对比度。