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1. 发明授权

US08247313B2 Method for preparing a germanium layer from a silicon-germanium-on-isolator substrate 有权
标题翻译：从硅 - 锗隔离器衬底制备锗层的方法
公开(公告)号：US08247313B2
公开(公告)日：2012-08-21
申请号：US12525756
申请日：2008-02-07
申请人： Benjamin Vincent , Jean-Francois Damlencourt , Yves Morand
发明人： Benjamin Vincent , Jean-Francois Damlencourt , Yves Morand
IPC分类号： H01L21/20 , H01L21/336
CPC分类号： H01L21/7624 , H01L21/28518
摘要： A method for making a germanium-on-insulator layer from an SGOI substrate, including: a) depositing on the substrate a layer of a metallic element M capable of selectively forming a silicide, the layer being in contact with a silicon-germanium alloy layer; and b) a reaction between the alloy layer and the layer of a metallic element M, by which a stack of M silicide-germanium-insulator layers is obtained. Such a method may, for example, find application to production of electronic devices such as MOSFET transistors.
摘要翻译：一种从SGOI衬底制造绝缘体上锗层的方法，包括：a）在衬底上沉积能够选择性地形成硅化物的金属元素M的层，该层与硅 - 锗合金层接触 ; 以及b）合金层与金属元素M层之间的反应，通过该反应得到一叠M硅化物 - 锗 - 绝缘体层。这种方法可以例如用于生产诸如MOSFET晶体管的电子器件。

2. 发明申请

US20100035414A1 METHOD FOR PREPARING A GERMANIUM LAYER FROM A SILICON-GERMANIUM-ON-ISOLATOR SUBSTRATE 有权
标题翻译：从硅 - 隔离器基板制备锗层的方法
公开(公告)号：US20100035414A1
公开(公告)日：2010-02-11
申请号：US12525756
申请日：2008-02-07
申请人： Benjamin Vincent , Jean-Francois Damlencourt , Yves Morand
发明人： Benjamin Vincent , Jean-Francois Damlencourt , Yves Morand
IPC分类号： H01L21/20 , H01L21/336
CPC分类号： H01L21/7624 , H01L21/28518
摘要： A method for making a germanium-on-insulator layer from an SGOI substrate, including: a) depositing on the substrate a layer of a metallic element M capable of selectively forming a silicide, the layer being in contact with a silicon-germanium alloy layer; and b) a reaction between the alloy layer and the layer of a metallic element M, by which a stack of M silicide-germanium-insulator layers is obtained. Such a method may, for example, find application to production of electronic devices such as MOSFET transistors.
摘要翻译：一种从SGOI衬底制造绝缘体上锗层的方法，包括：a）在衬底上沉积能够选择性地形成硅化物的金属元素M的层，该层与硅 - 锗合金层接触 ; 以及b）合金层与金属元素M层之间的反应，通过该反应得到一叠M硅化物 - 锗 - 绝缘体层。这种方法可以例如用于生产诸如MOSFET晶体管的电子器件。

3. 发明授权

US07598145B2 Method for producing Si1-yGey based zones with different contents in Ge on a same substrate by condensation of germanium 有权
标题翻译：通过锗的缩合在同一基板上生产Ge中具有不同含量的Si1-yGey基区的方法
公开(公告)号：US07598145B2
公开(公告)日：2009-10-06
申请号：US11761074
申请日：2007-06-11
申请人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
发明人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
IPC分类号： H01L21/336
CPC分类号： H01L21/32105 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/84 , H01L27/1203 , H01L29/78684
摘要： A method for producing a microelectronic device comprising a plurality of Si1-yGey based semi-conductor zones (wherein 0
摘要翻译：一种微电子器件的制造方法，该微电子器件包括具有不同锗锗含量的多个Si 1-y Ga y基半导体区（其中0

4. 发明申请

US20070284625A1 METHOD FOR PRODUCING SI1-YGEY BASED ZONES WITH DIFFERENT CONTENTS IN GE ON A SAME SUBSTRATE BY CONDENSATION OF GERMANIUM 有权
标题翻译：通过对锗进行同位素生产在同一基片上的不同含量的SI1-YGEY基区的方法
公开(公告)号：US20070284625A1
公开(公告)日：2007-12-13
申请号：US11761122
申请日：2007-06-11
申请人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
发明人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
IPC分类号： H01L23/58
CPC分类号： H01L21/32105 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/3083 , H01L21/7624 , H01L21/823807 , H01L21/84 , H01L27/1203 , H01L29/78684 , H01L2924/0002 , H01L2924/00
摘要： The disclosure relates to a method for producing a microelectronic device including a plurality of Si1-yGey based semi-conducting zones (where 0
摘要翻译：本公开涉及一种用于生产包括多个基于Si 1-y基于半导电区（其中0

5. 发明申请

US20070287257A1 METHOD FOR PRODUCING SI1-YGEY BASED ZONES WITH DIFFERENT CONTENTS IN GE ON A SAME SUBSTRATE BY CONDENSATION OF GERMANIUM 有权
标题翻译：通过对锗进行同位素生产在同一基片上的不同含量的SI1-YGEY基区的方法
公开(公告)号：US20070287257A1
公开(公告)日：2007-12-13
申请号：US11761074
申请日：2007-06-11
申请人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
发明人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
IPC分类号： H01L21/336
CPC分类号： H01L21/32105 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/84 , H01L27/1203 , H01L29/78684
摘要： The disclosure relates a method for producing a microelectronic device including a plurality of based Si1-yGey semi-conductor zones (where 0
摘要翻译：本公开内容涉及一种用于生产包括多个基于Si 1-y N y Y y半导体区（其中0 半导体层（其中0

6. 发明授权

US07972971B2 Method for producing Si1-yGey based zones with different contents in Ge on a same substrate by condensation of germanium 有权
标题翻译：通过锗的缩合在同一衬底上生产Ge中具有不同含量的Si1-yGey基区的方法
公开(公告)号：US07972971B2
公开(公告)日：2011-07-05
申请号：US11761122
申请日：2007-06-11
申请人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
发明人： Jean-Francois Damlencourt , Yves Morand , Laurent Clavelier
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/32105 , H01L21/02381 , H01L21/02532 , H01L21/02639 , H01L21/3083 , H01L21/7624 , H01L21/823807 , H01L21/84 , H01L27/1203 , H01L29/78684 , H01L2924/0002 , H01L2924/00
摘要： The disclosure relates to a method for producing a microelectronic device including a plurality of Si1-yGey based semi-conducting zones (where 0
摘要翻译：本公开涉及一种用于生产包括具有不同的锗含量的多个Si1-yGey基半导电区（其中0

7. 发明授权

US08575011B2 Method of fabricating a device with a concentration gradient and the corresponding device 有权
标题翻译：制造具有浓度梯度的装置和相应装置的方法
公开(公告)号：US08575011B2
公开(公告)日：2013-11-05
申请号：US12061403
申请日：2008-04-02
申请人： Daniel-Camille Bensahel , Yves Morand
发明人： Daniel-Camille Bensahel , Yves Morand
IPC分类号： H01L21/50
CPC分类号： H01L21/22 , H01L21/02381 , H01L21/0245 , H01L21/02532 , H01L21/02636 , H01L21/02664 , H01L21/30604 , H01L21/3065 , H01L29/36 , H01L29/66659
摘要： A semiconductive device is fabricated by forming, within a semiconductive substrate, at least one continuous region formed of a material having a non-uniform composition in a direction substantially perpendicular to the thickness of the substrate.
摘要翻译：半导体器件通过在半导体衬底内形成至少一个由具有基本上垂直于衬底厚度的方向上具有不均匀组成的材料形成的连续区域来制造。

8. 发明申请

US20130252412A1 PROCESS FOR PRODUCING AN INTEGRATED CIRCUIT 有权
标题翻译：生产集成电路的方法
公开(公告)号：US20130252412A1
公开(公告)日：2013-09-26
申请号：US13811792
申请日：2011-07-22
申请人： Thierry Poiroux , Sébastien Barnola , Yves Morand
发明人： Thierry Poiroux , Sébastien Barnola , Yves Morand
IPC分类号： H01L21/8234
CPC分类号： H01L21/823468 , H01L21/76897 , H01L21/823456 , H01L21/823475 , H01L27/11 , H01L27/11521
摘要： A process for producing an integrated circuit on the surface of a substrate, the process including: producing a first layer, including active zones and insulating zones, on the surface of the substrate; producing gate zones on the surface of the first layer, the gate zones each being surrounded by insulating spacers; producing source/drain electrodes; producing a dielectric layer between the insulating spacers, the dielectric layer having an upper surface level with the upper surfaces of the gate zones; partially etching each gate zone so as to lower the upper surface of a first part of each gate zone; and depositing an insulating dielectric layer on the first parts of the gate zones.
摘要翻译：一种用于在基板表面上制造集成电路的方法，所述方法包括：在所述基板的表面上产生包括有源区和绝缘区的第一层; 在所述第一层的表面上产生栅极区域，所述栅极区域各自被绝缘间隔物包围; 产生源极/漏极; 在所述绝缘间隔物之间产生电介质层，所述电介质层具有与所述栅极区的上表面的上表面水平; 部分地蚀刻每个栅极区，以便降低每个栅极区的第一部分的上表面; 以及在栅极区域的第一部分上沉积绝缘介电层。

9. 发明授权

US08486514B2 Method to fabricate a mould for lithography by nano-imprinting 有权
标题翻译：通过纳米压印制造光刻模具的方法
公开(公告)号：US08486514B2
公开(公告)日：2013-07-16
申请号：US12715738
申请日：2010-03-02
申请人： Stéfan Landis , Yves Morand
发明人： Stéfan Landis , Yves Morand
IPC分类号： B32B3/28 , B32B3/30
CPC分类号： G03F7/0002 , B29C33/42 , B82Y10/00 , B82Y40/00 , G03F7/0017 , Y10T428/24479 , Y10T428/2457 , Y10T428/24744
摘要： A nano-imprint device including at least: a substrate, having a surface, on the substrate, a plurality of nano-trenches parallel two by two, each nano-trench extending in a longitudinal direction and being delimited laterally by side walls, the nano-trenches and the side walls being directed substantially perpendicular to the surface of the substrate, each nano-trench comprising a bottom surface with at least one first and one second level in a direction perpendicular to the substrate, respectively of depth h1 and h2>h1, measured relative to the top of the side walls, and the bottom surfaces of the nano-trenches, of the least deep level (h1) being in a first type of material, the side walls being in a second type of material.
摘要翻译：一种纳米压印装置，其至少包括：在所述基板上具有平行两个的多个纳米沟槽的表面的基板，每个纳米沟槽在纵向方向上延伸并由侧壁横向限定，所述纳米沟槽三角形并且所述侧壁基本上垂直于所述衬底的表面定向，每个纳米沟槽包括底面，所述底表面在垂直于所述衬底的方向上具有至少一个第一和第二水平面，所述方向分别具有深度h1和h2> h1 （h1）处于第一类型的材料中，相对于侧壁的顶部和纳米沟槽的底表面测量的最小深度（h1）的底表面是第二类型的材料。

10. 发明申请

US20060276052A1 Method for producing a component comprising at least one germanium-based element and component obtained by such a method 有权
标题翻译：用于制造包含至少一种基于锗的元素和通过这种方法获得的组分的组分的方法
公开(公告)号：US20060276052A1
公开(公告)日：2006-12-07
申请号：US11444423
申请日：2006-06-01
申请人： Yves Morand , Thierry Poiroux , Maud Vinet
发明人： Yves Morand , Thierry Poiroux , Maud Vinet
IPC分类号： H01L21/31
CPC分类号： H01L21/76251
摘要： The method successively comprises production, on a substrate, of a stack of layers comprising at least one first layer made from germanium and silicon compound initially having a germanium concentration comprised between 10% and 50%. The first layer is arranged between second layers having germanium concentrations comprised between 0% and 10%. Then a first zone corresponding to the germanium-based element and having at least a first lateral dimension comprised between 10 nm and 500 nm is delineated by etching in said stack. Then at least lateral thermal oxidization of the first zone is performed so that a silica layer forms on the surface of the first zone and that, in the first layer, a central zone of condensed germanium forms, constituting the germanium-based element.
摘要翻译：该方法依次包括在衬底上生产包括由锗制成的至少一个第一层和最初具有10％至50％的锗浓度的硅化合物的层叠层。第一层布置在锗浓度介于0％和10％之间的第二层之间。然后通过在所述堆叠中的蚀刻来描绘对应于锗基元件并且具有在10nm和500nm之间的至少第一横向尺寸的第一区域。然后，至少进行第一区域的侧向热氧化，使得在第一区域的表面上形成二氧化硅层，并且在第一层中形成构成锗基元素的浓缩锗的中心区域。

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