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1. 发明申请

US20060033189A1 Structure and method of forming capped chips 有权
标题翻译：形成封盖芯片的结构和方法
公开(公告)号：US20060033189A1
公开(公告)日：2006-02-16
申请号：US11201726
申请日：2005-08-11
申请人： Belgacem Haba , Masud Beroz , Glenn Urbish , David Tuckerman
发明人： Belgacem Haba , Masud Beroz , Glenn Urbish , David Tuckerman
IPC分类号： H01L23/02
CPC分类号： B81B7/007 , H03H3/02 , H03H9/0547 , H03H9/059 , H03H9/1057 , H03H9/1092
摘要： As disclosed herein, structures and methods are provided for forming capped chips. As provided by the disclosed method, a metal base pattern is formed on a chip insulated from wiring of the chip, and a cap is formed including a metal. The cap is joined to the metal base pattern on the chip to form the capped chip. In one embodiment, a front surface of the chip is exposed which extends from a contact of the chip to an edge of the chip. In another embodiment, a conductive connection is formed to the contact, the conductive connection extending from the contact to a terminal at an exposed plane above the front surface of the chip.
摘要翻译：如本文所公开的，提供了用于形成加盖芯片的结构和方法。通过所公开的方法提供，在与芯片的布线绝缘的芯片上形成金属基底图案，并且形成包括金属的盖。盖子连接到芯片上的金属基底图案以形成封盖的芯片。在一个实施例中，芯片的前表面被暴露，其从芯片的触点延伸到芯片的边缘。在另一个实施例中，导电连接形成于接触件，导电连接件从接触件延伸到芯片前表面上的暴露平面处的端子。

2. 发明申请

US20060013680A1 Chip handling methods and apparatus 审中-公开
标题翻译：芯片处理方法和装置
公开(公告)号：US20060013680A1
公开(公告)日：2006-01-19
申请号：US11183635
申请日：2005-07-18
申请人： Belgacem Haba , David Tuckerman , Glenn Urbish , Masud Beroz , Ilyas Mohammed
发明人： Belgacem Haba , David Tuckerman , Glenn Urbish , Masud Beroz , Ilyas Mohammed
IPC分类号： B65G49/07
CPC分类号： H01L21/67144 , B23K26/066 , B23K26/0846 , B23K26/10 , B23K26/40 , B23K2101/40 , B23K2103/50 , H01L24/97 , H01L2224/0554 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/16225 , H01L2924/00014 , H01L2924/10158 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： An array of chips spaced apart from one another by chip spacing distances, as, for example, an array of chips on a wafer dicing tape is juxtaposed with an array of chip receiving elements spaced apart from one another by receiving element spacing distances different from the chip spacing distances, as, for example, an array of substrates or fixtures spaced apart from one another at distances substantially larger than the chip spacing distances. The juxtaposing step is performed so that a set of chips including less than all of the chips in the array of chips is aligned with a set of the chip receiving elements. This set of chips is transferred to the set of chip receiving elements while the arrays are aligned with one another. The cycle may be repeated using the same or different array of chips, and using the same or different array of chip receiving elements. Numerous small chips can be transferred to large chip receiving elements without handling individual chips, and without the use of equipment such as pick-and-place equipment commonly used for such handling.
摘要翻译：通过芯片间隔距离彼此间隔开的芯片阵列，例如晶片切割带上的芯片阵列，与芯片接收元件阵列并列，通过接收元件间隔距离不同的芯片接收元件芯片间隔距离，例如基板或固定装置的阵列，其距离基本上大于芯片间距距离彼此间隔开。执行并置步骤，使得包括小于芯片阵列中的所有芯片的芯片组与一组芯片接收元件对准。当阵列彼此对准时，这组芯片被传送到芯片接收元件组。可以使用相同或不同的芯片阵列，并使用相同或不同的芯片接收元件阵列重复该周期。许多小芯片可以转移到大的芯片接收元件而不处理单个芯片，并且不使用诸如通常用于这种处理的拾取和放置设备的设备。

3. 发明授权

US07351641B2 Structure and method of forming capped chips 有权
标题翻译：形成封盖芯片的结构和方法
公开(公告)号：US07351641B2
公开(公告)日：2008-04-01
申请号：US11201726
申请日：2005-08-11
申请人： Belgacem Haba , Masud Beroz , Glenn Urbish , David B. Tuckerman
发明人： Belgacem Haba , Masud Beroz , Glenn Urbish , David B. Tuckerman
IPC分类号： H01L21/76 , H01L21/30
CPC分类号： B81B7/007 , H03H3/02 , H03H9/0547 , H03H9/059 , H03H9/1057 , H03H9/1092
摘要： As disclosed herein, structures and methods are provided for forming capped chips. As provided by the disclosed method, a metal base pattern is formed on a chip insulated from wiring of the chip, and a cap is formed including a metal. The cap is joined to the metal base pattern on the chip to form the capped chip. In one embodiment, a front surface of the chip is exposed which extends from a contact of the chip to an edge of the chip. In another embodiment, a conductive connection is formed to the contact, the conductive connection extending from the contact to a terminal at an exposed plane above the front surface of the chip.
摘要翻译：如本文所公开的，提供了用于形成加盖芯片的结构和方法。通过所公开的方法提供，在与芯片的布线绝缘的芯片上形成金属基底图案，并且形成包括金属的盖。盖子连接到芯片上的金属基底图案以形成封盖的芯片。在一个实施例中，芯片的前表面被暴露，其从芯片的触点延伸到芯片的边缘。在另一个实施例中，导电连接形成于接触件，导电连接件从接触件延伸到芯片前表面上的暴露平面处的端子。

4. 发明授权

US07268426B2 High-frequency chip packages 有权
标题翻译：高频芯片封装
公开(公告)号：US07268426B2
公开(公告)日：2007-09-11
申请号：US10783314
申请日：2004-02-20
申请人： Michael Warner , Lee Smith , Belgacem Haba , Glenn Urbish , Masud Beroz , Teck-Gyu Kang
发明人： Michael Warner , Lee Smith , Belgacem Haba , Glenn Urbish , Masud Beroz , Teck-Gyu Kang
IPC分类号： H01L23/10 , H01L23/34
CPC分类号： G06F21/10 , G06F2221/2129 , H01F17/0033 , H01L23/24 , H01L23/3107 , H01L23/3114 , H01L23/36 , H01L23/3675 , H01L23/4334 , H01L23/49531 , H01L23/49575 , H01L23/49822 , H01L23/49838 , H01L23/49861 , H01L23/5387 , H01L23/552 , H01L23/645 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/50 , H01L25/0652 , H01L25/0657 , H01L25/16 , H01L2223/6611 , H01L2224/05569 , H01L2224/05571 , H01L2224/05573 , H01L2224/05599 , H01L2224/12105 , H01L2224/16145 , H01L2224/16235 , H01L2224/32145 , H01L2224/32245 , H01L2224/45014 , H01L2224/45099 , H01L2224/451 , H01L2224/48091 , H01L2224/48145 , H01L2224/48225 , H01L2224/48227 , H01L2224/4824 , H01L2224/4911 , H01L2224/73204 , H01L2224/73207 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/85207 , H01L2224/85399 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/0652 , H01L2225/06527 , H01L2225/06541 , H01L2225/06551 , H01L2225/06568 , H01L2225/06572 , H01L2225/06579 , H01L2225/06582 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01031 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01061 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/12042 , H01L2924/15311 , H01L2924/1532 , H01L2924/15331 , H01L2924/15787 , H01L2924/16152 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/19103 , H01L2924/19104 , H01L2924/19105 , H01L2924/19107 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H03H9/0542 , H03H9/0547 , H03H9/1064 , H03H2009/0019 , H01L2924/00 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： A packaged semiconductor chip includes features such as a chip carrier having a large thermal conductor which can be solder-bonded to a circuit panel so as to provide enhanced thermal conductivity to the circuit panel and electromagnetic shielding and a conductive enclosure which partially or completely surrounds the packaged chip to provide additional heat dissipation and shielding. The packaged unit may include both an active semiconductor chip and a passive element, desirably in the form of a chip, which includes resistors and capacitors. Inductors may be provided in whole or in part on the chip carrier.
摘要翻译：封装的半导体芯片包括诸如具有大导热体的芯片载体的特征，其可以焊接到电路板上，以便为电路板提供增强的导热性和电磁屏蔽，以及导电外壳，其部分地或完全地围绕封装芯片提供额外的散热和屏蔽。封装单元可以包括有源半导体芯片和无源元件，期望地包括芯片形式，其包括电阻器和电容器。电感器可以全部或部分地设置在芯片载体上。

5. 发明申请

US20070094874A1 Methods for forming connection structures for microelectronic devices 有权
标题翻译：用于形成微电子器件的连接结构的方法
公开(公告)号：US20070094874A1
公开(公告)日：2007-05-03
申请号：US11642570
申请日：2006-12-20
申请人： Belgacem Haba , Masud Beroz , David Tuckerman , Giles Humpston , Richard Crisp
发明人： Belgacem Haba , Masud Beroz , David Tuckerman , Giles Humpston , Richard Crisp
IPC分类号： H05K1/11
CPC分类号： H01L23/49838 , H01L23/49827 , H01L2924/0002 , H05K1/115 , H05K3/041 , H05K3/06 , H05K3/202 , H05K3/4038 , H05K2201/09609 , H05K2201/097 , H05K2201/09827 , H05K2201/09881 , H05K2203/0733 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49147 , Y10T29/49149 , Y10T29/49165 , H01L2924/00
摘要： Provided are connection structures for a microelectronic device and methods for forming the structure. A substrate is included having opposing surfaces and a plurality of holes extending through the surfaces. Also included is a plurality of electrically conductive posts. Each post extends from a base to a tip located within a corresponding hole of the substrate. An additional substrate may be provided such that the base of each post is located on a surface thereof. Additional electrically conductive posts may be provided having tips in corresponding holes of the additional substrate. Optionally, a dielectric material may be placed between the substrate and the posts.
摘要翻译：提供了用于微电子器件的连接结构和用于形成结构的方法。包括具有相对表面的基板和延伸穿过该表面的多个孔。还包括多个导电柱。每个柱从基部延伸到位于基板的相应孔内的尖端。可以提供另外的基底，使得每个柱的基部位于其表面上。可以提供额外的导电柱，其具有在附加衬底的相应孔中的尖端。可选地，介电材料可以放置在基板和柱之间。

6. 发明申请

US20060032670A1 Connection structures for microelectronic devices and methods for forming such structures 有权
标题翻译：微电子器件的连接结构和形成这种结构的方法
公开(公告)号：US20060032670A1
公开(公告)日：2006-02-16
申请号：US10917978
申请日：2004-08-13
申请人： Belgacem Haba , Masud Beroz , David Tuckerman , Giles Humpston , Richard Crisp
发明人： Belgacem Haba , Masud Beroz , David Tuckerman , Giles Humpston , Richard Crisp
IPC分类号： H05K1/14
CPC分类号： H01L23/49838 , H01L23/49827 , H01L2924/0002 , H05K1/115 , H05K3/041 , H05K3/06 , H05K3/202 , H05K3/4038 , H05K2201/09609 , H05K2201/097 , H05K2201/09827 , H05K2201/09881 , H05K2203/0733 , Y10T29/49117 , Y10T29/49126 , Y10T29/49128 , Y10T29/49147 , Y10T29/49149 , Y10T29/49165 , H01L2924/00
摘要： Provided are connection structures for a microelectronic device and methods for forming the structure. A substrate is included having opposing surfaces and a plurality of holes extending through the surfaces. Also included is a plurality of electrically conductive posts. Each post extends from a base to a tip located within a corresponding hole of the substrate. An additional substrate may be provided such that the base of each post is located on a surface thereof. Additional electrically conductive posts may be provided having tips in corresponding holes of the additional substrate. Optionally, a dielectric material may be placed between the substrate and the posts.
摘要翻译：提供了用于微电子器件的连接结构和用于形成结构的方法。包括具有相对表面的基板和延伸穿过该表面的多个孔。还包括多个导电柱。每个柱从基部延伸到位于基板的相应孔内的尖端。可以提供另外的基底，使得每个柱的基部位于其表面上。可以提供额外的导电柱，其具有在附加衬底的相应孔中的尖端。可选地，介电材料可以放置在基板和柱之间。

7. 发明申请

US20050116326A1 Formation of circuitry with modification of feature height 有权
标题翻译：形成具有特征高度修改的电路
公开(公告)号：US20050116326A1
公开(公告)日：2005-06-02
申请号：US10959465
申请日：2004-10-06
申请人： Belgacem Haba , Masud Beroz , Young-Gon Kim , David Tuckerman
发明人： Belgacem Haba , Masud Beroz , Young-Gon Kim , David Tuckerman
IPC分类号： H01L23/13 , H01L23/498 , H01L21/44 , H01L23/02 , H01L29/40
CPC分类号： H01L24/48 , H01L23/13 , H01L23/49811 , H01L24/45 , H01L24/49 , H01L2224/0233 , H01L2224/02377 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/4824 , H01L2224/48465 , H01L2224/48599 , H01L2224/49175 , H01L2224/85444 , H01L2224/85455 , H01L2924/01005 , H01L2924/01006 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , Y10T29/49208 , H01L2924/00014 , H01L2924/00
摘要： A connection component for mounting a chip or other microelectronic element is formed from a starting unit including posts projecting from a dielectric element by crushing or otherwise reducing the height of at least some of the posts.
摘要翻译：用于安装芯片或其他微电子元件的连接部件由起动单元形成，起动单元包括通过压碎或以其他方式减小至少一些柱的高度从电介质元件突出的柱。

8. 发明授权

US08207604B2 Microelectronic package comprising offset conductive posts on compliant layer 有权
标题翻译：微电子封装包括柔性层上的偏移导电柱
公开(公告)号：US08207604B2
公开(公告)日：2012-06-26
申请号：US10985126
申请日：2004-11-10
申请人： Belgacem Haba , Masud Beroz , Giles Humpston , Jae M. Park
发明人： Belgacem Haba , Masud Beroz , Giles Humpston , Jae M. Park
IPC分类号： H01L23/485
CPC分类号： H01L23/13 , H01L21/4846 , H01L2924/0002 , H01R13/2414 , H01R13/2464 , H01L2924/00
摘要： A microelectronic package includes a mounting structure, a microelectronic element associated with the mounting structure, and a plurality of conductive posts physically connected to the mounting structure and electrically connected to the microelectronic element. The conductive posts project from the mounting structure in an upward direction, at least one of the conductive posts being an offset post. Each offset post has a base connected to the mounting structure, the base of each offset post defining a centroid. Each offset post also defines an upper extremity having a centroid, the centroid of the upper extremity being offset from the centroid of the base in a horizontal offset direction transverse to the upward direction. The mounting structure is adapted to permit tilting of each offset post about a horizontal axis so that the upper extremities may wipe across a contact pad of an opposing circuit board.
摘要翻译：微电子封装包括安装结构，与安装结构相关联的微电子元件以及物理连接到安装结构并电连接到微电子元件的多个导电柱。导电柱从安装结构沿向上的方向突出，至少一个导电柱是偏移柱。每个偏移柱具有连接到安装结构的基座，每个偏置柱的基部限定质心。每个偏移柱还限定具有质心的上肢，上肢的质心在垂直于向上方向的水平偏移方向上偏离基部的质心。安装结构适于允许每个偏移柱绕水平轴线倾斜，使得上端部可以擦过相对电路板的接触垫。

9. 发明申请

US20080296717A1 Packages and assemblies including lidded chips 审中-公开
标题翻译：包装和组件，包括带芯片
公开(公告)号：US20080296717A1
公开(公告)日：2008-12-04
申请号：US11809780
申请日：2007-06-01
申请人： Masud Beroz , Belgacem Haba , Michael J. Nystrom , Richard Dewitt Crisp , Giles Humpston
发明人： Masud Beroz , Belgacem Haba , Michael J. Nystrom , Richard Dewitt Crisp , Giles Humpston
IPC分类号： H01L31/0203 , H01L21/58 , H01L23/02
CPC分类号： H01L31/0203 , H01L23/552 , H01L24/16 , H01L24/48 , H01L24/49 , H01L24/81 , H01L25/03 , H01L25/0657 , H01L25/50 , H01L27/14618 , H01L27/14632 , H01L2224/05554 , H01L2224/05568 , H01L2224/05571 , H01L2224/05573 , H01L2224/10126 , H01L2224/16225 , H01L2224/16227 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48464 , H01L2224/4911 , H01L2224/49171 , H01L2224/49175 , H01L2224/81192 , H01L2225/06506 , H01L2225/06517 , H01L2225/06568 , H01L2225/06589 , H01L2924/00011 , H01L2924/00013 , H01L2924/00014 , H01L2924/01005 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01018 , H01L2924/01022 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/1461 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/15787 , H01L2924/19107 , H01L2924/3025 , H01L2924/00 , H01L2224/29099 , H01L2224/45099 , H01L2224/81805 , H01L2224/05599
摘要： A lidded chip is provided which includes a chip having a major surface and a plurality of first chip contacts exposed at the major surface. A lid overlies the major surface. A chip carrier is disposed between the chip and the lid, the chip carrier having an inner surface confronting the major surface and an outer surface confronting the lid. A plurality of first carrier contacts of the chip carrier are conductively connected to the first chip contacts. A plurality of second carrier contacts extend upwardly at least partially through the openings in the lid.
摘要翻译：提供了一种带芯的芯片，其包括具有主表面的芯片和在主表面处暴露的多个第一芯片触点。盖子盖在主表面上。芯片载体设置在芯片和盖之间，芯片载体具有面向主表面的内表面和面对盖的外表面。芯片载体的多个第一载体触点导电地连接到第一芯片触点。多个第二载体触点至少部分地向上延伸穿过盖中的开口。

10. 发明授权

US07453157B2 Microelectronic packages and methods therefor 有权
标题翻译：微电子封装及其方法
公开(公告)号：US07453157B2
公开(公告)日：2008-11-18
申请号：US11140312
申请日：2005-05-27
申请人： Belgacem Haba , Masud Beroz , Teck-Gyu Kang , Yoichi Kubota , Sridhar Krishnan , John B. Riley, III , Ilyas Mohammed
发明人： Belgacem Haba , Masud Beroz , Teck-Gyu Kang , Yoichi Kubota , Sridhar Krishnan , John B. Riley, III , Ilyas Mohammed
IPC分类号： H01L23/52 , H01L23/48 , H01L29/40
CPC分类号： H01L23/49811 , H01L23/3128 , H01L23/3677 , H01L23/4985 , H01L24/48 , H01L25/105 , H01L2224/16 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/4824 , H01L2224/48247 , H01L2224/73204 , H01L2224/73265 , H01L2225/1023 , H01L2225/1058 , H01L2924/00014 , H01L2924/01004 , H01L2924/01078 , H01L2924/01079 , H01L2924/12042 , H01L2924/15311 , H01L2924/15312 , H01L2924/181 , H01L2924/19041 , H01L2924/3511 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A microelectronic package includes a microelectronic element having faces, contacts and an outer perimeter, and a flexible substrate overlying and spaced from a first face of the microelectronic element, an outer region of the flexible substrate extending beyond the outer perimeter of the microelectronic element. The package includes a plurality of etched conductive posts exposed at a surface of the flexible substrate and being electrically interconnected with the microelectronic element, wherein at least one of the conductive posts is disposed in the outer region of the flexible substrate, and a compliant layer disposed between the first face of the microelectronic element and the flexible substrate, wherein the compliant layer overlies the at least one of the conductive posts that is disposed in the outer region of the flexible substrate. The package includes an encapsulating mold material in contact with the microelectronic element and the compliant layer, whereby the encapsulating mold material overlies the outer region of the flexible substrate.
摘要翻译：微电子封装包括具有面，触点和外周边的微电子元件，以及覆盖并与微电子元件的第一面间隔开的柔性基板，柔性基板的外部区域延伸超出微电子元件的外周边。所述封装包括多个蚀刻的导电柱，其暴露在所述柔性基板的表面处并与所述微电子元件电互连，其中所述导电柱中的至少一个设置在所述柔性基板的外部区域中，并且设置柔性层在微电子元件的第一面和柔性基板之间，其中柔性层覆盖设置在柔性基板的外部区域中的至少一个导电柱。该封装包括与微电子元件和柔性层接触的封装模具材料，由此封装模具材料覆盖在柔性基板的外部区域上。

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