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    • 6. 发明申请
    • PROCESS FOR CHEMICALLY MECHANICALLY POLISHING SUBSTRATES CONTAINING SILICON OXIDE DIELECTRIC FILMS AND POLYSILICON AND/OR SILICON NITRIDE FILMS
    • 用于化学机械抛光含有氧化硅电介质膜和多晶硅和/或氮化硅膜的衬底的方法
    • US20130171824A1
    • 2013-07-04
    • US13821769
    • 2011-09-06
    • Yuzhuo LiShyam Sundar VenkataramanHarvey Wayne Pinder
    • Yuzhuo LiShyam Sundar VenkataramanHarvey Wayne Pinder
    • H01L21/306
    • H01L21/30625B24B37/044C09G1/02C09K3/1463C11D3/14C11D3/3707C11D3/3723C11D3/3773C11D3/3776C11D7/20C11D11/0047H01L21/31053
    • CMP process for substrates containing silicon oxide dielectric films and polysilicon and/or silicon nitride films comprising the steps of (1) contacting the substrate with an aqueous composition containing (A) abrasive particles which are positively charged when dispersed in an aqueous medium having a pH in the range of from 3 to 9; (B) a water-soluble or water-dispersible linear or branched alkylene oxide homopolymer or copolymer; and (C) a water-soluble or water-dispersible polymer selected from (c1) aliphatic and cycloaliphatic poly(N-vinylamide) homopolymers and copolymers, (c2) homopolymers and copolymers of acrylamide monomers of the general formulas I and II: H2C═C(—R)—C(=0)-N(—R1)(—R2) (I), H2C═C(—R)—C(=0)-R3 (II), wherein the variables have the following meaning R hydrogen atom, fluorine atom, chlorine atom, nitrile group, or organic residue; R1 and R2 hydrogen atom or organic residue; R3 saturated N-heterocyclic ring; (c3) cationic polymeric flocculants; and (c4) mixtures thereof; (2) polishing the substrate until the silicon oxide dielectric film is removed and the polysilicon and/or silicon nitride film is or are exposed exposed.
    • 用于含有氧化硅介电膜和多晶硅和/或氮化硅膜的衬底的CMP工艺包括以下步骤:(1)使基底与含有(A)当分散在具有pH的水性介质中带正电的磨料颗粒的水性组合物接触时 在3至9的范围内; (B)水溶性或水分散性直链或支链烯化氧均聚物或共聚物; 和(C)选自(c1)脂族和脂环族聚(N-乙烯基酰胺)均聚物和共聚物的水溶性或水分散性聚合物,(c2)通式I和II的丙烯酰胺单体的均聚物和共聚物:H 2 C = C(-R)-C(= O)-N(-R 1)( - R 2)(I),H 2 C = C(-R)-C(= O)-R 3(II) 意指R氢原子,氟原子,氯原子,腈基或有机残基; R1和R2氢原子或有机残基; R3饱和N-杂环; (c3)阳离子聚合物絮凝剂; 和(c4)它们的混合物; (2)研磨衬底直到去除氧化硅介电膜,并且暴露多晶硅和/或氮化硅膜。