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1. 发明授权

US11244969B2 Array substrate and manufacturing method thereof, display substrate, and display device 有权
公开(公告)号：US11244969B2
公开(公告)日：2022-02-08
申请号：US16509548
申请日：2019-07-12
申请人： BOE Technology Group Co., Ltd.
发明人： Xueyan Tian , Zheng Liu , Shuai Zhang
IPC分类号： H01L27/12 , H01L27/32 , H01L23/498 , H01L51/00 , H01L51/56
摘要： The present disclosure discloses an array substrate, a manufacturing method thereof, a display substrate, and a display device, belonging to the technical field of display. The array substrate includes: a flexible base, and, a TFT and a connecting line which are on a side of the flexible base. The array substrate has a display area and a lead area. The TFT is in the display area. The connecting line is in the lead area. The connecting line is used to electrically connect the TFT to a drive circuit. A manufacturing material of the connecting line includes a flexible conductive material. Since the material forming the connecting line includes a flexible conductive material, and the flexible conductive material has electrical conductivity and is not easily broken, the breaking probability of the connecting line is reduced, and the yield of the display device is effectively improved.

2. 发明授权

US11101301B2 Array substrate and manufacturing method therefor, display panel and display apparatus 有权
公开(公告)号：US11101301B2
公开(公告)日：2021-08-24
申请号：US16320272
申请日：2018-05-10
申请人： BOE Technology Group Co., Ltd.
发明人： Xueyan Tian
IPC分类号： H01L27/12 , H01L21/02 , H01L29/786 , H01L29/66 , H01L27/32 , G02F1/1368
摘要： Disclosed are an array substrate and a manufacturing method therefor, a display panel and a display apparatus. The array substrate comprises several pixel units located on a base substrate and arranged in an array, with each of the pixel units comprising a thin-film transistor, and the thin-film transistor comprising a polycrystalline silicon active layer, wherein a length extension direction of a channel of the thin-film transistor is parallel to a pre-set direction; and the pre-set direction is a scanning direction of an excimer laser beam used when forming the polycrystalline silicon active layer.

3. 发明授权

US09947697B2 Low temperature polycrystalline silicon TFT array substrate and method of producing the same, display apparatus 有权
公开(公告)号：US09947697B2
公开(公告)日：2018-04-17
申请号：US14769891
申请日：2014-09-30
申请人： BOE Technology Group Co., Ltd.
发明人： Chunping Long , Yinan Liang , Zheng Liu , Zuqiang Wang , Xueyan Tian
IPC分类号： H01L27/12 , H01L27/32
CPC分类号： H01L27/1288 , H01L27/1255 , H01L27/3262 , H01L2227/323
摘要： The present disclosure provides a low temperature polycrystalline silicon field effect TFT array substrate and a method for producing the same and a display apparatus. The method: using a stepped photo resist process to form a polycrystalline silicon active layer and a lower polar plate of a polycrystalline silicon storage capacitor simultaneously on a substrate in one lithographic process; forming a gate insulation layer on the polycrystalline silicon active layer and the lower polar plate of the polycrystalline silicon storage capacitor; forming a metal layer on the gate insulation layer and etching the metal layer to form a gate electrode and gate lines connected with the gate electrode, a source electrode, a drain electrode and data lines connected with the source electrode and the drain electrode; forming a passivation layer, a photo resist layer and a pixel electrode layer in sequence and patterning the passivation layer, the photo resist layer and the pixel electrode layer to form patterns of an interlayer insulation layer via hole and a pixel electrode in one lithographic process; forming a pixel definition layer on the pixel electrode. The present disclosure may reduce times of lithographic processes for the low temperature polycrystalline silicon field effect TFT array substrate, improve the yield and reduce the costs.

4. 发明申请

US20160254151A1 LASER ANNEALING DEVICE, PRODUCTION PROCESS OF POLYCRYSTALLINE SILICON THIN FILM, AND POLYCRYSTALLINE SILICON THIN FILM PRODUCED BY THE SAME 有权
标题翻译：激光退火装置，多晶硅薄膜的生产工艺及其生产的多晶硅薄膜
公开(公告)号：US20160254151A1
公开(公告)日：2016-09-01
申请号：US14761998
申请日：2014-12-29
申请人： BOE Technology Group Co., Ltd.
发明人： Xueyan Tian
IPC分类号： H01L21/02 , H01L27/12 , B23K26/00 , H01L21/67
CPC分类号： H01L21/02686 , B23K26/0006 , B23K26/0622 , B23K26/066 , B23K26/127 , B23K26/352 , B23K2101/40 , B23K2103/56 , H01L21/02422 , H01L21/02532 , H01L21/02592 , H01L21/02675 , H01L21/02678 , H01L21/0268 , H01L21/02683 , H01L21/268 , H01L21/67115 , H01L27/1274
摘要： The invention relates to the field of laser annealing, and discloses a laser annealing device, a production process of a polycrystalline silicon thin film, and a polycrystalline silicon thin film produced by the same. The laser annealing device comprises an annealing chamber, in which a laser generator is provided, wherein an annealing window, through which the laser passes, and two light-cutting plates oppositely provided above the annealing window are also provided in the annealing chamber, wherein the light-cutting end face of each of the light-cutting plates is a wedge-shaped end face. In technical solutions of the invention, since the light-cutting end face is a wedge-shaped end face, the included angle formed by the reflected beam, which is formed by the reflection of the incident beam arriving at the light-cutting end face, and the ingoing beam, which passes through the annealing window, is relatively large, and the vibrating directions of them differ relatively greatly. Hence, the phenomenon of interference will hardly occur, and thus the interference mura generated on the polycrystalline silicon thin film due to the interference is reduced, the quality of the polycrystalline silicon thin film is improved, and the percent of pass of the product is also increased.
摘要翻译：本发明涉及激光退火领域，并且公开了一种激光退火装置，多晶硅薄膜的制造方法及其制造的多晶硅薄膜。激光退火装置包括退火室，其中提供激光发生器，其中激光通过的退火窗和在退火窗上方相对设置的两个光切割板也设置在退火室中，其中，每个光切割板的切光端面是楔形端面。在本发明的技术方案中，由于光切割端面是楔形端面，所以通过入射光束到达光切割端面的反射形成的由反射光束形成的夹角，并且通过退火窗的进入梁相对较大，并且它们的振动方向相差较大。因此，几乎不会发生干涉现象，从而降低了由于干涉而在多晶硅薄膜上产生的干涉，提高了多晶硅薄膜的质量，并且产品的通过百分比也是增加。

5. 发明授权

US11302761B2 Display substrate assembly and method of manufacturing the same, and display apparatus 有权
公开(公告)号：US11302761B2
公开(公告)日：2022-04-12
申请号：US16631002
申请日：2019-07-25
申请人： BOE Technology Group Co., Ltd.
发明人： Xueyan Tian , Caiyu Qu , Zheng Liu , Xinshe Yin
IPC分类号： H01L27/32 , H01L21/02 , H01L29/06
摘要： In an embodiment, there is provided a display substrate assembly. The display substrate assembly includes: a base substrate; a light-shielding layer on the base substrate, the light-shielding layer having a plurality of light-shielding elements; and a plurality of polysilicon layers respectively on sides of the plurality of light-shielding elements away from the base substrate; wherein the plurality of light-shielding elements have different sizes such that energy lights reflected and/or refracted through the plurality of light-shielding elements of different sizes respectively generate different thermal energy distributions on the plurality of polysilicon layers corresponding to the plurality of light-shielding elements, causing the plurality of polysilicon layers to have different crystal forms. Meanwhile, a method of manufacturing the display substrate assembly and a display apparatus including the aforementioned display substrate assembly are also provided.

6. 发明授权

US10205109B2 Carbon nanotube thin film transistor and manufacturing method thereof 有权
公开(公告)号：US10205109B2
公开(公告)日：2019-02-12
申请号：US15518664
申请日：2016-09-19
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xueyan Tian
IPC分类号： H01L51/05 , H01L29/66 , H01L29/786 , H01L51/00
摘要： A carbon nanotube thin film transistor and a manufacturing method thereof are provided in the embodiments of the present disclosure. The carbon nanotube thin film transistor includes: a base substrate; a gate electrode, a semiconductor layer, a source electrode and a drain electrode, which are disposed on the base substrate, the semiconductor layer includes a poly(3-hexylthiophene) layer and a mixing layer of semiconducting carbon nanotube and poly(3-hexylthiophene) which are stacked. The semiconducting carbon nanotube thin film transistor has a high purity, thus the metallic carbon nanotubes are substantially cleared out and the electrical property of the thin film transistor is ensured, so that the manufactured carbon nanotube thin film transistor has good electrical properties.

7. 发明授权

US10084000B2 Array substrate, manufacturing method therefor, display panel, and display apparatus 有权
公开(公告)号：US10084000B2
公开(公告)日：2018-09-25
申请号：US15537748
申请日：2016-09-02
申请人： BOE Technology Group Co., Ltd.
发明人： Xueyan Tian
IPC分类号： H01L29/04 , H01L27/12 , H01L21/02 , H01L29/786 , G02F1/1345 , H01L27/32 , G02F1/1368
CPC分类号： H01L27/1296 , G02F1/13454 , G02F1/1368 , G02F2202/104 , H01L21/02532 , H01L21/02592 , H01L21/02686 , H01L27/1229 , H01L27/1233 , H01L27/1281 , H01L27/1285 , H01L27/1288 , H01L27/3262 , H01L29/78675
摘要： An array substrate and manufacturing method thereof, a display panel and a display device are provided. The array substrate includes a display area and a peripheral circuit area. The method includes forming an amorphous silicon thin film on the base substrate, forming a first amorphous silicon layer in the display area and a second amorphous silicon layer in the peripheral circuit area by a patterning process, so that a thickness of the first amorphous silicon layer is less than a thickness of the second amorphous silicon layer; and processing the first amorphous silicon layer and the second amorphous silicon layer simultaneously by an excimer laser annealing to form a first poly-silicon layer in the display area and a second poly-silicon layer in the peripheral circuit area, a grain size of the first poly-silicon layer being less than a grain size of the second poly-silicon layer.

8. 发明授权

US10036675B2 Piezoelectric film sensor, piezoelectric film sensor circuit and methods for manufacturing the same 有权
公开(公告)号：US10036675B2
公开(公告)日：2018-07-31
申请号：US15209350
申请日：2016-07-13
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xueyan Tian
IPC分类号： G01L1/16 , H01L29/786 , H01L29/84 , H01L51/00 , G01L1/22 , H01L27/20 , H01L41/113 , H01L41/253 , H01L41/187 , H01L41/318
CPC分类号： G01L1/16 , G01L1/2293 , H01L27/20 , H01L29/786 , H01L29/84 , H01L41/1132 , H01L41/1871 , H01L41/1876 , H01L41/253 , H01L41/318 , H01L51/0027 , H01L51/0048
摘要： The present disclosure provides a piezoelectric film sensor, a piezoelectric film sensor circuit and methods for manufacturing the same. The method for manufacturing the piezoelectric film sensor comprises: a step of forming a piezoelectric film on a substrate, and a step of subjecting the piezoelectric film to laser annealing using a laser annealing process so as to complete phase-forming transition of the piezoelectric film. Since the annealing temperature in the laser annealing process can be controlled in a range of 300° C. to 400° C., the manufacturing process can be not only applied to ensure a good performance of a piezoelectric film, but also can be used for manufacturing a flexible piezoelectric film sensor.

9. 发明授权

US09633844B2 Method for forming low temperature polysilicon thin film 有权
公开(公告)号：US09633844B2
公开(公告)日：2017-04-25
申请号：US13703122
申请日：2012-10-22
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Xueyan Tian , Chunping Long , Jiangfeng Yao
IPC分类号： H01L21/20 , H01L21/36 , H01L21/02 , H01L27/12 , H01L21/321
CPC分类号： H01L21/02675 , H01L21/02436 , H01L21/02532 , H01L21/02595 , H01L21/02664 , H01L21/02686 , H01L21/32115 , H01L27/1285
摘要： Embodiments of the present invention provide a method for forming a low temperature polysilicon thin film. The method for forming the low temperature polysilicon thin film can include: depositing a buffer layer and an amorphous silicon layer on a substrate in this order; heating the amorphous silicon layer; performing an excimer laser annealing process on the amorphous silicon layer to form a polysilicon layer; oxidizing partially the polysilicon layer so as to form an oxidation portion at an upper portion of the polysilicon layer; and removing the oxidation portion of the polysilicon layer to form a polysilicon thin film.

10. 发明申请

US20160268319A1 LOW TEMPERATURE POLYCRYSTALLINE SILICON TFT ARRAY SUBSTRATE AND METHOD OF PRODUCING THE SAME, DISPLAY APPARATUS 有权
标题翻译：低温多晶硅晶体管阵列基板及其制造方法，显示装置
公开(公告)号：US20160268319A1
公开(公告)日：2016-09-15
申请号：US14769891
申请日：2014-09-30
申请人： BOE TECHNOLOGY GROUP CO., LTD.
发明人： Chunping Long , Yinan Liang , Zheng Liu , Zuqiang Wang , Xueyan Tian
IPC分类号： H01L27/12 , H01L29/786
CPC分类号： H01L27/1288 , H01L27/1255 , H01L27/3262 , H01L2227/323
摘要： The present disclosure provides a low temperature polycrystalline silicon field effect TFT array substrate and a method for producing the same and a display apparatus. The method: using a stepped photo resist process to form a polycrystalline silicon active layer and a lower polar plate of a polycrystalline silicon storage capacitor simultaneously on a substrate in one lithographic process; forming a gate insulation layer on the polycrystalline silicon active layer and the lower polar plate of the polycrystalline silicon storage capacitor; forming a metal layer on the gate insulation layer and etching the metal layer to form a gate electrode and gate lines connected with the gate electrode, a source electrode, a drain electrode and data lines connected with the source electrode and the drain electrode; forming a passivation layer, a photo resist layer and a pixel electrode layer in sequence and patterning the passivation layer, the photo resist layer and the pixel electrode layer to form patterns of an interlayer insulation layer via hole and a pixel electrode in one lithographic process; forming a pixel definition layer on the pixel electrode. The present disclosure may reduce times of lithographic processes for the low temperature polycrystalline silicon field effect TFT array substrate, improve the yield and reduce the costs.
摘要翻译：本公开内容提供了一种低温多晶硅场效应TFT阵列基板及其制造方法和显示装置。该方法：在一个光刻工艺中，使用阶梯式光刻胶工艺在衬底上同时形成多晶硅存储电容器的多晶硅有源层和下极板; 在多晶硅有源层和多晶硅储存电容器的下极板上形成栅极绝缘层; 在所述栅极绝缘层上形成金属层，并蚀刻所述金属层以形成与所述栅电极，源电极，漏电极以及与所述源电极和所述漏极连接的数据线连接的栅电极和栅极线; 依次形成钝化层，光致抗蚀剂层和像素电极层，并在一个光刻工艺中图案化钝化层，光致抗蚀剂层和像素电极层以形成层间绝缘层通孔和像素电极的图案; 在像素电极上形成像素定义层。本公开可以减少低温多晶硅场效应晶体管阵列基板的光刻工艺的时间，提高产量并降低成本。

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