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1. 发明授权

US06466091B1 High order multi-path operational amplifier with reduced input referred offset 有权
标题翻译：高阶多径运算放大器，具有减少的输入参考偏移
公开(公告)号：US06466091B1
公开(公告)日：2002-10-15
申请号：US09678160
申请日：2000-10-02
申请人： Murari Kejariwal , Prasad Ammisetti , Axel Thomsen
发明人： Murari Kejariwal , Prasad Ammisetti , Axel Thomsen
IPC分类号： H03F368
CPC分类号： H03F3/45982 , H03F1/30 , H03F3/343
摘要： Disclosed in this application is the placement of an additional integrator between the first stage integrator output and the input to the attenuator/low pass filter. This approach reduces the input referred offset by a factor equal to the gain of the additional integrator, and the offset of the additional integrator itself will be divided by the gain of the first-stage integrator.
摘要翻译：在本申请中公开了在第一级积分器输出和衰减器/低通滤波器的输入之间放置附加积分器。该方法将输入参考偏移减少了等于附加积分器的增益的因子，并且附加积分器本身的偏移将除以第一级积分器的增益。

2. 发明授权

US06307430B1 Noise reduction technique in chopper stabilized amplifier 有权
标题翻译：斩波稳压放大器中的降噪技术
公开(公告)号：US06307430B1
公开(公告)日：2001-10-23
申请号：US09678166
申请日：2000-10-02
申请人： Axel Thomsen , Murari Kejariwal , Prasad Ammisetti
发明人： Axel Thomsen , Murari Kejariwal , Prasad Ammisetti
IPC分类号： H03F102
CPC分类号： H03F3/38 , H03F3/45192 , H03F3/4565 , H03F3/45739 , H03F3/45775 , H03F2203/45356 , H03F2203/45631 , H03F2203/45651 , H03F2203/45682
摘要： Disclosed is a chopper-stabilized amplifier with current steering used as output switching and to be operated in a low power supply voltage environment.
摘要翻译：公开了一种具有电流转向的斩波稳定放大器，用作输出开关并在低电源电压环境中工作。

3. 发明授权

US06937046B1 Non-invasive, low pin count test circuits and methods 有权
标题翻译：非侵入性，低引脚数测试电路和方法
公开(公告)号：US06937046B1
公开(公告)日：2005-08-30
申请号：US10027187
申请日：2001-12-20
申请人： Murari Kejariwal , Prasad Ammisetti , Axel Thomsen , John Laurence Melanson
发明人： Murari Kejariwal , Prasad Ammisetti , Axel Thomsen , John Laurence Melanson
IPC分类号： G01R31/28 , G01R31/02
CPC分类号： G01R31/2884
摘要： A method of testing an integrated circuit including the steps of observing a selected parameter at a selected test mode to detect an error. The current to the integrated circuit is stepped from a reference level by selected amount.
摘要翻译：一种测试集成电路的方法，包括在所选择的测试模式下观察所选择的参数以检测错误的步骤。到集成电路的电流从参考电平以选定的量步进。

4. 发明授权

US07639002B1 Non-invasive, low pin count test circuits and methods 有权
标题翻译：非侵入性，低引脚数测试电路和方法
公开(公告)号：US07639002B1
公开(公告)日：2009-12-29
申请号：US11410362
申请日：2006-04-25
申请人： Murari Kejariwal , Prisad Ammisetti , Axel Thomsen , John Laurence Melanson
发明人： Murari Kejariwal , Prisad Ammisetti , Axel Thomsen , John Laurence Melanson
IPC分类号： G01R31/28
CPC分类号： G01R31/31707
摘要： A method of testing an integrated circuit including a plurality of test nodes includes initiating a test mode and, during a first time interval of the test mode, stepping a level of a supply current of the integrated circuit to a calibration level. Parameters are observed at the plurality of test nodes to detect errors during a second time interval of the test mode and the level of the supply current selectively stepped in response to a number of errors detected. The level of the supply current is decoded to identify the detected errors.
摘要翻译：一种测试包括多个测试节点的集成电路的方法包括启动测试模式，并且在测试模式的第一时间间隔期间，使集成电路的电源电平的级别达到校准水平。在多个测试节点处观察参数以在测试模式的第二时间间隔期间检测错误，并且响应于检测到的错误的数量选择性地步进电源电平。电源电流的电平被解码以识别检测到的错误。

5. 发明授权

US06885211B1 Internal node offset voltage test circuits and methods 有权
标题翻译：内部节点偏移电压测试电路及方法
公开(公告)号：US06885211B1
公开(公告)日：2005-04-26
申请号：US10117374
申请日：2002-04-05
申请人： Axel Thomsen , Sherry Wu , Murari Kejariwal , Ammisetti Prasad , John Laurence Melanson
发明人： Axel Thomsen , Sherry Wu , Murari Kejariwal , Ammisetti Prasad , John Laurence Melanson
IPC分类号： G01R31/28 , G01R31/26
CPC分类号： G01R31/2837
摘要： A method of testing an integrated circuit includes setting a guardbanded limit for a parameter associated with an embedded node, a deviation from the guardbanded limit under a set of test conditions correlated with a failure of the integrated circuit across a range of operating conditions. A test is performed under the test conditions to detect deviations of the parameter from the guardbanded limit to detect failures of the integrated circuit over the range of operating conditions.
摘要翻译：一种测试集成电路的方法包括设置与嵌入式节点相关联的参数的保护限值，与在整个操作条件范围内的集成电路的故障相关的一组测试条件下的保护带限制的偏差。在测试条件下进行测试，以检测参数与防护带限制的偏差，以检测集成电路在工作条件范围内的故障。

6. 发明授权

US06515540B1 High order multi-path operational amplifier with output saturation recovery 失效
标题翻译：具有输出饱和恢复功能的高阶多径运算放大器
公开(公告)号：US06515540B1
公开(公告)日：2003-02-04
申请号：US10013559
申请日：2001-12-10
申请人： Ammisetti V. Prasad , Murari Kejariwal , Axel Thomsen
发明人： Ammisetti V. Prasad , Murari Kejariwal , Axel Thomsen
IPC分类号： H03F102
CPC分类号： H03F3/72 , H03F1/086
摘要： An amplifier is disclosed including multiple integrator stages. The amplifier includes a low-frequency path from a signal input to a signal output and relatively higher-frequency bypass paths around the first integrator stage. The paths converge at a summing node. To prevent instability when the integrators are saturated by large signals, the circuit includes a saturation detector which disables the relatively low-frequency paths during such saturation conditions.
摘要翻译：公开了包括多个积分器级的放大器。放大器包括从信号输入到信号输出的低频路径和围绕第一积分器级的相对较高频率的旁路路径。路径收敛在求和节点处。为了防止当积分器被大信号饱和时的不稳定性，该电路包括饱和检测器，其在这种饱和状态期间禁用相对低频路径。

7. 发明授权

US08441325B2 Isolator with complementary configurable memory 有权
标题翻译：隔离器具有互补的可配置存储器
公开(公告)号：US08441325B2
公开(公告)日：2013-05-14
申请号：US12494618
申请日：2009-06-30
申请人： Phil A. Callahan , Ahsan Javed , Zhiwei Dong , Axel Thomsen , Donald E. Alfano , Timothy Dupuis , Ka Y. Leung
发明人： Phil A. Callahan , Ahsan Javed , Zhiwei Dong , Axel Thomsen , Donald E. Alfano , Timothy Dupuis , Ka Y. Leung
IPC分类号： H03H2/00 , H04B3/00
CPC分类号： H01L24/48 , H01L23/49503 , H01L23/4952 , H01L23/49575 , H01L23/642 , H01L23/66 , H01L24/06 , H01L24/49 , H01L25/0655 , H01L2223/6611 , H01L2224/04042 , H01L2224/05554 , H01L2224/05599 , H01L2224/48091 , H01L2224/48137 , H01L2224/48247 , H01L2224/48472 , H01L2224/49171 , H01L2224/49175 , H01L2224/85399 , H01L2924/00014 , H01L2924/01006 , H01L2924/01015 , H01L2924/01023 , H01L2924/01033 , H01L2924/01082 , H01L2924/13091 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H04B2203/5491 , H01L2224/45099 , H01L2924/00
摘要： An isolator that includes first and second substantially identical circuitry galvanically isolated from each other and each having at least one communications channel thereon for communicating signals across an isolation boundary therebetween and each of said first and second circuitry having configurable functionality associated with the operation thereof. A coupling device is provided for coupling signal across the isolation boundary between the at least one communication channels of the first and second circuitry. First and second configuration memories are provided, each associated with a respective one of the first and second circuitry. First and second configuration control devices are provided, each associated with a respective one of the first and second circuitry and each configuring the functionality of the associated one of the first and second circuitry. The first and second configurable memories have stored therein complementary configuration information to control each of the functionalities of the first and second circuitry to operate in a complementary manner for communication of signals across the isolation boundary.
摘要翻译：一种隔离器，其包括彼此电隔离的第一和第二基本相同的电路，并且每个具有至少一个用于在其间的隔离边界传送信号的通信信道，所述第一和第二电路中的每一个具有与其操作相关联的可配置功能。提供耦合装置用于在第一和第二电路的至少一个通信信道之间的隔离边界上耦合信号。提供第一和第二配置存储器，每个与第一和第二电路中的相应一个相关联。提供第一和第二配置控制设备，每个配置控制设备与第一和第二电路中的相应一个相关联，并且每个配置控制设备配置第一和第二电路中相关联的一个的功能。第一和第二可配置存储器在其中存储有互补配置信息，以控制第一和第二电路的每个功能以互补的方式进行操作，用于跨越隔离边界的信号通信。

8. 发明授权

US07902627B2 Capacitive isolation circuitry with improved common mode detector 有权
标题翻译：具有改进的共模检测器的电容隔离电路
公开(公告)号：US07902627B2
公开(公告)日：2011-03-08
申请号：US12414387
申请日：2009-03-30
申请人： Zhiwei Dong , Shouli Yan , Axel Thomsen , William W. K. Tang , Ka Y. Leung
发明人： Zhiwei Dong , Shouli Yan , Axel Thomsen , William W. K. Tang , Ka Y. Leung
IPC分类号： H01L25/00
CPC分类号： H01L23/66 , H01L24/48 , H01L24/49 , H01L2223/6611 , H01L2224/05554 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/48464 , H01L2224/49096 , H01L2224/49171 , H01L2224/49175 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01023 , H01L2924/01027 , H01L2924/01033 , H01L2924/01082 , H01L2924/14 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H03K17/689 , H04L5/14 , H04L25/0268 , H01L2924/00 , H01L2224/45099 , H01L2924/00012
摘要： An integrated circuit having voltage isolation capabilities comprising a first galvanically isolated area of the integrated circuit containing a first group of functional circuitry for processing a data stream. The first group of functional circuitry located in a substrate of the integrated circuit. Capacitive isolation circuitry located in conductive layers of the integrated circuit provides a high voltage isolation link between the first group of functional circuitry and a second group of functional circuitry connected to the integrated circuit through the capacitive isolation circuitry. The capacitive isolation circuitry includes a differential transmitter for transmitting data in a differential signal to the second group of functional circuitry via the capacitive isolation circuitry. A differential receiver receives data within the differential signal from the second group of functional circuitry via the capacitive isolation circuitry. A detector circuit within the differential receiver detects the received data. The detector circuit monitors the differential signal and generates a first logical output when a voltage generated responsive to the differential signal exceeds a programmable voltage threshold level and generates a second logical output when the voltage generated responsive to the differential signal falls below the programmable voltage threshold level.
摘要翻译：一种具有电压隔离能力的集成电路，包括集成电路的第一电隔离区域，其包含用于处理数据流的第一组功能电路。位于集成电路的基板中的第一组功能电路。位于集成电路的导电层中的电容隔离电路在第一组功能电路之间提供高电压隔离连接，以及通过电容隔离电路连接到集成电路的第二组功能电路。电容隔离电路包括用于经由电容隔离电路将差分信号中的数据传送到第二组功能电路的差分发射器。差分接收器经由电容隔离电路从第二组功能电路接收差分信号内的数据。差分接收器内的检测器电路检测接收到的数据。当响应于差分信号产生的电压超过可编程电压阈值电平时，检测器电路监视差分信号并产生第一逻辑输出，并且当响应于差分信号产生的电压低于可编程电压阈值电平时产生第二逻辑输出。

9. 发明申请

US20090039968A1 DUAL LOOP ARCHITECTURE USEFUL FOR A PROGRAMMABLE CLOCK SOURCE AND CLOCK MULTIPLIER APPLICATIONS 有权
标题翻译：双循环架构可用于可编程时钟源和时钟多路复用器应用
公开(公告)号：US20090039968A1
公开(公告)日：2009-02-12
申请号：US12249457
申请日：2008-10-10
申请人： Axel Thomsen , Yunteng Huang , Jerrell P. Hein
发明人： Axel Thomsen , Yunteng Huang , Jerrell P. Hein
IPC分类号： H03L7/07
CPC分类号： H03L1/022 , H03L1/026 , H03L7/095 , H03L7/0992 , H03L7/1976 , H03L7/235 , H03L2207/50
摘要： A first phase-locked loop (PLL) circuit includes an input for receiving a timing reference signal from an oscillator, a controllable oscillator circuit supplying an oscillator output signal, and a multi-modulus feedback divider circuit. A second control loop circuit is selectably coupled through a select circuit to supply a digital control value (M) to the multi-modulus feedback divider circuit of the first loop circuit to thereby control the oscillator output signal. While the second control loop is coupled to supply the control value to the feedback divider circuit, the control value is determined according to a detected difference between the oscillator output signal and a reference signal coupled to the second control loop circuit at a divider circuit. While the second control loop circuit is not coupled to control the first PLL circuit, the first PLL circuit receives a digital control value to control a divide ratio of the feedback divider, the digital control value is determined at least in part according to a stored control value stored in nonvolatile storage, the stored control value corresponding to a desired frequency of the oscillator output signal.
摘要翻译：第一锁相环（PLL）电路包括用于从振荡器接收定时参考信号的输入端，提供振荡器输出信号的可控振荡器电路和多模反馈分频器电路。第二控制回路电路通过选择电路可选地耦合，以将数字控制值（M）提供给第一回路电路的多模反馈分配器电路，从而控制振荡器输出信号。当第二控制回路被耦合以将控制值提供给反馈分配器电路时，根据在分频器电路处的振荡器输出信号和耦合到第二控制回路电路的参考信号之间的检测到差异来确定控制值。当第二控制环路电路不耦合以控制第一PLL电路时，第一PLL电路接收数字控制值以控制反馈分频器的分频比，数字控制值至少部分地根据存储的控制存储在非易失性存储器中的值，所存储的控制值对应于振荡器输出信号的期望频率。

10. 发明授权

US07436227B2 Dual loop architecture useful for a programmable clock source and clock multiplier applications 有权
标题翻译：双循环架构可用于可编程时钟源和时钟乘法器应用
公开(公告)号：US07436227B2
公开(公告)日：2008-10-14
申请号：US10878218
申请日：2004-06-28
申请人： Axel Thomsen , Yunteng Huang , Jerrell P. Hein
发明人： Axel Thomsen , Yunteng Huang , Jerrell P. Hein
IPC分类号： H03L7/06
CPC分类号： H03L1/022 , H03L1/026 , H03L7/095 , H03L7/0992 , H03L7/1976 , H03L7/235 , H03L2207/50
摘要： A first phase-locked loop (PLL) circuit includes an input for receiving a timing reference signal from an oscillator, a controllable oscillator circuit supplying an oscillator output signal, and a multi-modulus feedback divider circuit. A second control loop circuit is selectably coupled through a select circuit to supply a digital control value (M) to the multi-modulus feedback divider circuit of the first loop circuit to thereby control the oscillator output signal. While the second control loop is coupled to supply the control value to the feedback divider circuit, the control value is determined according to a detected difference between the oscillator output signal and a reference signal coupled to the second control loop circuit at a divider circuit. While the second control loop circuit is not coupled to control the first PLL circuit, the first PLL circuit receives a digital control value to control a divide ratio of the feedback divider, the digital control value is determined at least in part according to a stored control value stored in nonvolatile storage, the stored control value corresponding to a desired frequency of the oscillator output signal.
摘要翻译：第一锁相环（PLL）电路包括用于从振荡器接收定时参考信号的输入端，提供振荡器输出信号的可控振荡器电路和多模反馈分频器电路。第二控制回路电路通过选择电路可选地耦合，以将数字控制值（M）提供给第一回路电路的多模反馈分配器电路，从而控制振荡器输出信号。当第二控制回路被耦合以将控制值提供给反馈分配器电路时，根据在分频器电路处的振荡器输出信号和耦合到第二控制回路电路的参考信号之间的检测到差异来确定控制值。当第二控制环路电路不耦合以控制第一PLL电路时，第一PLL电路接收数字控制值以控制反馈分频器的分频比，数字控制值至少部分地根据存储的控制存储在非易失性存储器中的值，所存储的控制值对应于振荡器输出信号的期望频率。

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