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1. 发明授权

US5250830A Dynamic type semiconductor memory device and its manufacturing method 失效
标题翻译：动态型半导体存储器件及其制造方法
公开(公告)号：US5250830A
公开(公告)日：1993-10-05
申请号：US797192
申请日：1991-11-25
申请人： Atsushi Yagishita , Katsuhiko Hieda , Akihiro Nitayama , Fumio Horiguchi
发明人： Atsushi Yagishita , Katsuhiko Hieda , Akihiro Nitayama , Fumio Horiguchi
IPC分类号： H01L27/10 , H01L21/8242 , H01L27/108 , H01L29/68 , H01L29/78 , H01L29/92
CPC分类号： H01L27/10841 , H01L27/10823
摘要： A groove, which runs vertically and horizontally, is formed in a substrate, thereby a plurality of silicon pillars are formed in a matrix manner. A field oxidation film is formed on the central portion of the groove. A drain diffusion layer is formed on the upper portion of each silicon pillar, and a source diffusion layer is formed on the bottom portion of the groove. A gate electrode, serving as a word line, a storage node contacting the source diffusion layer, and a cell plate are sequentially buried to enclose the surroundings of each silicon pillar, and a bit line is formed in an uppermost layer, thereby a DRAM cell array is structured.
摘要翻译：在衬底中形成垂直和水平延伸的槽，从而以矩阵形式形成多个硅柱。在槽的中心部分形成场氧化膜。在每个硅柱的上部形成漏极扩散层，在沟槽的底部形成有源极扩散层。用作字线的栅电极，与源极扩散层接触的存储节点和单元板依次被埋置以包围每个硅柱的周围，并且在最上层形成位线，从而形成DRAM单元阵列是结构化的

2. 发明授权

US5350708A Method of making dynamic random access semiconductor memory device 失效
标题翻译：制作动态随机存取半导体存储器件的方法
公开(公告)号：US5350708A
公开(公告)日：1994-09-27
申请号：US77744
申请日：1993-06-18
申请人： Atsushi Yagishita , Katsuhiko Hieda , Akihiro Nitayama , Fumio Horiguchi
发明人： Atsushi Yagishita , Katsuhiko Hieda , Akihiro Nitayama , Fumio Horiguchi
IPC分类号： H01L27/10 , H01L21/8242 , H01L27/108 , H01L21/70
CPC分类号： H01L27/10841 , H01L27/10823
摘要： A groove, which runs vertically and horizontally, is formed in a substrate, thereby a plurality of silicon pillars are formed in a matrix manner. A field oxidation film is formed on the central portion of the groove. A drain diffusion layer is formed on the upper portion of each silicon pillar, and a source diffusion layer is formed on the bottom portion of the groove. A gate electrode, serving as a word line, a storage node contacting the source diffusion layer, and a cell plate are sequentially buried to enclose the surroundings of each silicon pillar, and a bit line is formed in an uppermost layer, thereby a DRAM cell array is structured.
摘要翻译：在衬底中形成垂直和水平延伸的槽，从而以矩阵形式形成多个硅柱。在槽的中心部分形成场氧化膜。在每个硅柱的上部形成漏极扩散层，在沟槽的底部形成有源极扩散层。用作字线的栅电极，与源极扩散层接触的存储节点和单元板依次被埋置以包围每个硅柱的周围，并且在最上层形成位线，从而形成DRAM单元阵列是结构化的

3. 发明授权

US06515338B1 Semiconductor device and manufacturing method therefor 失效
标题翻译：半导体器件
公开(公告)号：US06515338B1
公开(公告)日：2003-02-04
申请号：US09533765
申请日：2000-03-23
申请人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
发明人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
IPC分类号： H01L2976
CPC分类号： H01L29/495 , H01L21/28114 , H01L21/28123 , H01L21/76801 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L21/823437 , H01L29/41783 , H01L29/4941 , H01L29/6653 , H01L29/66537 , H01L29/66545 , H01L29/6659 , H01L29/66621 , H01L29/78 , Y10S257/90
摘要： A method of manufacturing semiconductor device comprises the steps of forming a first film and a second film on a semiconductor substrate, selectively removing the second film, the first film and a top portion of the semiconductor substrate to form a first groove, burying a first insulator film in the first groove to form an isolation region, patterning the second film surrounded by the isolation region to form a dummy gate layer, doping the semiconductor substrate with an impurity using the dummy gate layer as a mask, forming a second insulator film on the semiconductor substrate surrounded by the dummy gate layer and the first insulator film, removing the dummy gate layer and the first film to form a second groove, forming a gate insulator film on the semiconductor substrate in the second groove, and forming a gate electrode on the gate insulator film in the second groove.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底上形成第一膜和第二膜，选择性地去除第二膜，第一膜和半导体衬底的顶部以形成第一槽，将第一绝缘体在第一凹槽中形成隔离区域，对由隔离区域包围的第二膜进行构图以形成伪栅极层，使用伪栅极层作为掩模将杂质掺杂到半导体衬底上，在第二绝缘膜上形成第二绝缘膜由虚拟栅极层和第一绝缘膜包围的半导体衬底，去除伪栅极层和第一膜以形成第二沟槽，在第二沟槽中的半导体衬底上形成栅极绝缘膜，并在栅极电极上形成栅电极栅极绝缘膜在第二凹槽中。

4. 发明授权

US06664592B2 Semiconductor device with groove type channel structure 失效
标题翻译：具有凹槽型沟道结构的半导体器件
公开(公告)号：US06664592B2
公开(公告)日：2003-12-16
申请号：US10330280
申请日：2002-12-30
申请人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
发明人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
IPC分类号： H01L2976
CPC分类号： H01L29/495 , H01L21/28114 , H01L21/28123 , H01L21/76801 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L21/823437 , H01L29/41783 , H01L29/4941 , H01L29/6653 , H01L29/66537 , H01L29/66545 , H01L29/6659 , H01L29/66621 , H01L29/78 , Y10S257/90
摘要： A semiconductor device includes a semiconductor substrate, a gate insulator film formed on a bottom surface and a side surface of a groove formed in the semiconductor substrate, a gate electrode having a lower portion buried in the groove on whose bottom and side surface the gate insulator film is formed, and an upper portion protruding a surface of said semiconductor substrate, and source region and a drain region formed on a surface of the semiconductor substrate in such a way as to sandwich the gate electrode. A thickness of the upper portion of the gate electrode protruding the surface of the semiconductor substrate is equal to or greater than twice a thickness of the lower portion of the gate electrode buried in the groove.
摘要翻译：半导体器件包括半导体衬底，形成在半导体衬底的凹槽的底面和凹槽的侧面上的栅极绝缘体膜，栅电极，其下部埋设在沟槽中，栅极绝缘体的底部和侧表面上的栅极绝缘体并且形成在半导体衬底的表面上的源极区域和漏极区域以夹着栅极电极的方式突出所述半导体衬底的表面的上部。突出半导体衬底表面的栅电极的上部的厚度等于或大于埋在槽中的栅电极的下部的厚度的两倍。

5. 发明授权

US6054355A Method of manufacturing a semiconductor device which includes forming a dummy gate 失效
标题翻译：制造半导体器件的方法，包括形成虚拟栅极
公开(公告)号：US6054355A
公开(公告)日：2000-04-25
申请号：US105956
申请日：1998-06-29
申请人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
发明人： Seiji Inumiya , Tomohiro Saito , Atsushi Yagishita , Katsuhiko Hieda , Toshihiko Iinuma
IPC分类号： H01L21/28 , H01L21/336 , H01L21/60 , H01L21/768 , H01L21/8234 , H01L29/423 , H01L29/49
CPC分类号： H01L29/495 , H01L21/28114 , H01L21/28123 , H01L21/76801 , H01L21/76829 , H01L21/76831 , H01L21/76832 , H01L21/76834 , H01L21/76897 , H01L21/823437 , H01L29/41783 , H01L29/6653 , H01L29/66545 , H01L29/6659 , H01L29/66621 , H01L29/78 , H01L29/4941 , H01L29/66537 , Y10S257/90
摘要： A method of manufacturing a semiconductor device comprises the steps of forming a first film and a second film on a semiconductor substrate, selectively removing the second film, the first film and a top portion of the semiconductor substrate to form a first groove, burying a first insulator film in the first groove to form an isolation region, patterning the second film surrounded by the isolation region to form a dummy gate layer, doping the semiconductor substrate with an impurity using the dummy gate layer as a mask, forming a second insulator film on the semiconductor substrate surrounded by the dummy gate layer and the first insulator film, removing the dummy gate layer and the first film to form a second groove, forming a gate insulator film on the semiconductor substrate in the second groove, and forming a gate electrode on the gate insulator film in the second groove.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在半导体衬底上形成第一膜和第二膜，选择性地去除第二膜，第一膜和半导体衬底的顶部以形成第一槽，在第一沟槽中形成绝缘体膜以形成隔离区域，对由隔离区域包围的第二膜进行构图以形成伪栅极层，使用伪栅极层作为掩模将杂质掺杂到半导体衬底上，形成第二绝缘膜所述半导体基板被所述伪栅极层和所述第一绝缘膜包围，去除所述伪栅极层和所述第一膜以形成第二沟槽，在所述第二沟槽中的所述半导体基板上形成栅极绝缘膜，并且形成栅电极第二槽中的栅极绝缘膜。

6. 发明申请

US20120049281A1 SEMICONDUCTOR DEVICE WITH EFFECTIVE WORK FUNCTION CONTROLLED METAL GATE 审中-公开
标题翻译：具有有效工作功能的半导体器件控制金属栅
公开(公告)号：US20120049281A1
公开(公告)日：2012-03-01
申请号：US12870011
申请日：2010-08-27
申请人： Yoshinori Tsuchiya , Ryosuke Iijima , Atsushi Yagishita
发明人： Yoshinori Tsuchiya , Ryosuke Iijima , Atsushi Yagishita
IPC分类号： H01L27/12 , H01L21/762
CPC分类号： H01L29/785 , H01L29/66795
摘要： According to one embodiment, gate electrodes of a multi-gate field effect transistors and methods of making a gate electrode of a multi-gate field effect transistor are provided. The gate electrode can contain a semiconductor substrate; a dielectric layer over the semiconductor substrate; a fin over the dielectric layer; a gate insulating layer over the side surfaces of the fin; a gate electrode layer over the fin; and a polysilicon layer over the fin. The gate electrode does not contain a gate insulating layer over the upper surface of the dielectric layer except portions of the upper surface of the dielectric layer that contact with the side surfaces of the gate insulating layer formed over the side surface of the fin. In another embodiment, the gate electrode can contain an oxygen diffusion barrier layer or a first oxygen diffusion layer over the upper surface of the dielectric layer.
摘要翻译：根据一个实施例，提供了多栅极场效应晶体管的栅极和制造多栅极场效应晶体管的栅电极的方法。栅电极可以包含半导体衬底; 半导体衬底上的电介质层; 电介质层上的翅片; 在翅片的侧表面上的栅极绝缘层; 翅片上的栅极电极层; 和鳍上的多晶硅层。栅电极除电介质层上表面的与栅极侧表面上形成的栅极绝缘层的侧面接触的部分以外，在电介质层的上表面上不包含栅极绝缘层。在另一个实施例中，栅电极可以在电介质层的上表面上包含氧扩散阻挡层或第一氧扩散层。

7. 发明授权

US08053292B2 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08053292B2
公开(公告)日：2011-11-08
申请号：US12805533
申请日：2010-08-04
申请人： Akio Kaneko , Atsushi Yagishita , Satoshi Inaba
发明人： Akio Kaneko , Atsushi Yagishita , Satoshi Inaba
IPC分类号： H01L21/8238
CPC分类号： H01L29/785 , H01L21/845 , H01L27/1211 , H01L29/045 , H01L29/6681 , H01L29/7843
摘要： The disclosure concerns a method of manufacturing a semiconductor device including forming a plurality of fins made of a semiconductor material on an insulating layer; forming a gate insulating film on side surfaces of the plurality of fins; and forming a gate electrode on the gate insulating film in such a manner that a compressive stress is applied to a side surface of a first fin which is used in an NMOSFET among the plurality of fins in a direction perpendicular to the side surface and a tensile stress is applied to a side surface of a second fin which is used in a PMOSFET among the plurality of fins in a direction perpendicular to the side surface.
摘要翻译：本公开涉及一种制造半导体器件的方法，包括在绝缘层上形成由半导体材料制成的多个鳍片; 在所述多个翅片的侧面上形成栅极绝缘膜; 以及在所述栅极绝缘膜上形成栅电极，使得在与所述侧面垂直的方向上在所述多个翅片中的NMOSFET中使用的第一鳍片的侧面施加压缩应力，在垂直于侧面的方向上，在多个翅片中的PMOSFET中使用的第二鳍片的侧面施加应力。

8. 发明授权

US07723171B2 Semiconductor device and method of fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07723171B2
公开(公告)日：2010-05-25
申请号：US12078585
申请日：2008-04-02
申请人： Atsushi Yagishita , Akio Kaneko , Kazunari Ishimaru
发明人： Atsushi Yagishita , Akio Kaneko , Kazunari Ishimaru
IPC分类号： H01L21/336
CPC分类号： H01L29/785 , H01L21/28097 , H01L21/823431 , H01L27/0886 , H01L29/66795 , H01L29/6681 , H01L29/7851
摘要： According to the present invention, there is provided a semiconductor device fabrication method, comprising:depositing a mask material on a semiconductor substrate;patterning the mask material and forming a trench in a surface portion of the semiconductor substrate by etching, thereby forming a first projection in a first region, and a second projection wider than the first projection in a second region;burying a device isolation insulating film in the trench;etching away a predetermined amount of the device isolation insulating film formed in the first region;etching away the mask material formed in the second region;forming a first gate insulating film on a pair of opposing side surfaces of the first projection, and a second gate insulating film on an upper surface of the second projection;depositing a first gate electrode material on the device isolation insulating film, mask material, and second gate insulating film;planarizing the first gate electrode material by using as stoppers the mask material formed in the first region and the device isolation insulating film formed in the second region;depositing a second gate electrode material on the mask material, first gate electrode material, and device isolation insulating film; andpatterning the first and second gate electrode materials, thereby forming a first gate electrode in the first region, and a second gate electrode in the second region.
摘要翻译：根据本发明，提供了一种半导体器件制造方法，包括：在半导体衬底上沉积掩模材料; 图案化掩模材料并通过蚀刻在半导体衬底的表面部分中形成沟槽，从而在第一区域中形成第一突起，在第二区域形成比第一突起宽的第二突起; 在沟槽中埋设器件隔离绝缘膜; 蚀刻形成在第一区域中的预定量的器件隔离绝缘膜; 蚀刻形成在第二区域中的掩模材料; 在所述第一突起的一对相对的侧面上形成第一栅极绝缘膜，在所述第二突起的上表面上形成第二栅极绝缘膜; 在器件隔离绝缘膜，掩模材料和第二栅极绝缘膜上沉积第一栅电极材料; 通过使用形成在第一区域中的掩模材料和形成在第二区域中的器件隔离绝缘膜作为阻挡层来平坦化第一栅电极材料; 在掩模材料上沉积第二栅电极材料，第一栅电极材料和器件隔离绝缘膜; 以及对第一和第二栅电极材料进行构图，从而在第一区域形成第一栅电极，在第二区域形成第二栅电极。

9. 发明申请

US20100081240A1 Semiconductor device and method of manufacturing semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20100081240A1
公开(公告)日：2010-04-01
申请号：US12585554
申请日：2009-09-17
申请人： Atsushi Yagishita
发明人： Atsushi Yagishita
IPC分类号： H01L21/86
CPC分类号： H01L21/845 , H01L27/1211 , H01L29/41791 , H01L29/66795 , H01L29/785 , H01L2029/7858
摘要： A method of manufacturing a semiconductor device includes forming a plurality of Fins including a semiconductor material on an insulation layer; forming gate insulation films on sidewalls of the Fins; forming a gate electrode which extends in a direction of arrangement of the Fins and which is electrically insulated from the Fins, the gate electrode is common in the Fins on the gate insulation film; implanting an impurity into portions of the Fins by using the gate electrode as a mask to form a source-drain diffusion layer, the portions of the Fins extending on both sides of the gate electrodes; and depositing a conductive material on both sides of the Fins to connect the Fins to each other.
摘要翻译：制造半导体器件的方法包括在绝缘层上形成包括半导体材料的多个金属丝; 在金属丝的侧壁上形成栅极绝缘膜; 形成栅极电极，所述栅电极在所述鳍片的布置方向上延伸并且与所述鳍状物电绝缘，所述栅极电极在所述栅极绝缘膜上的所述鳍片中是共同的; 通过使用栅极电极作为掩模将杂质注入到薄片的部分中以形成源极 - 漏极扩散层，鳍状物的部分在栅电极的两侧延伸; 以及在所述金属丝的两侧上沉积导电材料以将所述金属丝彼此连接。

10. 发明授权

US07537978B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07537978B2
公开(公告)日：2009-05-26
申请号：US11717068
申请日：2007-03-13
申请人： Atsushi Yagishita , Ichiro Mizushima , Tsutomu Sato
发明人： Atsushi Yagishita , Ichiro Mizushima , Tsutomu Sato
IPC分类号： H01L21/00
CPC分类号： H01L29/66772 , H01L21/84 , H01L27/1203 , H01L29/66545 , H01L29/78639 , H01L29/78648
摘要： A semiconductor device comprises a support layer made of semiconductor, a diffusion layer formed by implanting impurities in a surface layer of the support layer, a buried insulating layer provided on the diffusion layer, an island-like active layer provided on the buried insulating layer, a channel region formed in the active layer, source and drain regions formed in the active layer, sandwiching the channel region, a gate insulating film formed on the channel region, a gate electrode formed on the gate insulating film and on side surfaces of the island-like active layer, and insulated and isolated from the channel, source, and drain regions, and an electrode connected to the active layer.
摘要翻译：半导体器件包括由半导体制成的支撑层，通过在支撑层的表面层中注入杂质形成的扩散层，设置在扩散层上的掩埋绝缘层，设置在掩埋绝缘层上的岛状有源层，形成在有源层中的沟道区域，形成在有源层中的源极和漏极区域，夹持沟道区域，形成在沟道区域上的栅极绝缘膜，形成在栅极绝缘膜上的栅电极和岛的侧表面类型的有源层，并且与沟道，源极和漏极区域绝缘和隔离，以及连接到有源层的电极。

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