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    • 8. 发明授权
    • Thin film transistor array panel for liquid crystal display having pixel electrode
    • 具有像素电极的液晶显示器的薄膜晶体管阵列面板
    • US07646444B2
    • 2010-01-12
    • US11873767
    • 2007-10-17
    • Dong-Gyu KimHyang-Shik KongJang-Soo Kim
    • Dong-Gyu KimHyang-Shik KongJang-Soo Kim
    • G02F1/136G02F1/1343
    • G02F1/136213G02F1/1337G02F1/133784G02F1/134336G02F1/136227G02F2201/123
    • A TFT array panel includes an insulating substrate, a gate line and a storage electrode line formed thereon. The gate line and the storage electrode line are covered with a gate insulating layer, and a semiconductor island is formed on the gate insulating layer. A pair of ohmic contacts are formed on the semiconductor island, and a data line and a drain electrode are formed thereon. The data line and the drain electrode are covered with a passivation layer having a contact hole exposing the drain electrode. A pixel electrode is formed on the passivation layer and connected to the drain electrode through the contact hole. The TFT array panel is covered with an alignment layer rubbed approximately in a direction from the upper left corner to the lower right corner of the TFT array panel or the pixel electrodes. The pixel electrode has approximately a rectangular shape and overlaps the gate line and the data line. The pixel electrode has an expansion located near the upper left corner of the pixel electrode to increase the width of the corresponding overlapping area between the pixel electrode and the gate line and/or the data line.
    • TFT阵列面板包括绝缘基板,栅极线和形成在其上的存储电极线。 栅极线和存储电极线被栅极绝缘层覆盖,并且在栅极绝缘层上形成半导体岛。 在半导体岛上形成一对欧姆接触,在其上形成数据线和漏电极。 数据线和漏电极被具有暴露漏电极的接触孔的钝化层覆盖。 像素电极形成在钝化层上,并通过接触孔与漏电极连接。 TFT阵列面板被大致沿着从TFT阵列板的左上角到右下角或像素电极的方向摩擦的取向膜覆盖。 像素电极具有大致矩形形状并且与栅极线和数据线重叠。 像素电极具有位于像素电极的左上角附近的扩展部,以增加像素电极与栅极线和/或数据线之间的对应重叠区域的宽度。
    • 9. 发明授权
    • Method for manufacturing contact structures of wiring
    • 制造布线接触结构的方法
    • US07575963B2
    • 2009-08-18
    • US11874769
    • 2007-10-18
    • Hyang-Shik KongMyung-Koo HurChi-Woo Kim
    • Hyang-Shik KongMyung-Koo HurChi-Woo Kim
    • H01L21/84H01L21/00
    • G02F1/13439G02F1/13458H01L21/76801H01L21/76838H01L23/53209H01L27/12H01L27/124H01L27/1288H01L29/458H01L2924/0002H01L2924/00
    • First, a conductive material of aluminum-based material is deposited and patterned to form a gate wire including a gate line, a gate pad, and a gate electrode. A gate insulating layer is formed by depositing nitride silicon in the range of more than 300° C. for 5 minutes, and a semiconductor layer an ohmic contact layer are sequentially formed. Next, a conductor layer of a metal such as Cr is deposited and patterned to form a data wire include a data line intersecting the gate line, a source electrode, a drain electrode and a data pad. Then, a passivation layer is deposited and patterned to form contact holes exposing the drain electrode, the gate pad and the data pad. Next, indium zinc oxide is deposited and patterned to form a pixel electrode, a redundant gate pad and a redundant data pad respectively connected to the drain electrode, the gate pad and the data pad.
    • 首先,将铝基材料的导电材料沉积并图案化以形成包括栅极线,栅极焊盘和栅电极的栅极线。 通过在大于300℃的范围内沉积氮化硅5分钟形成栅极绝缘层,并依次形成半导体层欧姆接触层。 接下来,沉积并图案化诸如Cr的金属的导体层以形成数据线,其包括与栅极线相交的数据线,源电极,漏电极和数据焊盘。 然后,沉积并图案化钝化层以形成暴露漏电极,栅极焊盘和数据焊盘的接触孔。 接下来,沉积并图案化氧化铟锌以形成分别连接到漏电极,栅极焊盘和数据焊盘的像素电极,冗余栅极焊盘和冗余数据焊盘。