专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20160321179A1 ENFORCING DATA PROTECTION IN AN INTERCONNECT 审中-公开
标题翻译：在互连中实施数据保护
公开(公告)号：US20160321179A1
公开(公告)日：2016-11-03
申请号：US14700259
申请日：2015-04-30
申请人： ARM LIMITED
发明人： Daniel SARA , Antony John HARRIS , Håkan Lars-Göran PERSSON , Andrew Christopher ROSE , Ian BRATT
IPC分类号： G06F12/08
CPC分类号： G06F12/0831 , G06F12/0833 , G06F12/1491 , G06F2212/1052
摘要： Interconnect circuitry and a method of operating the interconnect circuitry are provided, where the interconnect circuitry is suitable to couple at least two master devices to a memory, each comprising a local cache. Any access to the memory mediated by the interconnect circuitry is policed by a memory protection controller situated between the interconnect circuitry and the memory. The interconnect circuitry modifies a coherency type associated with a memory transaction received from one of the master devices to a type which ensures that when a modified version of a copy of a transaction target specified by the issuing master device is stored in a local cache of another master device an access to the transaction target in the memory must take place and therefore must be policed by the memory protection controller.
摘要翻译：提供了互连电路和操作互连电路的方法，其中互连电路适于将至少两个主设备耦合到存储器，每个存储器包括本地高速缓存。由互连电路介导的对存储器的访问由位于互连电路和存储器之间的存储器保护控制器来监管。互连电路将与从主设备之一接收的存储器事务相关联的一致性类型修改为确保当由发布主设备指定的事务目标的副本的修改版本被存储在另一个的本地高速缓存中时的类型主设备对存储器中的事务目标的访问必须发生，因此必须由存储器保护控制器进行监管。

2. 发明申请

US20220283972A1 TECHNIQUE FOR HANDLING PROTOCOL CONVERSION 有权
公开(公告)号：US20220283972A1
公开(公告)日：2022-09-08
申请号：US17189781
申请日：2021-03-02
申请人： Arm Limited
发明人： Ashok Kumar TUMMALA , Jamshed JALAL , Antony John HARRIS , Jeffrey Carl DEFILIPPI , Anitha KONA , Bruce James MATHEWSON
IPC分类号： G06F13/38 , G06F13/40
摘要： An apparatus and method are provided for handling protocol conversion. The apparatus has interconnect circuitry for routing messages between components coupled to the interconnect circuitry in a manner that conforms to a first communication protocol. Protocol conversion circuitry is coupled between the interconnect circuitry and an external communication path, for converting messages between the first communication protocol and a second communication protocol that has a layered architecture comprising multiple layers. The protocol conversion circuitry has a gateway component forming one of the components coupled to the interconnect circuitry, and a controller coupled with the gateway component and used to control connection with the external communication path. For a selected layer of the multiple layers, the protocol conversion circuitry provides, within the gateway component, upper selected layer circuitry to implement a first portion of functionality of the selected layer, where the first portion comprises at least protocol dependent functionality of the selected layer. It also provides, within the controller, lower selected layer circuitry to implement a remaining portion of the functionality of the selected layer, the remaining portion comprising only protocol independent functionality of the selected layer.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式