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1. 发明申请

US20040157459A1 Method of etching ferroelectric layers 失效
标题翻译：腐蚀铁电层的方法
公开(公告)号：US20040157459A1
公开(公告)日：2004-08-12
申请号：US10365008
申请日：2003-02-11
申请人： Applied Materials, Inc.
发明人： Chentsau Ying , Padmapani C. Nallan , Ajay Kumar
IPC分类号： H01L021/302
CPC分类号： H01L27/11585 , H01L21/0337 , H01L21/31122 , H01L27/1159 , H01L28/55
摘要： Method of etching a ferroelectric layer comprises etching an upper electrode and partially through a ferroelectric layer. A dielectric material is subsequently deposited upon the upper electrode and the partially etched ferroelectric layer. A second etch step completely etches through the remaining portion of the ferroelectric layer and also etches lower electrodes. A random access memory apparatus is constructed that includes a first conductive layer, a dielectric layer disposed upon the first conductive layer, a second conductive layer disposed upon the dielectric layer, where all of said layers form a stack having a sidewall. Further, the sidewall has a protective film disposed thereon and extends from the second layer down to the dielectric layer. The protective sidewall film is fabricated from a dielectric material.
摘要翻译：蚀刻铁电体层的方法包括蚀刻上部电极并部分地通过铁电层。随后将电介质材料沉积在上电极和部分蚀刻的铁电层上。第二蚀刻步骤完全蚀刻穿过铁电层的剩余部分并蚀刻下电极。构造了包括第一导电层，设置在第一导电层上的电介质层和设置在电介质层上的第二导电层的随机存取存储器装置，其中所有层形成具有侧壁的叠层。此外，侧壁具有设置在其上的保护膜，并从第二层向下延伸到电介质层。保护侧壁膜由介电材料制成。

2. 发明申请

US20040129361A1 Method of etching a magnetic material 失效
标题翻译：蚀刻磁性材料的方法
公开(公告)号：US20040129361A1
公开(公告)日：2004-07-08
申请号：US10338059
申请日：2003-01-06
申请人： Applied Materials, Inc.
发明人： Xiaoyi Chen , Chentsau Ying , Padmapani C. Nallan , Ajay Kumar
IPC分类号： B44C001/22
CPC分类号： H01L43/12
摘要： A method of patterning a layer of magnetic material to form isolated magnetic regions. The method forms a mask on a film stack comprising a layer of magnetic material such that the protected and unprotected regions are defined. The unprotected regions are etched in a high temperature environment to form isolated magnetic regions.
摘要翻译：图案化磁性材料层以形成隔离的磁性区域的方法。该方法在包含磁性材料层的薄膜叠层上形成掩模，使得限定保护区和未保护区。未受保护的区域在高温环境中被蚀刻以形成隔离的磁性区域。

3. 发明申请

US20040077178A1 Method for laterally etching a semiconductor structure 审中-公开
标题翻译：横向蚀刻半导体结构的方法
公开(公告)号：US20040077178A1
公开(公告)日：2004-04-22
申请号：US10273802
申请日：2002-10-17
申请人： Applied Materials, Inc.
发明人： Chan-Syun Yang , Anisul H. Khan , Ajay Kumar , Padmapani C. Nallan
IPC分类号： H01L021/302 , H01L021/461
CPC分类号： B81C1/00404 , H01L21/28114 , H01L21/28123 , H01L21/3065 , H01L21/3081 , H01L21/3086 , H01L21/32137 , H01L21/32139
摘要： A method for laterally etching a structure on a semiconductor substrate comprising depositing a protective mask that thins towards a bottom of the structure and lateral etching a wall of the structure to form a notch or to release the structure.
摘要翻译：一种用于横向蚀刻半导体衬底上的结构的方法，包括沉积朝向所述结构的底部的保护掩模，并横向蚀刻所述结构的壁以形成凹口或释放所述结构。

4. 发明申请

US20040002223A1 Method for plasma etching of high-K dielectric materials 失效
标题翻译：高K电介质材料等离子体蚀刻方法
公开(公告)号：US20040002223A1
公开(公告)日：2004-01-01
申请号：US10184301
申请日：2002-06-26
申请人： Applied Materials, Inc.
发明人： Padmapani C. Nallan , Ajay Kumar
IPC分类号： H01L021/302 , H01L021/461
CPC分类号： H01L21/31122 , H01L21/28123
摘要： A method of etching high dielectric constant materials (a material with a dielectric constant greater than 4) using a halogen gas, reducing gas, and passivating gas chemistry. An embodiment of the method is accomplished using chlorine, carbon monoxide, and nitrogen to etch and passivate a hafnium dioxide layer.
摘要翻译：使用卤素气体，还原气体和钝化气体化学法蚀刻高介电常数材料（介电常数大于4的材料）的方法。使用氯气，一氧化碳和氮气来实现该方法的一个实施例，以蚀刻和钝化二氧化铪层。

5. 发明申请

US20040173570A1 Method of etching magnetic and ferroelectric materials using a pulsed bias source 失效
标题翻译：使用脉冲偏压源蚀刻磁性和铁电材料的方法
公开(公告)号：US20040173570A1
公开(公告)日：2004-09-09
申请号：US10382964
申请日：2003-03-05
申请人： Applied Materials, Inc.
发明人： Chentsau Ying , Padmapani C. Nallan , Ajay Kumar , Xiaoyi Chen
IPC分类号： C23F001/00 , B44C001/22 , C03C015/00 , C03C025/68
CPC分类号： H01F41/308 , B82Y10/00 , B82Y25/00 , B82Y40/00 , C23F4/00 , H01F41/301 , H01J2237/3348 , H01L21/31122 , H01L21/32136 , H01L27/228 , H01L43/12
摘要： A method for etching magnetic and ferroelectric materials using a pulsed substrate biasing technique (PSBT) that applies a plurality of processing cycles to the substrate, where each cycle comprises a period of plasma etching without substrate bias and a period of plasma etching with the substrate bias. In exemplary applications, the method is used for fabricating magneto-resistive random access memory (MRAM) and ferroelectric random access memory (FeRAM) devices.
摘要翻译：一种使用向基板施加多个处理循环的脉冲衬底偏置技术（PSBT）蚀刻磁性和铁电材料的方法，其中每个循环包括没有衬底偏压的等离子体蚀刻周期和具有衬底偏置的等离子体蚀刻周期。在示例性应用中，该方法用于制造磁阻随机存取存储器（MRAM）和铁电随机存取存储器（FeRAM）器件。

6. 发明申请

US20040097077A1 Method and apparatus for etching a deep trench 审中-公开
标题翻译：蚀刻深沟槽的方法和设备
公开(公告)号：US20040097077A1
公开(公告)日：2004-05-20
申请号：US10298040
申请日：2002-11-15
申请人： Applied Materials, Inc.
发明人： Padmapani C. Nallan , Shu-Ting S. Hsu , Ajay Kumar
IPC分类号： H01L021/302 , H01L021/461
CPC分类号： B81C1/00619 , B81B2203/033 , B81C2201/0112 , H01L21/30655
摘要： A method for plasma etching a trench in a semiconductor substrate using a plurality of processing cycles comprising plasma etch and deposition periods, wherein a substrate bias power is pulsed during the etch periods.
摘要翻译：一种用于使用包括等离子体蚀刻和沉积周期的多个处理循环来等离子体蚀刻半导体衬底中的沟槽的方法，其中衬底偏置功率在蚀刻周期期间被脉冲。

7. 发明申请

US20040043620A1 Method for removing residue from a magneto-resistive random access memory (MRAM) film stack using a dual mask 失效
标题翻译：使用双掩模从磁阻随机存取存储器（MRAM）膜堆中去除残留物的方法
公开(公告)号：US20040043620A1
公开(公告)日：2004-03-04
申请号：US10231675
申请日：2002-08-29
申请人： Applied Materials, Inc.
发明人： Chentsau Ying , Xiaoyi Chen , Padmapani C. Nallan , Ajay Kumar
IPC分类号： H01L021/302 , H01L021/461
CPC分类号： H01L21/02071 , B82Y25/00 , B82Y40/00 , H01F41/308 , H01L21/31138 , H01L21/32136
摘要： A method for removal of residue after plasma etching a film stack comprising a patterned photoresist material layer, a hard mask layer, a conductive layer, and a magnetic layer, wherein the patterned photoresist material layer and the hard mask layer form a dual mask. The method cleans a substrate containing the film stack after the dual mask of the film stack has been etched to remove residue produced during the etching process. The cleaning step is performed in a solution comprising hydrogen peroxide and ammonium hydroxide that removes the residue.
摘要翻译：在等离子体蚀刻包括图案化的光致抗蚀剂材料层，硬掩模层，导电层和磁性层的膜堆叠之后去除残余物的方法，其中图案化的光致抗蚀剂材料层和硬掩模层形成双掩模。该方法在已经蚀刻了膜堆叠的双重掩模以除去在蚀刻过程中产生的残留物之前，清洗含有膜堆叠的基板。清洗步骤在包含去除残余物的过氧化氢和氢氧化铵的溶液中进行。

8. 发明申请

US20040171272A1 Method of etching metallic materials to form a tapered profile 审中-公开
标题翻译：蚀刻金属材料以形成锥形轮廓的方法
公开(公告)号：US20040171272A1
公开(公告)日：2004-09-02
申请号：US10377852
申请日：2003-02-28
申请人： Applied Materials, Inc.
发明人： Guangxiang Jin , Padmapani C. Nallan , Chun Yan , Ajay Kumar
IPC分类号： H01L021/302 , H01L021/461
CPC分类号： H01L21/32136 , C23F4/00 , H01L21/76838 , H01L43/12
摘要： A method of fabricating a structure having a tapered profile using a low temperature plasma etch (LTPE) process. In one embodiment, the LTPE process uses a gas comprising carbon tetrafluoride (CF4), trifluoromethane (CHF3), and nitrogen (N2) to fabricate the structure from a material layer of at least one of tantalum (Ta), tantalum nitride (TaN), and the like.
摘要翻译：使用低温等离子体蚀刻（LTPE）工艺制造具有锥形轮廓的结构的方法。在一个实施方案中，LTPE方法使用包含四氟化碳（CF 4），三氟甲烷（CHF 3）和氮（N 2）的气体，从钽（Ta），氮化钽（TaN），等等。

9. 发明申请

US20040132311A1 Method of etching high-K dielectric materials 审中-公开
标题翻译：蚀刻高K电介质材料的方法
公开(公告)号：US20040132311A1
公开(公告)日：2004-07-08
申请号：US10338250
申请日：2003-01-06
申请人： Applied Materials, Inc.
发明人： Padmapani C. Nallan , Guangxiang Jin , Ajay Kumar
IPC分类号： H01L021/302 , H01L021/461
CPC分类号： H01L21/28194 , H01L21/31122 , H01L29/51 , H01L29/517
摘要： A method of etching a dielectric layer having a dielectric constant that is greater than 4.0 on a semiconductor substrate using a pulsed substrate biasing technique (PSBT) that applies a plurality of processing cycles to the substrate, where each cycle comprises a period of plasma etching without substrate bias and a period of plasma etching with the substrate bias.
摘要翻译：使用向衬底施加多个处理循环的脉冲衬底偏置技术（PSBT）在半导体衬底上蚀刻具有大于4.0的介电常数的电介质层的方法，其中每个周期包括等离子体蚀刻的周期，而没有衬底偏压和等离子体蚀刻的周期。

10. 发明申请

US20040058517A1 Method of fabricating a gate structure of a field effect transistor using an alpha-carbon mask 失效
标题翻译：使用α-碳掩模制造场效应晶体管的栅极结构的方法
公开(公告)号：US20040058517A1
公开(公告)日：2004-03-25
申请号：US10338251
申请日：2003-01-06
申请人： Applied Materials, Inc.
发明人： Padmapani C. Nallan , Ajay Kumar , Guangxiang Jin , Wei Liu
IPC分类号： H01L021/3205 , H01L021/4763 , H01L021/302 , H01L021/461
CPC分类号： H01L21/31144 , H01L21/0273 , H01L21/28123 , H01L21/31122 , H01L21/31138 , H01L21/32137 , H01L21/32139 , Y10S438/945
摘要： A method of fabricating a gate structure of a field effect transistor comprising processes of forming an null-carbon mask and plasma etching a gate electrode and a gate dielectric using the null-carbon mask. In one embodiment, the gate dielectric comprises hafnium dioxide.
摘要翻译：一种制造场效应晶体管的栅极结构的方法，包括使用α-碳掩模形成α-碳掩模和等离子体蚀刻栅电极和栅极电介质的工艺。在一个实施例中，栅极电介质包括二氧化铪。

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