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1. 发明申请

US20220413387A1 LITHOGRAPHY PROCESS WINDOW ENHANCEMENT FOR PHOTORESIST PATTERNING 有权
公开(公告)号：US20220413387A1
公开(公告)日：2022-12-29
申请号：US17898216
申请日：2022-08-29
申请人： Applied Materials, Inc.
发明人： Huixiong DAI , Mangesh Ashok BANGAR , Srinivas D. NEMANI , Christopher S. NGAI , Ellie Y. YIEH
IPC分类号： G03F7/20 , H01L21/027 , G03F7/30 , G03F7/38 , G03F7/16
摘要： A method for enhancing the depth of focus process window during a lithography process includes applying a photoresist layer comprising a photoacid generator on a material layer disposed on a substrate, exposing a first portion of the photoresist layer unprotected by a photomask to light radiation in a lithographic exposure process, providing a thermal energy to the photoresist layer in a post-exposure baking process, applying an electric field or a magnetic field while performing the post-exposure baking process, and dynamically changing a frequency of the electric field as generated while providing the thermal energy to the photoresist layer.

2. 发明申请

US20220390847A1 METAL OXIDE RESIST PATTERNING WITH ELECTRICAL FIELD GUIDED POST-EXPOSURE BAKE 有权
公开(公告)号：US20220390847A1
公开(公告)日：2022-12-08
申请号：US17342176
申请日：2021-06-08
申请人： Applied Materials, Inc.
发明人： Huixiong DAI , Mangesh Ashok BANGAR , Srinivas D. NEMANI , Steven Hiloong WELCH , Ellie Y. YIEH , Dmitry LUBOMIRSKY
IPC分类号： G03F7/11 , G03F7/16 , G03F7/004 , G03F7/38 , G03F7/40 , G03F7/038 , G03F7/32 , C23C16/06
摘要： A method for processing a substrate is described. The method includes forming a metal containing resist layer onto a substrate, patterning the metal containing resist layer, and performing a post exposure bake on the metal containing resist layer. The post exposure bake on the metal containing resist layer is a field guided post exposure bake operation and includes the use of an electric field to guide the ions or charged species within the metal containing resist layer. The field guided post exposure bake operation may be paired with a post development field guided bake operation.

3. 发明申请

US20220326618A1 SYSTEM ARCHITECTURE OF MANUFACTURING OF SEMICONDUCTOR WAFERS 有权
公开(公告)号：US20220326618A1
公开(公告)日：2022-10-13
申请号：US17717856
申请日：2022-04-11
申请人： Applied Materials, Inc.
发明人： Dmitry LUBOMIRSKY , Huixiong DAI , Ellie Y. YIEH
IPC分类号： G03F7/40
摘要： A post lithography resist treatment apparatus for treating a substrate having a resist layer thereon with a fluid layer thereover includes at least one post exposure bake chamber comprising a substrate support having a substrate support surface thereon, and an electrode, the electrode comprising an electrode body having a substrate support facing side, the substrate support facing side having at least one recess extending inwardly thereof, and at least one projection adjacent to the recess having a substrate support facing surface thereon, wherein the substrate support is moveable to position a substrate, when supported thereon, such that an fluid layer disposed on the substrate contacts the substrate support facing surface of the projection but does not fill the recess with fluid, and the substrate facing surface of the electrode body is spaced from the substrate.

4. 发明申请

US20220091513A1 FILM STRUCTURE FOR ELECTRIC FIELD ASSISTED BAKE PROCESS 有权
公开(公告)号：US20220091513A1
公开(公告)日：2022-03-24
申请号：US17025282
申请日：2020-09-18
申请人： Applied Materials, Inc.
发明人： Mangesh Ashok BANGAR , Huixiong DAI , Pinkesh Rohit SHAH , Srinivas D. NEMANI , Christopher S. NGAI , Ellie Y. YIEH
IPC分类号： G03F7/38 , H01L21/027 , H01L21/311 , G03F7/11
摘要： A film structure for an electric field assisted bake process and methods of forming and implementing such a film structure are described herein. An example is a method for semiconductor processing. A photoresist is deposited on an underlayer disposed on a substrate. The underlayer includes carbon. The photoresist is exposed to a pattern of electromagnetic radiation. After exposing the photoresist, an electric field assisted bake is performed on the photoresist.

5. 发明申请

US20210351342A1 SPIN-ORBIT TORQUE MRAM STRUCTURE AND MANUFACTURE THEREOF 有权
公开(公告)号：US20210351342A1
公开(公告)日：2021-11-11
申请号：US16871779
申请日：2020-05-11
申请人： Applied Materials, Inc.
发明人： Minrui YUI , Wenhui WANG , Jaesoo AHN , Jong Mun KIM , Sahil PATEL , Lin XUE , Chando PARK , Mahendra PAKALA , Chentsau Chris YING , Huixiong DAI , Christopher S. Ngai
IPC分类号： H01L43/08 , H01L43/04 , H01L43/14 , H01L43/10 , G11C11/16 , H01L27/22 , G01R33/09
摘要： Embodiments of the present disclosure generally include spin-orbit torque magnetoresistive random-access memory (SOT-MRAM) devices and methods of manufacture thereof. The SOT-MRAM devices described herein include an SOT layer laterally aligned with a magnetic tunnel junction (MTJ) stack and formed over a trench in an interconnect. Thus, the presence of the SOT layer outside the area of the MTJ stack is eliminated, and electric current passes from the interconnect to the SOT layer by SOT-interconnect overlap. The devices and methods described herein reduce the formation of shunting current and enable the MTJ to self-align with the SOT layer in a single etching process.

6. 发明申请

US20200161181A1 METHOD FOR FORMING A LAYER 审中-公开
公开(公告)号：US20200161181A1
公开(公告)日：2020-05-21
申请号：US16669082
申请日：2019-10-30
申请人： Applied Materials, Inc.
发明人： Wenhui WANG , Huixiong DAI , Christopher S. NGAI , Liqi WU , Wenyu ZHANG , Yongmei CHEN , Hao CHEN , Keith Tatseun WONG , Ke CHANG
IPC分类号： H01L21/768 , H01L23/535 , H01L21/033 , H01L21/02
摘要： Implementations of the present disclosure generally relate to the fabrication of integrated circuits, and more particularly, to methods for forming a layer. The layer may be a mask used in lithography process to pattern and form a trench. The mask is formed over a substrate having at least two distinct materials by a selective deposition process. The edges of the mask are disposed on an intermediate layer formed on at least one of the two distinct materials. The method includes removing the intermediate layer to form a gap between edges of the mask and the substrate and filling the gap with a different material than the mask or with the same material as the mask. By filling the gap with the same or different material as the mask, electrical paths are improved.

7. 发明申请

US20180142343A1 METHODS FOR DEPOSITING AMORPHOUS SILICON LAYERS OR SILICON OXYCARBIDE LAYERS VIA PHYSICAL VAPOR DEPOSITION 审中-公开
公开(公告)号：US20180142343A1
公开(公告)日：2018-05-24
申请号：US15814497
申请日：2017-11-16
申请人： APPLIED MATERIALS, INC.
发明人： Weimin ZENG , Yong CAO , Daniel Lee DIEHL , Huixiong DAI , Khoi PHAN , Christopher NGAI , Rongjun WANG , Xianmin TANG
IPC分类号： C23C14/35 , C23C14/22 , C23C14/14 , C23C14/54
CPC分类号： C23C14/35 , C23C14/0057 , C23C14/042 , C23C14/06 , C23C14/14 , C23C14/228 , C23C14/54 , H01J37/34 , H01J2237/332
摘要： In some embodiments, a method of processing a substrate disposed atop a substrate support in a physical vapor deposition process chamber includes: (a) forming a plasma from a process gas within a processing region of the physical vapor deposition chamber, wherein the process gas comprises an inert gas and a hydrogen-containing gas to sputter silicon from a surface of a target within the processing region of the physical vapor deposition chamber; and (b) depositing an amorphous silicon layer atop a first layer on the substrate, wherein adjusting the flow rate of the hydrogen containing gas tunes the optical properties of the deposited amorphous silicon layer.

8. 发明申请

US20160049305A1 METHOD FOR CRITICAL DIMENSION REDUCTION USING CONFORMAL CARBON FILMS 有权
标题翻译：使用一致的碳膜减少关键尺寸的方法
公开(公告)号：US20160049305A1
公开(公告)日：2016-02-18
申请号：US14799374
申请日：2015-07-14
申请人： Applied Materials, Inc.
发明人： Bencherki MEBARKI , Bok Hoen KIM , Deenesh PADHI , Li Yan MIAO , Pramit MANNA , Christopher Dennis BENCHER , Mehul B. NAIK , Huixiong DAI , Christopher S. NGAI , Daniel Lee DIEHL
IPC分类号： H01L21/308 , H01L21/02 , H01L21/027 , H01L21/311
CPC分类号： H01L21/3088 , H01L21/02115 , H01L21/02266 , H01L21/02274 , H01L21/0276 , H01L21/0337 , H01L21/3081 , H01L21/3086 , H01L21/31111 , H01L21/31144
摘要： Embodiments of the disclosure generally provide a method of forming a reduced dimension pattern in a hardmask that is optically matched to an overlying photoresist layer. The method generally comprises of application of a dimension shrinking conformal carbon layer over the field region, sidewalls, and bottom portion of the patterned photoresist and the underlying hardmask at temperatures below the decomposition temperature of the photoresist. The methods and embodiments herein further involve removal of the conformal carbon layer from the bottom portion of the patterned photoresist and the hardmask by an etch process to expose the hardmask, etching the exposed hardmask substrate at the bottom portion, followed by the simultaneous removal of the conformal carbon layer, the photoresist, and other carbonaceous components. A hardmask with reduced dimension features for further pattern transfer is thus yielded.
摘要翻译：本公开的实施例通常提供在与上覆光致抗蚀剂层光学匹配的硬掩模中形成减小尺寸图案的方法。该方法通常包括在低于光致抗蚀剂的分解温度的温度下，在图案化的光致抗蚀剂和下面的硬掩模的场区域，侧壁和底部上施加尺寸收缩的保形碳层。本文的方法和实施例还涉及通过蚀刻工艺从图案化的光致抗蚀剂和硬掩模的底部部分去除保形碳层，以暴露硬掩模，在底部蚀刻暴露的硬掩模基板，随后同时去除保形碳层，光致抗蚀剂等碳质成分。因此产生了用于进一步模式转移的尺寸减小特征的硬掩模。

9. 发明申请

US20160042950A1 MULTI MATERIALS AND SELECTIVE REMOVAL ENABLED RESERVE TONE PROCESS 有权
标题翻译：多种材料和选择性去除启用保留色调过程
公开(公告)号：US20160042950A1
公开(公告)日：2016-02-11
申请号：US14818068
申请日：2015-08-04
申请人： Applied Materials, Inc.
发明人： Huixiong DAI , Christopher S. NGAI
IPC分类号： H01L21/033
CPC分类号： H01L21/0337 , H01L21/0332
摘要： Embodiments described herein generally relate to methods for device patterning. In various embodiments, a plurality of protrusions and gaps are formed on a substrate, and each gap is formed between adjacent protrusions. Each protrusion includes a first line, a second line and a third line. The first and third lines include a first material, and the second lines include a second material that is different from the first material. A fourth line is deposited in each gap and the fourth line includes a third material that is different than the first and second materials. Because the first, second and third materials are different, one or more lines can be removed by selective etching while adjacent lines that are made of a different material may not be covered by a mask. The critical dimensions (CD) and the edge displacement errors (EPE) of the mask are increased.
摘要翻译：本文描述的实施例通常涉及用于器件图案化的方法。在各种实施例中，在基板上形成多个突起和间隙，并且在相邻突起之间形成每个间隙。每个突起包括第一线，第二线和第三线。第一和第三线包括第一材料，第二线包括不同于第一材料的第二材料。第四行沉积在每个间隙中，第四行包括与第一和第二材料不同的第三材料。由于第一，第二和第三材料是不同的，可以通过选择性蚀刻去除一条或多条线，而由不同材料制成的相邻线可能不被掩模覆盖。掩模的临界尺寸（CD）和边缘位移误差（EPE）增加。

10. 发明申请

US20150325411A1 DIRECTIONAL TREATMENT FOR MULTI-DIMENSIONAL DEVICE PROCESSING 审中-公开
标题翻译：多维设备处理的方向处理
公开(公告)号：US20150325411A1
公开(公告)日：2015-11-12
申请号：US14703922
申请日：2015-05-05
申请人： Applied Materials, Inc.
发明人： Ludovic GODET , Huixiong DAI , Srinivas D. NEMANI , Ellie Y. YIEH , Nitin Krishnarao INGLE
IPC分类号： H01J37/32
摘要： Embodiments of the disclosure include apparatus and methods for modifying a surface of a substrate using a surface modification process. The process of modifying a surface of a substrate generally includes the alteration of a physical or chemical property and/or redistribution of a portion of an exposed material on the surface of the substrate by use of one or more energetic particle beams while the substrate is disposed within a particle beam modification apparatus. Embodiments of the disclosure also provide a surface modification process that includes one or more pre-modification processing steps and/or one or more post-modification processing steps that are all performed within one processing system.
摘要翻译：本公开的实施方案包括使用表面改性方法修饰基材的表面的装置和方法。修饰基材的表面的方法通常包括通过使用一种或多种能量粒子束来改变基材表面上暴露的材料的一部分的物理或化学性质和/或再分布，同时衬底被布置在粒子束修改装置内。本公开的实施例还提供了表面修改过程，其包括一个或多个预修改处理步骤和/或一个或多个修改后处理步骤，其全部在一个处理系统内执行。

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