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1. 发明授权

US07739474B2 Method and system for unifying memory access for CPU and IO operations 失效
标题翻译：用于统一CPU和IO操作的内存访问的方法和系统
公开(公告)号：US07739474B2
公开(公告)日：2010-06-15
申请号：US11348805
申请日：2006-02-07
申请人： Antonius Paulus Engbersen , Julian Satran , Edi Shmueli , Thomas Basil Smith, III
发明人： Antonius Paulus Engbersen , Julian Satran , Edi Shmueli , Thomas Basil Smith, III
IPC分类号： G06F9/26
CPC分类号： G06F12/1483
摘要： A system and method for unifying access to a physical memory by operations using virtual addresses of the same virtual address space are provided. The operations may be generated by at least one central processing unit (CPU operations) and/or by at least one IO device (IO operations). The system may include a bus arranged to transfer data and virtual addresses of the same virtual address space from the central processing unit (CPU) and the IO device to a unified memory management unit (UMMU), a unified memory management unit (UMMU) arranged to translate the virtual addresses to physical addresses, and to protect the physical memory from illegal access attempts of the CPU operations and the IO operations. The system may further include a memory controller arranged to manage access to the physical memory. The access is done by using physical addresses.
摘要翻译：提供了通过使用相同虚拟地址空间的虚拟地址的操作来统一访问物理存储器的系统和方法。操作可以由至少一个中央处理单元（CPU操作）和/或至少一个IO设备（IO操作）生成。系统可以包括布置成将来自中央处理单元（CPU）和IO设备的相同虚拟地址空间的数据和虚拟地址传输到统一存储器管理单元（UMMU）的总线，布置在统一存储器管理单元（UMMU）将虚拟地址转换为物理地址，并保护物理内存免受CPU操作和IO操作的非法访问尝试。系统还可以包括布置成管理对物理存储器的访问的存储器控制器。访问通过使用物理地址完成。

2. 发明申请

US20100169494A1 Virtualizing Sockets to Enable the Migration of a System Environment 失效
标题翻译：虚拟化套接字以启用系统环境的迁移
公开(公告)号：US20100169494A1
公开(公告)日：2010-07-01
申请号：US12347339
申请日：2008-12-31
申请人： Zorik Machulsky , Julian Satran , Leah Shalev , Edi Shmueli
发明人： Zorik Machulsky , Julian Satran , Leah Shalev , Edi Shmueli
IPC分类号： G06F15/16
CPC分类号： H04L69/16 , H04L69/162
摘要： Techniques for maintaining connectivity between a remote application stored on a remote device and an application being executed in a system environment, wherein the system environment is migrated from a first device to a second device, are provided. A first connection between the remote application stored on the remote device and the application being executed in the system environment stored on the first device is established via a first communication over a first negotiation channel. The first negotiation channel connects a first socket layer interface linked to the application being executed in the system environment to a second socket layer interface linked to the remote application. The first connection between the remote application and the application being executed in the system environment is disconnected for migration of the system environment from the first device to the second device. Disconnecting the first connection is coordinated via the first negotiation channel. A second connection between the remote application stored on the remote device and an application being executed in the migrated system environment stored on the second device is established via a second communication over a second negotiation channel. The second negotiation channel connects a third socket layer interface linked to the application being executed in the migrated system environment to the second socket layer interface linked to the remote application.
摘要翻译：提供了用于维护存储在远程设备上的远程应用与正在系统环境中执行的应用之间的连接的技术，其中系统环境从第一设备迁移到第二设备。存储在远程设备上的远程应用程序与存储在第一设备上的系统环境中正在执行的应用程序之间的第一连接是经由第一协商信道经由第一通信建立的。第一协商通道将链接到正在系统环境中执行的应用的第一套接字层接口连接到链接到远程应用的第二套接字层接口。在系统环境中正在执行的远程应用程序和应用程序之间的第一个连接被断开，用于将系统环境从第一设备迁移到第二设备。通过第一个协商通道协调断开第一个连接。在第二协商信道上经由第二通信建立存储在远程设备上的远程应用与正在第二设备上存储的迁移系统环境中执行的应用之间的第二连接。第二协商通道将链接到正在被迁移的系统环境中执行的应用的第三套接字层接口连接到链接到远程应用的第二套接字层接口。

3. 发明授权

US07970913B2 Virtualizing sockets to enable the migration of a system environment 失效
标题翻译：虚拟化套接字以实现系统环境的迁移
公开(公告)号：US07970913B2
公开(公告)日：2011-06-28
申请号：US12347339
申请日：2008-12-31
申请人： Zorik Machulsky , Julian Satran , Leah Shalev , Edi Shmueli
发明人： Zorik Machulsky , Julian Satran , Leah Shalev , Edi Shmueli
IPC分类号： G06F15/16
CPC分类号： H04L69/16 , H04L69/162
摘要： Techniques for maintaining connectivity between a remote application stored on a remote device and an application being executed in a system environment, wherein the system environment is migrated from a first device to a second device, are provided. A first connection between the remote application stored on the remote device and the application being executed in the system environment stored on the first device is established via a first communication over a first negotiation channel. The first negotiation channel connects a first socket layer interface linked to the application being executed in the system environment to a second socket layer interface linked to the remote application. The first connection between the remote application and the application being executed in the system environment is disconnected for migration of the system environment from the first device to the second device. Disconnecting the first connection is coordinated via the first negotiation channel. A second connection between the remote application stored on the remote device and an application being executed in the migrated system environment stored on the second device is established via a second communication over a second negotiation channel. The second negotiation channel connects a third socket layer interface linked to the application being executed in the migrated system environment to the second socket layer interface linked to the remote application.
摘要翻译：提供了用于维护存储在远程设备上的远程应用与正在系统环境中执行的应用之间的连接的技术，其中系统环境从第一设备迁移到第二设备。存储在远程设备上的远程应用程序与存储在第一设备上的系统环境中正在执行的应用程序之间的第一连接是经由第一协商信道经由第一通信建立的。第一协商通道将链接到正在系统环境中执行的应用的第一套接字层接口连接到链接到远程应用的第二套接字层接口。在系统环境中正在执行的远程应用程序和应用程序之间的第一个连接被断开，用于将系统环境从第一设备迁移到第二设备。通过第一个协商通道协调断开第一个连接。在第二协商信道上经由第二通信建立存储在远程设备上的远程应用与正在第二设备上存储的迁移系统环境中执行的应用之间的第二连接。第二协商通道将链接到正在被迁移的系统环境中执行的应用的第三套接字层接口连接到链接到远程应用的第二套接字层接口。

4. 发明申请

US20070226450A1 Method and system for unifying memory access for CPU and IO operations 失效
标题翻译：用于统一CPU和IO操作的内存访问的方法和系统
公开(公告)号：US20070226450A1
公开(公告)日：2007-09-27
申请号：US11348805
申请日：2006-02-07
申请人： Antonius Engbersen , Julian Satran , Edi Shmueli , Thomas Smith
发明人： Antonius Engbersen , Julian Satran , Edi Shmueli , Thomas Smith
IPC分类号： G06F12/00
CPC分类号： G06F12/1483
摘要： A system and method for unifying access to a physical memory by operations using virtual addresses of the same virtual address space are provided. The operations may be generated by at least one central processing unit (CPU operations) and/or by at least one IO device (IO operations). The system may include a bus arranged to transfer data and virtual addresses of the same virtual address space from the central processing unit (CPU) and the IO device to a unified memory management unit (UMMU), a unified memory management unit (UMMU) arranged to translate the virtual addresses to physical addresses, and to protect the physical memory from illegal access attempts of the CPU operations and the IO operations. The system may further include a memory controller arranged to manage access to the physical memory. The access is done by using physical addresses.
摘要翻译：提供了通过使用相同虚拟地址空间的虚拟地址的操作来统一访问物理存储器的系统和方法。操作可以由至少一个中央处理单元（CPU操作）和/或至少一个IO设备（IO操作）生成。系统可以包括布置成将来自中央处理单元（CPU）和IO设备的相同虚拟地址空间的数据和虚拟地址传输到统一存储器管理单元（UMMU）的总线，布置在统一存储器管理单元（UMMU）将虚拟地址转换为物理地址，并保护物理内存不受CPU操作和IO操作的非法访问尝试。系统还可以包括布置成管理对物理存储器的访问的存储器控制器。访问通过使用物理地址完成。

5. 发明授权

US09201795B2 Dynamic hierarchical memory cache awareness within a storage system 有权
标题翻译：存储系统内的动态分层内存缓存意识
公开(公告)号：US09201795B2
公开(公告)日：2015-12-01
申请号：US13529726
申请日：2012-06-21
申请人： Binny S. Gill , Haim Helman , Edi Shmueli
发明人： Binny S. Gill , Haim Helman , Edi Shmueli
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F12/0862 , G06F12/0811 , G06F2212/283 , G06F2212/6024 , G06F2212/604 , G06F2212/6046
摘要： A computing device-implemented method for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system is described. Specifically, when performing dynamic read operations within a storage system, a data module evaluates a data prefetch policy according to a strategy of determining if data exists in a hierarchical memory cache and thereafter amending the data prefetch policy, if warranted. The system then uses the data prefetch policy to perform a read operation from the storage device to minimize future data retrievals from the storage device. Further, in a distributed storage environment that include multiple storage nodes cooperating to satisfy data retrieval requests, dynamic hierarchical memory cache awareness can be implemented for every storage node without degrading the overall performance of the distributed storage environment.
摘要翻译：描述了一种用于在存储系统内实现动态分层存储器高速缓存（HMC）感知的计算设备实现的方法。具体地，当在存储系统内执行动态读取操作时，数据模块根据确定数据是否存在于分层存储器高速缓存中的策略来评估数据预取策略，然后如果需要，修改数据预取策略。然后，系统使用数据预取策略来从存储设备执行读取操作，以将来自存储设备的未来数据检索最小化。此外，在包括多个存储节点的分布式存储环境中，为了满足数据检索请求，可以对每个存储节点实现动态分层存储器高速缓存感知，而不会降低分布式存储环境的整体性能。

6. 发明申请

US20080077925A1 Fault Tolerant System for Execution of Parallel Jobs 有权
标题翻译：用于执行并行作业的容错系统
公开(公告)号：US20080077925A1
公开(公告)日：2008-03-27
申请号：US11535083
申请日：2006-09-26
申请人： Yariv Aridor , Tamar Domany , Yevgeny Kliteynik , Edi Shmueli
发明人： Yariv Aridor , Tamar Domany , Yevgeny Kliteynik , Edi Shmueli
IPC分类号： G06F9/46
CPC分类号： G06F9/4843
摘要： The present invention provides a fault tolerant system and method for parallel job execution. In the proposed solution the job state and the state transition control are decoupled. The job execution infrastructure maintains the state information for all the executing jobs, and the job control units, one per-job, control the state transitions of their jobs. Due to the stateless nature of the control units, the system and method allow jobs to continue uninterrupted execution even when the corresponding control units fail.
摘要翻译：本发明提供了用于并行作业执行的容错系统和方法。在提出的解决方案中，作业状态和状态转换控制被解耦。作业执行基础架构维护所有执行作业的状态信息，作业控制单元（每个作业一个）控制其作业的状态转换。由于控制单元的无状态，即使相应的控制单元出现故障，系统和方法也允许作业继续执行不间断的执行。

7. 发明授权

US09201794B2 Dynamic hierarchical memory cache awareness within a storage system 有权
标题翻译：存储系统内的动态分层内存缓存意识
公开(公告)号：US09201794B2
公开(公告)日：2015-12-01
申请号：US13112601
申请日：2011-05-20
申请人： Binny S. Gill , Haim Helman , Edi Shmueli
发明人： Binny S. Gill , Haim Helman , Edi Shmueli
IPC分类号： G06F12/00 , G06F12/08
CPC分类号： G06F12/0862 , G06F12/0811 , G06F2212/283 , G06F2212/6024 , G06F2212/604 , G06F2212/6046
摘要： Described is a system and computer program product for implementing dynamic hierarchical memory cache (HMC) awareness within a storage system. Specifically, when performing dynamic read operations within a storage system, a data module evaluates a data prefetch policy according to a strategy of determining if data exists in a hierarchical memory cache and thereafter amending the data prefetch policy, if warranted. The system then uses the data prefetch policy to perform a read operation from the storage device to minimize future data retrievals from the storage device. Further, in a distributed storage environment that include multiple storage nodes cooperating to satisfy data retrieval requests, dynamic hierarchical memory cache awareness can be implemented for every storage node without degrading the overall performance of the distributed storage environment.
摘要翻译：描述了一种用于在存储系统内实现动态分层存储器高速缓存（HMC）意识的系统和计算机程序产品。具体地，当在存储系统内执行动态读取操作时，数据模块根据确定数据是否存在于分层存储器高速缓存中的策略来评估数据预取策略，然后如果需要，修改数据预取策略。然后，系统使用数据预取策略来从存储设备执行读取操作，以将来自存储设备的未来数据检索最小化。此外，在包括多个存储节点的分布式存储环境中，为了满足数据检索请求，可以对每个存储节点实现动态分层存储器高速缓存感知，而不会降低分布式存储环境的整体性能。

8. 发明授权

US08645619B2 Optimized flash based cache memory 失效
公开(公告)号：US08645619B2
公开(公告)日：2014-02-04
申请号：US13553194
申请日：2012-07-19
申请人： Wendy A. Belluomini , Binny S. Gill , James L. Hafner , Steven R. Hetzler , Eyal Lotern , Venu G. Nayar , Assaf Nitzan , Edi Shmueli , Daniel F. Smith
发明人： Wendy A. Belluomini , Binny S. Gill , James L. Hafner , Steven R. Hetzler , Eyal Lotern , Venu G. Nayar , Assaf Nitzan , Edi Shmueli , Daniel F. Smith
IPC分类号： G06F12/00
CPC分类号： G06F12/0888 , G06F12/0246 , G06F12/0866 , G06F12/0897 , G06F2212/1036 , G06F2212/222
摘要： Embodiments of the invention relate to throttling accesses to a flash memory device. The flash memory device is part of a storage system that includes the flash memory device and a second memory device. The throttling is performed by logic that is external to the flash memory device and includes calculating a throttling factor responsive to an estimated remaining lifespan of the flash memory device. It is determined whether the throttling factor exceeds a threshold. Data is written to the flash memory device in response to determining that the throttling factor does not exceed the threshold. Data is written to the second memory device in response to determining that the throttling factor exceeds the threshold.

9. 发明授权

US08291419B2 Fault tolerant system for execution of parallel jobs 有权
标题翻译：用于执行并行作业的容错系统
公开(公告)号：US08291419B2
公开(公告)日：2012-10-16
申请号：US11535083
申请日：2006-09-26
申请人： Yariv Aridor , Tamar Domany , Yevgeny Kliteynik , Edi Shmueli
发明人： Yariv Aridor , Tamar Domany , Yevgeny Kliteynik , Edi Shmueli
IPC分类号： G06F9/46 , G06F15/16 , G06F15/173 , G06F11/00
CPC分类号： G06F9/4843
摘要： The present invention provides a fault tolerant system and method for parallel job execution. In the proposed solution the job state and the state transition control are decoupled. The job execution infrastructure maintains the state information for all the executing jobs, and the job control units, one per-job, control the state transitions of their jobs. Due to the stateless nature of the control units, the system and method allow jobs to continue uninterrupted execution even when the corresponding control units fail.
摘要翻译：本发明提供了用于并行作业执行的容错系统和方法。在提出的解决方案中，作业状态和状态转换控制被解耦。作业执行基础架构维护所有执行作业的状态信息，作业控制单元（每个作业一个）控制其作业的状态转换。由于控制单元的无状态，即使相应的控制单元出现故障，系统和方法也允许作业继续执行不间断的执行。

10. 发明申请

US20090313413A1 METHOD FOR WIRING ALLOCATION AND SWITCH CONFIGURATION IN A MULTIPROCESSOR ENVIRONMENT 审中-公开
标题翻译：在多处理器环境中配线和开关配置的方法
公开(公告)号：US20090313413A1
公开(公告)日：2009-12-17
申请号：US12137568
申请日：2008-06-12
申请人： Yariv Aridor , Tamar Domany , Eitan Frachtenberg , Yoav Gal , Edi Shmueli , Larry Joseph Stockmeyer , Robert E. Stockmeyer
发明人： Yariv Aridor , Tamar Domany , Eitan Frachtenberg , Yoav Gal , Edi Shmueli , Larry Joseph Stockmeyer , Robert E. Stockmeyer
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： A method for wiring allocation and switch configuration in a multiprocessor computer, the method including employing depth-first tree traversal to determine a plurality of paths among a plurality of processing elements allocated to a job along a plurality of switches and wires in a plurality of D-lines, and selecting one of the paths in accordance with at least one selection criterion.
摘要翻译：一种在多处理器计算机中进行布线分配和切换配置的方法，所述方法包括采用深度优先树遍历来确定沿着多个开关分配给作业的多个处理元件中的多个路径以及多个D中的导线并且根据至少一个选择标准选择一条路径。

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