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    • 1. 发明授权
    • Circuit for dynamic isolation of integrated circuits
    • 用于动态隔离集成电路的电路
    • US5159207A
    • 1992-10-27
    • US618281
    • 1990-11-28
    • Antoine PavlinThierry SicardMarc Simon
    • Antoine PavlinThierry SicardMarc Simon
    • H01L21/761H01L21/822H01L27/02H01L27/04H01L27/08H01L27/088H01L29/78H03K17/081
    • H03K17/08104H01L27/0218H01L27/0251Y10T307/839
    • A dynamic isolation circuit belonging to a monolithic integrated circuit comprising lateral transistors and vertical transistors. The lateral transistors are isolated by an isolating region connected to an isolating potential (V.sub.iso), these lateral transistors being connected up to voltages of a first polarity relative to a reference voltage (GND), the power terminal connected up to the rear face normally being at a potential (V.sub.out) of the first polarity relative to the reference voltage. This circuit comprises a sign-detector (D) for detecting the sign of the potential of the rear face relative to the reference voltage, at least one lateral transistor (S1) to connect the isolating potential to the reference potential when the potential of the rear face is of the first polarity relative to the reference potential, and at least one vertical transistor (S2) to connect the isolating potential to the potential of the rear face when the potential of the rear face is of the second polarity relative to the reference potential.
    • 属于单片集成电路的动态隔离电路,其包括横向晶体管和垂直晶体管。 横向晶体管通过连接到隔离电位(Viso)的隔离区隔离,这些横向晶体管相对于参考电压(GND)连接到第一极性的电压,通常连接到后面的电源端子 处于相对于参考电压的第一极性的电位(Vout)。 该电路包括用于检测背面相对于参考电压的电位的符号的符号检测器(D),至少一个横向晶体管(S1),以在后方的电位将绝缘电位连接到参考电位 面相对于参考电位具有第一极性,以及至少一个垂直晶体管(S2),用于当背面的电位相对于参考电位具有第二极性时,将隔离电位连接到后表面的电位 。
    • 6. 发明授权
    • Stabilized generator for supplying a threshold voltage to a MOS
transistor
    • 用于向MOS晶体管提供阈值电压的稳定发生器
    • US4954728A
    • 1990-09-04
    • US318870
    • 1989-03-06
    • Antoine Pavlin
    • Antoine Pavlin
    • H01L21/8234G05F3/24H01L27/088H03K5/08H03K17/30
    • G05F3/245
    • A stabilized bias generator supplies a threshold voltage to a MOS transistor fabricated on a common integrated circuit device. The bias generator automatically compensates for changes in the threshold voltage of the MOS transistor caused by varying operating parameters, changes in temperature or manufacturing parameters. A first comparator of a matched pair of comparators receives a biasing voltage and includes first and second inputs respectively receiving a variable voltage and a reference voltage. The second comparator of the matched pair has first and second inputs interconnected to receive the reference voltage. One of a pair of matched inverters has in input receiving an output from the first comparator and supplies at an output thereof the threshold voltage and the MOS transistor. The other of the matched pair of inverters is connected to receive an output from the second comparator. A third inverter is connected to receive an output from the second inverter and output the biasing voltage to the MOS transistor and to the first and second comparators. The third inverter is selected to have a threshold voltage substantially equal to the threshold voltage of the MOS transistor.
    • 稳压偏压发生器为制造在公共集成电路器件上的MOS晶体管提供阈值电压。 偏置发生器自动补偿由变化的工作参数,温度变化或制造参数引起的MOS晶体管阈值电压的变化。 匹配的一对比较器的第一比较器接收偏置电压,并且包括分别接收可变电压和参考电压的第一和第二输入。 匹配对的第二比较器具有互连的第一和第二输入以接收参考电压。 一对匹配的反相器之一具有接收来自第一比较器的输出的输入,并在其输出端提供阈值电压和MOS晶体管。 匹配的一对反相器中的另一个被连接以接收来自第二比较器的输出。 连接第三反相器以接收来自第二反相器的输出,并将偏置电压输出到MOS晶体管以及第一和第二比较器。 选择第三反相器具有基本上等于MOS晶体管的阈值电压的阈值电压。