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1. 发明授权

US5668831A Signal processing apparatus and method 失效
标题翻译：信号处理装置及方法
公开(公告)号：US5668831A
公开(公告)日：1997-09-16
申请号：US481107
申请日：1995-06-07
申请人： Anthony Peter J. Claydon , Charles D. MacFarlane , Richard J. Gammack , Anthony Mark Jones , William P. Robbins , Mark Barnes
发明人： Anthony Peter J. Claydon , Charles D. MacFarlane , Richard J. Gammack , Anthony Mark Jones , William P. Robbins , Mark Barnes
IPC分类号： H04N7/26 , H03H17/02 , H03H21/00 , H03K5/24 , H03M3/02 , H03M13/00 , H03M13/15 , H03M13/27 , H04B3/06 , H04L1/00 , H04L7/00 , H04L7/033 , H04L7/04 , H04L25/03 , H04L25/06 , H04L27/00 , H04L27/02 , H04L27/06 , H04L27/227 , H04L27/38 , H04N5/00 , H04N5/21 , H04N5/44 , H04N5/455 , H04N5/52 , H04N7/24 , H04N7/30 , H04N21/2383 , H04N21/438 , H03H7/30
CPC分类号： H04L1/0057 , H03K5/24 , H03M13/15 , H03M13/151 , H03M13/2707 , H03M13/2764 , H04L1/0045 , H04L1/0071 , H04L25/03038 , H04L25/03866 , H04L25/062 , H04L27/02 , H04L27/2273 , H04L27/3809 , H04N5/211 , H04N5/4401 , H04N5/4446 , H04N5/455 , H04N5/52 , H04L2027/0032 , H04L2027/0061 , H04L2027/0067 , H04L2027/0073 , H04L2027/0081 , H04L7/0334
摘要： An integrated digital communication system utilizing multilevel vestigial sideband transmission is provided. The communication system receives a multi-level pulse-amplitude modulated digital signal from a limited bandwidth channel. The system includes processing stages which demodulate, sample and filter the incoming signal prior to recovery of the digital data. Other stages recover the timing and lock on to the frequency and phase of the transmitted signal, as well as provide for automatic gain control. An adaptive equalizer, error correction circuitry, and an output interface recover the digital data and provide for transfer to other devices.
摘要翻译：提供了利用多电平残留边带传输的集成数字通信系统。通信系统从有限带宽信道接收多电平脉冲幅度调制数字信号。该系统包括在恢复数字数据之前对输入信号进行解调，采样和滤波的处理阶段。其他级恢复定时并锁定到发射信号的频率和相位，并提供自动增益控制。自适应均衡器，纠错电路和输出接口恢复数字数据并提供传输到其他设备。

2. 发明授权

US06799246B1 Memory interface for reading/writing data from/to a memory 失效
标题翻译：用于从/向存储器读取/写入数据的存储器接口
公开(公告)号：US06799246B1
公开(公告)日：2004-09-28
申请号：US08991234
申请日：1997-12-16
申请人： Adrian P. Wise , Kevin Douglas Dewar , Anthony Mark Jones , Martin William Sotheran , Colin Smith , Helen Rosemary Finch , Anthony Peter J. Claydon , Donald W. Walker Patterson , Mark Barnes , Andrew Peter Kuligowski , William Philip Robbins , Nicholas Birch , David Andrew Barnes
发明人： Adrian P. Wise , Kevin Douglas Dewar , Anthony Mark Jones , Martin William Sotheran , Colin Smith , Helen Rosemary Finch , Anthony Peter J. Claydon , Donald W. Walker Patterson , Mark Barnes , Andrew Peter Kuligowski , William Philip Robbins , Nicholas Birch , David Andrew Barnes
IPC分类号： G06F1208
CPC分类号： H04N21/4307 , G06F12/0207 , G06F12/04 , G06F13/16 , G06F13/28 , H04N19/13 , H04N19/42 , H04N19/423 , H04N19/61 , H04N19/91 , H04N21/4305 , H04N21/44004
摘要： A memory interface for connecting a bus to memory comprises an input, a buffer, an address input, a generator, and a writer. The input receives a plurality of data words from the bus. The buffer buffers the data words received from the bus. The address input receives from the bus addresses associated with the plurality of data words. The generator generates a series of addresses in the memory into which the buffered data words may be written. The series of addresses are derived from the received addresses. The writer writes the buffered data words into the memory at the generated addresses.
摘要翻译：用于将总线连接到存储器的存储器接口包括输入，缓冲器，地址输入，发生器和写入器。输入从总线接收多个数据字。缓冲器缓冲从总线接收的数据字。地址输入从与多个数据字相关联的总线地址接收。发生器在存储器中产生一系列可以写入缓冲数据字的地址。该地址系列从接收到的地址中导出。写入器将生成的地址将缓冲的数据字写入存储器。

3. 发明授权

US5910960A Signal processing apparatus and method 失效
标题翻译：信号处理装置及方法
公开(公告)号：US5910960A
公开(公告)日：1999-06-08
申请号：US480721
申请日：1995-06-07
申请人： Anthony Peter J. Claydon , Charles D. MacFarlane , Richard J. Gammack , Anthony Mark Jones , William P. Robbins , Mark Barnes
发明人： Anthony Peter J. Claydon , Charles D. MacFarlane , Richard J. Gammack , Anthony Mark Jones , William P. Robbins , Mark Barnes
IPC分类号： H03K5/24 , H03M13/15 , H04L1/00 , H04L25/03 , H04L25/06 , H04L27/02 , H04N5/44 , H03M13/00
CPC分类号： H04L1/0057 , H03K5/24 , H03M13/15 , H03M13/151 , H04L1/0045 , H04L25/03038 , H04L25/03866 , H04L25/062 , H04L27/02 , H04N21/4382 , H04N5/4446 , H04N5/4401
摘要： A CMOS Reed-Solomon decoding circuit calculates syndromes, executes a Berlekamp algorithm, performs a Chien Search, and corrects a delayed version of the received data according to a calculated magnitude of error. The circuit is optimized in terms of chip territory and circuit complexity. Signals are provided to indicate uncorrectable packet errors and other transmission errors.
摘要翻译： CMOS Reed-Solomon解码电路计算校正子，执行Berlekamp算法，执行Chien搜索，并根据计算的误差大小校正接收数据的延迟版本。该电路在芯片领域和电路复杂性方面进行了优化。提供信号以指示不可纠正的分组错误和其他传输错误。

4. 发明授权

US5717715A Signal processing apparatus and method 失效
标题翻译：信号处理装置及方法
公开(公告)号：US5717715A
公开(公告)日：1998-02-10
申请号：US477965
申请日：1995-06-07
申请人： Anthony Peter J. Claydon , Mark Barnes
发明人： Anthony Peter J. Claydon , Mark Barnes
IPC分类号： H04N7/26 , H03H17/02 , H03H21/00 , H03K5/24 , H03M3/02 , H03M13/00 , H03M13/15 , H03M13/27 , H04B3/06 , H04L1/00 , H04L7/00 , H04L7/033 , H04L7/04 , H04L25/03 , H04L25/06 , H04L27/00 , H04L27/02 , H04L27/06 , H04L27/227 , H04L27/38 , H04N5/00 , H04N5/21 , H04N5/44 , H04N5/455 , H04N5/52 , H04N7/24 , H04N7/30 , H04N21/2383 , H04N21/438 , H04B1/38
CPC分类号： H04L1/0057 , H03K5/24 , H03M13/15 , H03M13/151 , H03M13/2707 , H03M13/2764 , H04L1/0045 , H04L1/0071 , H04L25/03038 , H04L25/03866 , H04L25/062 , H04L27/02 , H04L27/2273 , H04L27/3809 , H04N5/211 , H04N5/4401 , H04N5/4446 , H04N5/455 , H04N5/52 , H04L2027/0032 , H04L2027/0061 , H04L2027/0067 , H04L2027/0073 , H04L2027/0081 , H04L7/0334
摘要： An integrated digital communication system utilizing multilevel vestigial sideband transmission is provided. The communication system receives a multi-level pulse-amplitude modulated digital signal from a limited bandwidth channel. The system includes processing stages which demodulate, sample and filter the incoming signal prior to recovery of the digital data. Other stages recover the timing and lock on to the frequency and phase of the transmitted signal, as well as provide for automatic gain control. An adaptive equalizer, error correction circuitry, and an output interface recover the digital data and provide for transfer to other devices.
摘要翻译：提供了利用多电平残留边带传输的集成数字通信系统。通信系统从有限带宽信道接收多电平脉冲幅度调制数字信号。该系统包括在恢复数字数据之前对输入信号进行解调，采样和滤波的处理阶段。其他级恢复定时并锁定到发射信号的频率和相位，并提供自动增益控制。自适应均衡器，纠错电路和输出接口恢复数字数据并提供传输到其他设备。

5. 发明申请

US20060169447A1 Integrated control system for beam pump systems 有权
公开(公告)号：US20060169447A1
公开(公告)日：2006-08-03
申请号：US11386210
申请日：2006-03-22
申请人： Mark Barnes , John Bergmann , Ken Booth , Alan Paine , Mike Guillotte , Gregg Hurst
发明人： Mark Barnes , John Bergmann , Ken Booth , Alan Paine , Mike Guillotte , Gregg Hurst
IPC分类号： E21B43/12
CPC分类号： F04B47/026 , F04B47/02 , F04B49/06 , F04B2201/121
摘要： The present invention generally provides apparatus and methods of operating a pumping system. The pump control apparatus includes a first sensor for measuring strain on a structure of the well pumping system and a second sensor for measuring a position of the structure. The apparatus also has a controller configured to control the well unit by receiving output signals from the first and second sensors and generating control signals according to a motor control sequence. This controller may be mounted to the structure of the pumping system to measure the strain experienced by the structure. The control signals may be transmitted to a motor control panel using a cable-less communications system. Preferably, the first sensor, the second sensor, and the controller are integrated into a single unit. In another embodiment, the pump control apparatus may be self-powered.

6. 发明授权

US5768629A Token-based adaptive video processing arrangement 失效
标题翻译：基于令牌的自适应视频处理布置
公开(公告)号：US5768629A
公开(公告)日：1998-06-16
申请号：US479910
申请日：1995-06-07
申请人： Adrian P. Wise , Kevin D. Dewar , Anthony Mark Jones , Martin William Sotheran , Colin Smith , Helen Rosemary Finch , Anthony Peter John Claydon , Donald William Patterson , Mark Barnes , Andrew Peter Kuligowski , William P. Robbins , Nicholas Birch , David Andrew Barnes
发明人： Adrian P. Wise , Kevin D. Dewar , Anthony Mark Jones , Martin William Sotheran , Colin Smith , Helen Rosemary Finch , Anthony Peter John Claydon , Donald William Patterson , Mark Barnes , Andrew Peter Kuligowski , William P. Robbins , Nicholas Birch , David Andrew Barnes
IPC分类号： H04N5/92 , G06F3/14 , G06F12/00 , G06F12/02 , G06F12/04 , G06F12/06 , G06F12/08 , G06F13/00 , G06F13/16 , G06F13/28 , G06F13/37 , G06T9/00 , G11B7/00 , G11B27/10 , H03M7/30 , H03M7/40 , H03M7/42 , H04L7/00 , H04L7/08 , H04L12/433 , H04N7/26 , H04N7/32 , H04N7/50 , H04N7/52
CPC分类号： H04N21/4307 , G06F12/0207 , G06F13/16 , G06F13/28 , H04N19/42 , H04N19/423 , H04N19/61 , H04N21/4305 , H04N21/44004 , G06F12/04 , H04N19/13 , H04N19/91
摘要： An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.
摘要翻译：一种MPEG视频解压缩方法和装置，利用被布置为流水线处理机的两线接口互连的多个级。控制令牌和数据令牌通过单个双线接口，以承载格式携带控制和数据。令牌解码电路位于某些阶段，用于将某些令牌识别为与该级相关的控制令牌，并沿着管道传递未被识别的控制令牌。重新配置处理电路定位在选定的阶段，并且响应于识别的控制令牌，以重新配置这样的阶段来处理所识别的数据令牌。公开了各种独特的支持子系统电路和处理技术，用于实现系统，包括存储器寻址，使用公共处理块变换数据，时间同步，异步摆动缓冲，存储视频信息，并行霍夫曼解码器等。

7. 发明申请

US20110271307A1 VIDEO DATA STREAM EVALUATION SYSTEMS AND METHODS 审中-公开
标题翻译：视频数据流评估系统和方法
公开(公告)号：US20110271307A1
公开(公告)日：2011-11-03
申请号：US12642607
申请日：2009-12-18
申请人： William Lewis Post , Richard G. Morgan , Paul Robinson , Kevin M. Ferguson , Colin Howard , George W. Tusing , Antoni Caceres , Allan Reid , Mark Barnes
发明人： William Lewis Post , Richard G. Morgan , Paul Robinson , Kevin M. Ferguson , Colin Howard , George W. Tusing , Antoni Caceres , Allan Reid , Mark Barnes
IPC分类号： H04N7/173 , H04N7/20
CPC分类号： H04N21/2402 , H04H20/14 , H04H60/59 , H04N17/004 , H04N19/61 , H04N19/89
摘要： A machine-controlled method of evaluating a video data stream having multiple broadcast channels can include selecting at least two video frames for a particular channel, extracting the selected video frames from the video data stream, decoding the extracted video frames, comparing at least one of the decoded video frames to the other decoded video frame(s) or a previously stored video frame, and preparing an evaluation of the video data stream based on the comparing.
摘要翻译：用于评估具有多个广播频道的视频数据流的机器控制方法可以包括为特定频道选择至少两个视频帧，从视频数据流中提取所选择的视频帧，对所提取的视频帧进行解码，将至少一个解码的视频帧到另一个解码的视频帧或先前存储的视频帧，以及基于该比较准备视频数据流的评估。

8. 发明授权

US07219723B2 Integrated control system for beam pump systems 有权
标题翻译：梁泵系统综合控制系统
公开(公告)号：US07219723B2
公开(公告)日：2007-05-22
申请号：US11386210
申请日：2006-03-22
申请人： Mark Barnes , John C. Bergmann , Ken G. Booth , Alan Paine , Mike Guillotte , Gregg Hurst
发明人： Mark Barnes , John C. Bergmann , Ken G. Booth , Alan Paine , Mike Guillotte , Gregg Hurst
IPC分类号： E21B44/00
CPC分类号： F04B47/026 , F04B47/02 , F04B49/06 , F04B2201/121
摘要： The present invention generally provides apparatus and methods of operating a pumping system. The pump control apparatus includes a first sensor for measuring strain on a structure of the well pumping system and a second sensor for measuring a position of the structure. The apparatus also has a controller configured to control the well unit by receiving output signals from the first and second sensors and generating control signals according to a motor control sequence. This controller may be mounted to the structure of the pumping system to measure the strain experienced by the structure. The control signals may be transmitted to a motor control panel using a cable-less communications system. Preferably, the first sensor, the second sensor, and the controller are integrated into a single unit. In another embodiment, the pump control apparatus may be self-powered.
摘要翻译：本发明通常提供操作泵送系统的装置和方法。泵控制装置包括用于测量井泵系统的结构的应变的第一传感器和用于测量结构位置的第二传感器。该装置还具有控制器，其被配置为通过接收来自第一和第二传感器的输出信号并根据电机控制顺序产生控制信号来控制井单元。该控制器可以安装到泵送系统的结构以测量结构所经历的应变。控制信号可以使用无线通信系统发送到电动机控制面板。优选地，第一传感器，第二传感器和控制器被集成到单个单元中。在另一个实施例中，泵控制装置可以是自供电的。

9. 发明申请

US20120047382A1 Script engine for control of power management controllers 有权
标题翻译：用于控制电源管理控制器的脚本引擎
公开(公告)号：US20120047382A1
公开(公告)日：2012-02-23
申请号：US12807389
申请日：2010-09-03
申请人： Mark Barnes , Chris Hobson
发明人： Mark Barnes , Chris Hobson
IPC分类号： G06F1/32
CPC分类号： G06F1/3203
摘要： A power management IC (PMIC) and methods thereof have been achieved wherein the PMIC invented supports multiple applications while having a high degree of flexibility and allowing a small built and a low power consumption. An embedded script engine on an internal communication bus of the PMIC replaces hard-wired sequencers and control interfaces or using processors as utilized in prior art. The script engine reads instructions from a non-volatile memory as e.g. a one-time programmable (OTP) memory. Furthermore a RAM can be provided to store executable instructions loaded from a host. Moreover a FIFO process is provided if instructions or TAGs are received while a previous script is being exercised. Any type of power supplies, output GPIO or other function could be controlled also by the Script Engine. The invention is also applicable to any other kind of power management circuits.
摘要翻译：已经实现了功率管理IC（PMIC）及其方法，其中发明的PMIC支持多种应用，同时具有高度的灵活性并允许小的内置和低功耗。在PMIC的内部通信总线上的嵌入式脚本引擎替代硬接线的定序器和控制接口或使用现有技术中使用的处理器。脚本引擎从例如非易失性存储器读取指令。一次性可编程（OTP）存储器。此外，可以提供RAM来存储从主机加载的可执行指令。此外，如果在执行以前的脚本时接收到指令或TAG，则提供FIFO处理。脚本引擎也可以控制任何类型的电源，输出GPIO或其他功能。本发明也适用于任何其他种类的电源管理电路。

10. 发明授权

US07784613B2 Reusable windshield pallet 有权
标题翻译：可重复使用的挡风玻璃托盘
公开(公告)号：US07784613B2
公开(公告)日：2010-08-31
申请号：US11857281
申请日：2007-09-18
申请人： Chris Angeletti , Steve Brown , Steve Micheli , Jeff Wester , Mark Clay , Doug Yaw , Dino Lanno , Terrell Bunn , Rich Glover , Joe Rotolo , Mark Barnes , Daniel F. Dufresne , Al Hoag
发明人： Chris Angeletti , Steve Brown , Steve Micheli , Jeff Wester , Mark Clay , Doug Yaw , Dino Lanno , Terrell Bunn , Rich Glover , Joe Rotolo , Mark Barnes , Daniel F. Dufresne , Al Hoag
IPC分类号： B65D85/48
CPC分类号： B65D19/44 , B65D85/48 , B65D2585/6882 , B65G49/062 , Y02W30/807
摘要： A fully collapsible pallet is provided with easily adjustable rear stops, lower rear stops, and side restraints. A telescoping member is provided to allow shipment of partial pallets of windshields. Extensions allow the pallet to be used with windshields of various heights. The pallet is stackable in a folded condition as well as a loaded condition, even when extensions are used. A latch is provided to prevent leaning of the pallet even when the load is not centered in the pallet.
摘要翻译：一个完全可折叠的托盘提供了易于调节的后挡块，下后挡块和侧挡。提供伸缩构件以允许运送挡风玻璃的部分托盘。扩展允许托盘与各种高度的挡风玻璃一起使用。托盘可以在折叠状态以及加载状态下进行堆叠，即使使用扩展。提供闩锁以防止托盘的倾斜，即使当负载不在托盘中心时。

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