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1. 发明授权

US09256550B2 Hybrid address translation 有权
公开(公告)号：US09256550B2
公开(公告)日：2016-02-09
申请号：US13432381
申请日：2012-03-28
申请人： Anthony J. Bybell , Michael K. Gschwind
发明人： Anthony J. Bybell , Michael K. Gschwind
IPC分类号： G06F12/10 , G06F12/02
CPC分类号： G06F12/1027 , G06F12/0292 , G06F12/1018 , G06F12/1036 , G06F2212/1016 , G06F2212/651 , G06F2212/684
摘要： Embodiments of the invention relate to hybrid address translation. An aspect of the invention includes receiving a first address, the first address referencing a location in a first address space. The computer searches a segment lookaside buffer (SLB) for a SLB entry corresponding to the first address; the SLB entry comprising a type field and an address field and determines whether a value of the type field in the SLB entry indicates a hashed page table (HPT) search or a radix tree search. Based on determining that the value of the type field indicates the HPT search, a HPT is searched to determine a second address, the second address comprising a translation of the first address into a second address space; and based on determining that the value of the type field indicates the radix tree search, a radix tree is searched to determine the second address.

2. 发明申请

US20130339653A1 Managing Accessing Page Table Entries 有权
标题翻译：管理访问页表项
公开(公告)号：US20130339653A1
公开(公告)日：2013-12-19
申请号：US13517763
申请日：2012-06-14
申请人： Anthony J. Bybell , Michael K. Gschwind
发明人： Anthony J. Bybell , Michael K. Gschwind
IPC分类号： G06F12/10
CPC分类号： G06F12/1027 , G06F12/1009 , G06F2212/652
摘要： A system for accessing memory locations includes translating, by a processor, a virtual address to locate a first page table entry (PTE) in a page table. The first PTE includes a marker and an address of a page of main storage. It is determined whether a marker is set in the first PTE. The system identifies a large page size of a large page associated with the first PTE based on determining that the marker is set in the first PTE. The large page consists of contiguous pages of main storage. An origin address of the large page is determined based on determining that the marker is set in the first PTE. The virtual address is used to index into the large page at the origin address to access main storage.
摘要翻译：用于访问存储器位置的系统包括由处理器翻译虚拟地址以在页表中定位第一页表项（PTE）。第一个PTE包括主存储页面的标记和地址。确定在第一PTE中是否设置了标记。基于确定标记被设置在第一PTE中，系统识别与第一PTE相关联的大页面的大页面大小。大页面包含主存储的连续页面。基于确定在第一PTE中设置标记来确定大页面的起始地址。虚拟地址用于索引到起始地址的大页面以访问主存储。

3. 发明授权

US09811472B2 Radix table translation of memory 有权
公开(公告)号：US09811472B2
公开(公告)日：2017-11-07
申请号：US13517758
申请日：2012-06-14
申请人： Anthony J. Bybell , Michael K. Gschwind
发明人： Anthony J. Bybell , Michael K. Gschwind
IPC分类号： G06F12/00 , G06F12/1009 , G06F12/1036 , G06F12/1027 , G06F12/1018
CPC分类号： G06F12/1009 , G06F12/1018 , G06F12/1027 , G06F12/1036
摘要： Embodiments relate to managing memory page tables in a processing system. A request to access a desired block of memory is received. The request includes an effective address that includes an effective segment identifier (ESID) and a linear address, the linear address including a most significant portion and a byte index. An entry in a buffer that includes the ESID of the effective address is located. Based on the entry including a radix page table pointer (RPTP), performing: using the RPTP to locate a translation table of a hierarchy of translation tables, using the located translation table to translate the most significant portion of the linear address to obtain an address of a block of memory, and based on the obtained address, performing the requested access to the desired block of memory.

4. 发明授权

US09753860B2 Page table entry consolidation 有权
公开(公告)号：US09753860B2
公开(公告)日：2017-09-05
申请号：US13517738
申请日：2012-06-14
申请人： Anthony J. Bybell , Michael K. Gschwind
发明人： Anthony J. Bybell , Michael K. Gschwind
IPC分类号： G06F12/00 , G06F12/1009 , G06F12/1027
CPC分类号： G06F12/1009 , G06F12/1027 , G06F2212/652 , G06F2212/683
摘要： Embodiments relate to managing page table entries in a processing system. A first page table entry (PTE) of a page table for translating virtual addresses to main storage addresses is identified. The page table includes a second page table entry contiguous with the second page table entry. It is determined whether the first PTE may be joined with the second PTE based on the respective pages of main storage being contiguous. A marker is set in the page table for indicating that the main storage pages identified by the first PTE and second PTEs are contiguous.

5. 发明授权

US09092359B2 Identification and consolidation of page table entries 有权
标题翻译：标识和合并页表项
公开(公告)号：US09092359B2
公开(公告)日：2015-07-28
申请号：US13517763
申请日：2012-06-14
申请人： Anthony J. Bybell , Michael K. Gschwind
发明人： Anthony J. Bybell , Michael K. Gschwind
IPC分类号： G06F12/00 , G06F12/10
CPC分类号： G06F12/1027 , G06F12/1009 , G06F2212/652
摘要： A system for accessing memory locations includes translating, by a processor, a virtual address to locate a first page table entry (PTE) in a page table. The first PTE includes a marker and an address of a page of main storage. It is determined whether a marker is set in the first PTE. The system identifies a large page size of a large page associated with the first PTE based on determining that the marker is set in the first PTE. The large page consists of contiguous pages of main storage. An origin address of the large page is determined based on determining that the marker is set in the first PTE. The virtual address is used to index into the large page at the origin address to access main storage.
摘要翻译：用于访问存储器位置的系统包括由处理器翻译虚拟地址以在页表中定位第一页表项（PTE）。第一个PTE包括主存储页面的标记和地址。确定在第一PTE中是否设置了标记。基于确定标记被设置在第一PTE中，系统识别与第一PTE相关联的大页面的大页面大小。大页面包含主存储的连续页面。基于确定在第一PTE中设置标记来确定大页面的起始地址。虚拟地址用于索引到起始地址的大页面以访问主存储。

6. 发明申请

US20130262817A1 HYBRID ADDRESS TRANSLATION 有权
标题翻译：混合地址翻译
公开(公告)号：US20130262817A1
公开(公告)日：2013-10-03
申请号：US13432381
申请日：2012-03-28
申请人： Anthony J. Bybell , Michael K. Gschwind
发明人： Anthony J. Bybell , Michael K. Gschwind
IPC分类号： G06F12/10
CPC分类号： G06F12/1027 , G06F12/0292 , G06F12/1018 , G06F12/1036 , G06F2212/1016 , G06F2212/651 , G06F2212/684
摘要： Embodiments of the invention relate to hybrid address translation. An aspect of the invention includes receiving a first address, the first address referencing a location in a first address space. The computer searches a segment lookaside buffer (SLB) for a SLB entry corresponding to the first address; the SLB entry comprising a type field and an address field and determines whether a value of the type field in the SLB entry indicates a hashed page table (HPT) search or a radix tree search. Based on determining that the value of the type field indicates the HPT search, a HPT is searched to determine a second address, the second address comprising a translation of the first address into a second address space; and based on determining that the value of the type field indicates the radix tree search, a radix tree is searched to determine the second address.
摘要翻译：本发明的实施例涉及混合地址转换。本发明的一个方面包括接收第一地址，第一地址引用第一地址空间中的位置。计算机搜索段后备缓冲器（SLB）用于对应于第一地址的SLB条目; SLB条目包括类型字段和地址字段，并且确定SLB条目中的类型字段的值是否指示散列页表（HPT）搜索或基数树搜索。基于确定类型字段的值指示HPT搜索，搜索HPT以确定第二地址，第二地址包括将第一地址转换为第二地址空间; 并且基于确定类型字段的值指示基数树搜索，搜索基数树以确定第二地址。

7. 发明申请

US20130339652A1 Radix Table Translation of Memory 有权
标题翻译：记忆基数表翻译
公开(公告)号：US20130339652A1
公开(公告)日：2013-12-19
申请号：US13517758
申请日：2012-06-14
申请人： Anthony J. Bybell , Michael K. Gschwind
发明人： Anthony J. Bybell , Michael K. Gschwind
IPC分类号： G06F12/10
CPC分类号： G06F12/1009 , G06F12/1018 , G06F12/1027 , G06F12/1036
摘要： Embodiments relate to managing memory page tables in a processing system. A request to access a desired block of memory is received. The request includes an effective address that includes an effective segment identifier (ESID) and a linear address, the linear address including a most significant portion and a byte index. An entry in a buffer that includes the ESID of the effective address is located. Based on the entry including a radix page table pointer (RPTP), performing: using the RPTP to locate a translation table of a hierarchy of translation tables, using the located translation table to translate the most significant portion of the linear address to obtain an address of a block of memory, and based on the obtained address, performing the requested access to the desired block of memory.
摘要翻译：实施例涉及在处理系统中管理存储器页表。接收访问所需存储块的请求。该请求包括有效地址，其包括有效段标识符（ESID）和线性地址，线性地址包括最高有效部分和字节索引。位于包含有效地址的ESID的缓冲区中的条目。基于包括基数表指针（RPTP）的条目，执行：使用RPTP来定位转换表的层次结构的转换表，使用定位的转换表来翻译线性地址的最高有效部分以获得地址的存储器块，并且基于获得的地址，执行对期望的存储器块的所请求的访问。

8. 发明申请

US20130339651A1 MANAGING PAGE TABLE ENTRIES 有权
标题翻译：管理页表
公开(公告)号：US20130339651A1
公开(公告)日：2013-12-19
申请号：US13517738
申请日：2012-06-14
申请人： Anthony J. Bybell , Michael K. Gschwind
发明人： Anthony J. Bybell , Michael K. Gschwind
IPC分类号： G06F12/10
CPC分类号： G06F12/1009 , G06F12/1027 , G06F2212/652 , G06F2212/683
摘要： Embodiments relate to managing page table entries in a processing system. A first page table entry (PTE) of a page table for translating virtual addresses to main storage addresses is identified. The page table includes a second page table entry contiguous with the second page table entry. It is determined whether the first PTE may be joined with the second PTE, based on the respective pages of main storage being contiguous. A marker is set in the page table for indicating that the main storage pages identified by the first PTE and second PTEs are contiguous.
摘要翻译：实施例涉及在处理系统中管理页表条目。识别用于将虚拟地址转换到主存储地址的页表的第一页表项（PTE）。页表包括与第二页表条目相邻的第二页表条目。基于主存储器的相应页面是连续的，确定第一PTE是否可以与第二PTE连接。在页表中设置用于指示由第一PTE和第二PTE标识的主存储页是连续的标记。

9. 发明授权

US08751898B2 Utilizing error correcting code data associated with a region of memory 有权
标题翻译：利用与存储器区域相关联的纠错码数据
公开(公告)号：US08751898B2
公开(公告)日：2014-06-10
申请号：US13534053
申请日：2012-06-27
申请人： Anthony J. Bybell
发明人： Anthony J. Bybell
IPC分类号： H03M13/00
CPC分类号： H03M13/095 , G06F11/1012 , H03M13/05
摘要： In a particular embodiment, a processor retrieves from memory, for each data block within the region of the memory, error correcting code (ECC) data corresponding to data stored within the data block. In one embodiment, a processor generates for each retrieved ECC data, a hash value by hashing the retrieved ECC data. In a particular embodiment, a processor combines hash values to generate a total hash value corresponding to a region of memory. In one embodiment, a processor uses a total hash value to compare a region of memory to other regions of the memory.
摘要翻译：在特定实施例中，处理器对存储器区域内的每个数据块从存储器检索对应于存储在数据块内的数据的纠错码（ECC）数据。在一个实施例中，处理器通过散列所检索的ECC数据为每个检索的ECC数据生成哈希值。在特定实施例中，处理器组合哈希值以生成对应于存储器区域的总哈希值。在一个实施例中，处理器使用总的散列值将存储器区域与存储器的其它区域进行比较。

10. 发明授权

US08782380B2 Fine-grained privilege escalation 失效
标题翻译：细粒度特权升级
公开(公告)号：US08782380B2
公开(公告)日：2014-07-15
申请号：US12967085
申请日：2010-12-14
申请人： Anthony J. Bybell , Anup Wadia
发明人： Anthony J. Bybell , Anup Wadia
IPC分类号： G06F9/30
CPC分类号： G06F9/30189 , G06F9/30076 , G06F9/3802 , G06F9/382
摘要： A processor and a method for privilege escalation in a processor are provided. The method may comprise fetching an instruction from a fetch address, where the instruction requires the processor to be in supervisor mode for execution, and determining whether the fetch address is within a predetermined address range. The instruction is filtered through an instruction mask and then it is determined whether the instruction, after being filtered through the mask, equals the value in an instruction value compare register. The processor privilege is raised to supervisor mode for execution of the instruction in response to the fetch address being within the predetermined address range and the filtered instruction equaling the value in the instruction value compare register, wherein the processor privilege is raised to supervisor mode without use of an interrupt. The processor privilege returns to its previous level after execution of the instruction.
摘要翻译：提供了一种用于处理器中的特权升级的处理器和方法。该方法可以包括从获取地址获取指令，其中指令要求处理器处于监控模式以执行，以及确定获取地址是否在预定地址范围内。指令通过指令屏蔽过滤，然后确定在通过掩码滤波后的指令是否等于指令值比较寄存器中的值。处理器特权被提升到管理员模式，以响应于提取地址在预定地址范围内执行指令，并且滤波指令等于指令值比较寄存器中的值，其中处理器特权被提升到管理员模式而不使用的中断。执行指令后，处理器权限返回到上一级。

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