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1. 发明授权

US07713792B2 Fuse structure including monocrystalline semiconductor material layer and gap 有权
标题翻译：保险丝结构包括单晶半导体材料层和间隙
公开(公告)号：US07713792B2
公开(公告)日：2010-05-11
申请号：US11870007
申请日：2007-10-10
申请人： Anil Kumar Chinthakindi , Deok-Kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
发明人： Anil Kumar Chinthakindi , Deok-Kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
IPC分类号： H01L21/02 , H01L29/00
CPC分类号： H01L23/5256 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要： A fuse structure, a method for fabricating the fuse structure and a method for programming a fuse within the fuse structure each use a fuse material layer that is used as a fuse, and located upon a monocrystalline semiconductor material layer in turn located over a substrate. At least part of the monocrystalline semiconductor material layer is separated from the substrate by a gap. Use of the monocrystalline semiconductor material layer, as well as the gap, provides for enhanced uniformity and reproducibility when programming the fuse.
摘要翻译：熔丝结构，制造熔丝结构的方法和用于对熔丝结构内的熔丝进行编程的方法各自使用用作熔丝的熔丝材料层，并且依次位于单晶半导体材料层上而位于衬底上。至少部分单晶半导体材料层通过间隙与衬底分离。单晶半导体材料层的使用以及间隙，在编程保险丝时提供了增强的均匀性和再现性。

2. 发明申请

US20090096059A1 FUSE STRUCTURE INCLUDING MONOCRYSTALLINE SEMICONDUCTOR MATERIAL LAYER AND GAP 有权
标题翻译：保险丝结构，包括单晶半导体材料层和GAP
公开(公告)号：US20090096059A1
公开(公告)日：2009-04-16
申请号：US11870007
申请日：2007-10-10
申请人： Anil Kumar Chinthakindi , Deok-kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
发明人： Anil Kumar Chinthakindi , Deok-kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
IPC分类号： H01L29/00 , H01L21/02
CPC分类号： H01L23/5256 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要： A fuse structure, a method for fabricating the fuse structure and a method for programming a fuse within the fuse structure each use a fuse material layer that is used as a fuse, and located upon a monocrystalline semiconductor material layer in turn located over a substrate. At least part of the monocrystalline semiconductor material layer is separated from the substrate by a gap. Use of the monocrystalline semiconductor material layer, as well as the gap, provides for enhanced uniformity and reproducibility when programming the fuse.
摘要翻译：熔丝结构，制造熔丝结构的方法和用于对熔丝结构内的熔丝进行编程的方法各自使用用作熔丝的熔丝材料层，并且依次位于单晶半导体材料层上而位于衬底上。至少部分单晶半导体材料层通过间隙与衬底分离。单晶半导体材料层的使用以及间隙，在编程保险丝时提供了增强的均匀性和再现性。

3. 发明申请

US20080217658A1 ELECTRICAL ANTIFUSE WITH INTEGRATED SENSOR 有权
标题翻译：集成传感器的电气防护
公开(公告)号：US20080217658A1
公开(公告)日：2008-09-11
申请号：US11683075
申请日：2007-03-07
申请人： Deok-kee Kim , Hoki Kim , Chandrasekharan Kothandaraman , Byeongju Park , John M. Safran
发明人： Deok-kee Kim , Hoki Kim , Chandrasekharan Kothandaraman , Byeongju Park , John M. Safran
IPC分类号： H01L27/10 , H01L29/00
CPC分类号： H01L27/112 , H01L23/5252 , H01L27/101 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： The present invention provides structures for antifuses that utilize electromigration for programming. By providing a portion of antifuse link with high resistance without conducting material and then by inducing electromigration of the conducting material into the antifuse link, the resistance of the antifuse structure is changed. By providing a terminal on the antifuse link, the change in the electrical properties of the antifuse link is detected and sensed. Also disclosed are an integrated antifuse with a built-in sensing device and a two dimensional array of integrated antifuses that can share programming transistors and sensing circuitry.
摘要翻译：本发明提供了利用电迁移进行编程的反熔丝的结构。通过在没有导电材料的情况下提供具有高电阻的一部分反熔丝连接，然后通过将导电材料电迁移到反熔丝连接中，反熔丝结构的电阻改变。通过在反熔丝链路上设置端子，检测和感测反熔丝连接的电特性的变化。还公开了具有内置感测装置的集成反熔丝和可共享编程晶体管和感测电路的集成反熔丝的二维阵列。

4. 发明申请

US20090065761A1 PROGRAMMABLE FUSE/NON-VOLATILE MEMORY STRUCTURES IN BEOL REGIONS USING EXTERNALLY HEATED PHASE CHANGE MATERIAL 有权
标题翻译：使用外部加热相变材料在BEOL区域可编程保险丝/非易失性存储器结构
公开(公告)号：US20090065761A1
公开(公告)日：2009-03-12
申请号：US11850742
申请日：2007-09-06
申请人： Kuang-Neng Chen , Bruce G. Elmegreen , Deok-Kee Kim , Chandrasekharan Kothandaraman , Chung Hon Lam , Lia Krusin-Elbaum , Dennis M. Newns , Byeongju Park , Sampath Purushothaman
发明人： Kuang-Neng Chen , Bruce G. Elmegreen , Deok-Kee Kim , Chandrasekharan Kothandaraman , Chung Hon Lam , Lia Krusin-Elbaum , Dennis M. Newns , Byeongju Park , Sampath Purushothaman
IPC分类号： H01L47/00 , H01L21/82
CPC分类号： H01L23/5256 , H01L27/2436 , H01L45/06 , H01L45/1206 , H01L45/122 , H01L45/1226 , H01L45/1286 , H01L45/1293 , H01L45/144 , H01L45/148 , H01L45/1675 , H01L2924/0002 , H01L2924/00
摘要： A programmable phase change material (PCM) structure includes a heater element formed at a BEOL level of a semiconductor device, the BEOL level including a low-K dielectric material therein; a first via in electrical contact with a first end of the heater element and a second via in electrical contact with a second end of the heater element, thereby defining a programming current path which passes through the first via, the heater element, and the second via; a PCM element disposed above the heater element, the PCM element configured to be programmed between a lower resistance crystalline state and a higher resistance amorphous state through the use of programming currents through the heater element; and a third via in electrical contact with the PCM element, thereby defining a sense current path which passes through the third via, the PCM element, the heater element, and the second via.
摘要翻译：可编程相变材料（PCM）结构包括形成在半导体器件的BEOL级的加热器元件，BEOL级包括其中的低K电介质材料; 与加热器元件的第一端电接触的第一通孔和与加热器元件的第二端电接触的第二通孔，从而限定通过第一通孔，加热元件和第二通孔的编程电流通路通过; 设置在所述加热器元件上方的PCM元件，所述PCM元件被配置为通过使用通过所述加热器元件的编程电流在较低电阻结晶状态和较高电阻非晶态之间被编程; 以及与PCM元件电接触的第三通孔，从而限定穿过第三通孔，PCM元件，加热器元件和第二通孔的感测电流路径。

5. 发明授权

US07732893B2 Electrical fuse structure for higher post-programming resistance 失效
标题翻译：电熔丝结构，具有更高的后编程电阻
公开(公告)号：US07732893B2
公开(公告)日：2010-06-08
申请号：US11683071
申请日：2007-03-07
申请人： Subramanian S. Iyer , Deok-Kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
发明人： Subramanian S. Iyer , Deok-Kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
IPC分类号： H01L29/04 , H01L31/036
CPC分类号： H01L23/5256 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides an electrical fuse structure for achieving a post-programming resistance distribution with higher resistance values and to enhance the reliability of electrical fuse programming. A partly doped electrical fuse structure with undoped semiconductor material in the cathode combined with P-doped semiconductor material in the fuselink and anode is disclosed and the data supporting the superior performance of the disclosed electrical fuse is shown.
摘要翻译：本发明提供一种用于实现具有更高电阻值的后编程电阻分布并提高电熔丝编程的可靠性的电熔丝结构。公开了在阴极中与掺杂了P掺杂的半导体材料结合在阴极中的未掺杂半导体材料的部分掺杂的电熔丝结构，并且示出了所公开的电熔丝的优异性能的数据。

6. 发明授权

US07745855B2 Single crystal fuse on air in bulk silicon 有权
标题翻译：单晶保险丝在散装硅中的空气中
公开(公告)号：US07745855B2
公开(公告)日：2010-06-29
申请号：US11867268
申请日：2007-10-04
申请人： William K. Henson , Deok-Kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
发明人： William K. Henson , Deok-Kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
IPC分类号： H01L27/10
CPC分类号： H01L23/5256 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要： An integrated eFUSE device is formed by forming a silicon “floating beam” on air, whereupon the fusible portion of the eFUSE device resides. This beam extends between two larger, supporting terminal structures. “Undercutting” techniques are employed whereby a structure is formed atop a buried layer, and that buried layer is removed by selective etching. Whereby a “floating” silicide eFUSE conductor is formed on a silicon beam structure. In its initial state, the eFUSE silicide is highly conductive, exhibiting low electrical resistance (the “unblown state of the eFUSE). When a sufficiently large current is passed through the eFUSE conductor, localized heating occurs. This heating causes electromigration of the silicide into the silicon beam (and into surrounding silicon, thereby diffusing the silicide and greatly increasing its electrical resistance. When the current source is removed, the silicide remains permanently in this diffused state, the “blown” state of the eFUSE.
摘要翻译：通过在空气中形成硅“浮动光束”形成集成eFUSE装置，于是eFUSE装置的可熔部分驻留。该梁在两个较大的支撑端子结构之间延伸。采用“底切”技术，由此在掩埋层顶部形成结构，并且通过选择性蚀刻去除掩埋层。由此在硅梁结构上形成“浮动”硅化物eFUSE导体。在其初始状态下，eFUSE硅化物具有高导电性，表现出低电阻（eFUSE的未吹出状态）。当足够大的电流通过eFUSE导体时，发生局部加热。这种加热导致硅化物的电迁移到硅束（并进入周围的硅，从而扩散硅化物，并大大增加其电阻。当电流源被去除时，硅化物永久地保持在这种扩散状态，“吹”状态 eFUSE。

7. 发明授权

US07633079B2 Programmable fuse/non-volatile memory structures in BEOL regions using externally heated phase change material 有权
标题翻译：使用外部加热相变材料的BEOL区域可编程保险丝/非易失性存储器结构
公开(公告)号：US07633079B2
公开(公告)日：2009-12-15
申请号：US11850742
申请日：2007-09-06
申请人： Kuang-Neng Chen , Bruce G. Elmegreen , Deok-Kee Kim , Chandrasekharan Kothandaraman , Lia Krusin-Elbaum , Chung H. Lam , Dennis M. Newns , Byeongju Park , Sampath Purushothaman
发明人： Kuang-Neng Chen , Bruce G. Elmegreen , Deok-Kee Kim , Chandrasekharan Kothandaraman , Lia Krusin-Elbaum , Chung H. Lam , Dennis M. Newns , Byeongju Park , Sampath Purushothaman
IPC分类号： H01L47/00
CPC分类号： H01L23/5256 , H01L27/2436 , H01L45/06 , H01L45/1206 , H01L45/122 , H01L45/1226 , H01L45/1286 , H01L45/1293 , H01L45/144 , H01L45/148 , H01L45/1675 , H01L2924/0002 , H01L2924/00
摘要： A programmable phase change material (PCM) structure includes a heater element formed at a BEOL level of a semiconductor device, the BEOL level including a low-K dielectric material therein; a first via in electrical contact with a first end of the heater element and a second via in electrical contact with a second end of the heater element, thereby defining a programming current path which passes through the first via, the heater element, and the second via; a PCM element disposed above the heater element, the PCM element configured to be programmed between a lower resistance crystalline state and a higher resistance amorphous state through the use of programming currents through the heater element; and a third via in electrical contact with the PCM element, thereby defining a sense current path which passes through the third via, the PCM element, the heater element, and the second via.
摘要翻译：可编程相变材料（PCM）结构包括形成在半导体器件的BEOL级的加热器元件，BEOL级包括其中的低K电介质材料; 与加热器元件的第一端电接触的第一通孔和与加热器元件的第二端电接触的第二通孔，从而限定通过第一通孔，加热元件和第二通孔的编程电流通路通过; 设置在所述加热器元件上方的PCM元件，所述PCM元件被配置为通过使用通过所述加热器元件的编程电流在较低电阻结晶状态和较高电阻非晶态之间被编程; 以及与PCM元件电接触的第三通孔，从而限定穿过第三通孔，PCM元件，加热器元件和第二通孔的感测电流路径。

8. 发明授权

US07714326B2 Electrical antifuse with integrated sensor 有权
标题翻译：集成传感器电气反熔丝
公开(公告)号：US07714326B2
公开(公告)日：2010-05-11
申请号：US11683075
申请日：2007-03-07
申请人： Deok-kee Kim , Hoki Kim , Chandrasekharan Kothandaraman , Byeongju Park , John M. Safran
发明人： Deok-kee Kim , Hoki Kim , Chandrasekharan Kothandaraman , Byeongju Park , John M. Safran
IPC分类号： H01L29/04 , H01H37/76
CPC分类号： H01L27/112 , H01L23/5252 , H01L27/101 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： The present invention provides structures for antifuses that utilize electromigration for programming. By providing a portion of antifuse link with high resistance without conducting material and then by inducing electromigration of the conducting material into the antifuse link, the resistance of the antifuse structure is changed. By providing a terminal on the antifuse link, the change in the electrical properties of the antifuse link is detected and sensed. Also disclosed are an integrated antifuse with a built-in sensing device and a two dimensional array of integrated antifuses that can share programming transistors and sensing circuitry.
摘要翻译：本发明提供了利用电迁移进行编程的反熔丝的结构。通过在没有导电材料的情况下提供具有高电阻的一部分反熔丝连接，然后通过将导电材料电迁移到反熔丝连接中，反熔丝结构的电阻改变。通过在反熔丝链路上设置端子，检测和感测反熔丝连接的电特性的变化。还公开了具有内置感测装置的集成反熔丝和可共享编程晶体管和感测电路的集成反熔丝的二维阵列。

9. 发明申请

US20090090993A1 SINGLE CRYSTAL FUSE ON AIR IN BULK SILICON 有权
标题翻译：单晶硅中的单晶保险丝
公开(公告)号：US20090090993A1
公开(公告)日：2009-04-09
申请号：US11867268
申请日：2007-10-04
申请人： William K. Henson , Deok-Kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
发明人： William K. Henson , Deok-Kee Kim , Chandrasekharan Kothandaraman , Byeongju Park
IPC分类号： H01L29/00 , H01L21/02
CPC分类号： H01L23/5256 , H01L28/20 , H01L2924/0002 , H01L2924/00
摘要： An integrated eFUSE device is formed by forming a silicon “floating beam” on air, whereupon the fusible portion of the eFUSE device resides. This beam extends between two larger, supporting terminal structures. “Undercutting” techniques are employed whereby a structure is formed atop a buried layer, and that buried layer is removed by selective etching. Whereby a “floating” silicide eFUSE conductor is formed on a silicon beam structure. In its initial state, the eFUSE silicide is highly conductive, exhibiting low electrical resistance (the “unblown state of the eFUSE). When a sufficiently large current is passed through the eFUSE conductor, localized heating occurs. This heating causes electromigration of the silicide into the silicon beam (and into surrounding silicon, thereby diffusing the silicide and greatly increasing its electrical resistance. When the current source is removed, the silicide remains permanently in this diffused state, the “blown” state of the eFUSE.
摘要翻译：通过在空气中形成硅“浮动光束”形成集成eFUSE装置，于是eFUSE装置的可熔部分驻留。该梁在两个更大的支撑端子结构之间延伸。采用“底切”技术，由此在掩埋层顶部形成结构，并且通过选择性蚀刻去除掩埋层。由此在硅梁结构上形成“浮动”硅化物eFUSE导体。在初始状态下，eFUSE硅化物具有高导电性，表现出较低的电阻（eFUSE的未吹出状态），当足够大的电流通过eFUSE导体时，发生局部加热，该加热导致硅化物的电迁移（并且进入周围的硅，从而扩散硅化物并大大增加其电阻。当电流源被去除时，硅化物永久地保持在这种扩散状态，eFUSE的“吹”状态。

10. 发明授权

US08163640B2 Metal gate compatible electrical fuse 失效
标题翻译：金属门兼容电保险丝
公开(公告)号：US08163640B2
公开(公告)日：2012-04-24
申请号：US11874385
申请日：2007-10-18
申请人： Xiangdong Chen , Deok-kee Kim , Chandrasekharan Kothandaraman
发明人： Xiangdong Chen , Deok-kee Kim , Chandrasekharan Kothandaraman
IPC分类号： H01L27/06 , H01L21/3205
CPC分类号： H01L27/0617 , H01L23/5256 , H01L29/4238 , H01L2924/0002 , H01L2924/00
摘要： A dielectric material layer is formed on a metal gate layer for a metal gate electrode, and then lithographically patterned to form a dielectric material portion, followed by formation of a polycrystalline semiconductor layer thereupon. A semiconductor device employing a metal gate electrode is formed in a region of the semiconductor substrate containing a vertically abutting stack of the metal gate layer and the polycrystalline semiconductor layer. A material stack in the shape of an electrical fuse is formed in another region of the semiconductor substrate containing a vertical stack of the metal gate layer, the dielectric material portion, and the polycrystalline semiconductor layer. After metallization of the polycrystalline semiconductor layer, an electrical fuse containing a polycrystalline semiconductor portion and a metal semiconductor alloy portion is formed over the dielectric material portion that separates the electrical fuse from the metal gate layer.
摘要翻译：在用于金属栅电极的金属栅极层上形成电介质材料层，然后通过光刻图案形成电介质材料部分，随后在其上形成多晶半导体层。在包含金属栅极层和多晶半导体层的垂直邻接堆叠的半导体基板的区域中形成采用金属栅电极的半导体器件。形成有电熔丝形状的材料堆叠形成在半导体衬底的另一区域中，该区域包含金属栅极层，电介质材料部分和多晶半导体层的垂直叠层。在多晶半导体层的金属化之后，在将电熔丝与金属栅极层分离开的电介质材料部分上形成包含多晶半导体部分和金属半导体合金部分的电熔丝。

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