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2. 发明授权

US5964859A Allocatable post and prefetch buffers for bus bridges 失效
标题翻译：总线桥可分配的后置缓冲区和预取缓冲区
公开(公告)号：US5964859A
公开(公告)日：1999-10-12
申请号：US960819
申请日：1997-10-30
申请人： Andy Steinbach , Scott Swanstrom , Michael Wisor
发明人： Andy Steinbach , Scott Swanstrom , Michael Wisor
IPC分类号： G06F13/40 , G06F13/14
CPC分类号： G06F13/4059
摘要： A computing system and bus bridge in which the bus bridge includes a buffer pool wherein the storage buffers contained in the buffer pool may be allocated as post buffers or fetch buffers in response to appropriate requests from the bus bridge. In the preferred embodiment, the bus bridge includes a buffer pool control unit adapted to temporarily allocate any of the plurality of storage buffers as either a post buffer or a fetch buffer depending upon the system requirements. Broadly speaking, the present invention contemplates a computing system including a first component connected to a first bus, a second component connected to a second bus, and a bus bridge connected to a first and second busses. The bus bridge includes a buffer pool comprised of a plurality of storage buffers and a buffer pool control unit that is capable of temporarily allocating at least one of the storage buffers as either a post buffer or a fetch buffer in response to system requirement. Preferably, each storage buffer includes corresponding tag information for identifying an origin or destination location within a main memory of the data associated with the storage buffer. In one embodiment, each of the plurality of storage buffers includes corresponding allocation information used by the buffer pool control unit for the temporary allocation of the storage buffers. In a presently preferred embodiment, the allocation information includes an available bit indicative of whether the storage buffers available for allocation and a post/fetch bit indicative of whether an unavailable storage buffer is currently allocated as a post buffer or as a fetch buffer. The allocation information is accessible by the buffer pool control unit and is used by the buffer pool control unit for temporarily allocating the storage buffers.
摘要翻译：一种计算系统和总线桥，其中总线桥包括缓冲池，其中响应于来自总线桥的适当请求，缓冲池中包含的存储缓冲器可以被分配为后缓冲器或提取缓冲器。在优选实施例中，总线桥接器包括缓冲池控制单元，其适于根据系统要求将多个存储缓冲器中的任何一个临时分配为后缓冲器或提取缓冲器。广义而言，本发明考虑了一种包括连接到第一总线的第一组件，连接到第二总线的第二组件和连接到第一和第二总线的总线桥的计算系统。总线桥包括由多个存储缓冲器组成的缓冲池和缓冲池控制单元，该缓冲池控制单元能够响应于系统要求将至少一个存储缓冲器分配为后缓冲器或提取缓冲器。优选地，每个存储缓冲器包括用于标识与存储缓冲器相关联的数据的主存储器内的原始位置或目的地位置的相应标签信息。在一个实施例中，多个存储缓冲器中的每一个包括由缓冲池控制单元用于临时分配存储缓冲器的相应分配信息。在当前优选实施例中，分配信息包括指示可用于分配的存储缓冲器的可用位以及指示当前是否将不可用存储缓冲器分配为后缓冲器或作为读取缓冲器的后/取位。分配信息可由缓冲池控制单元访问，并由缓冲池控制单元用于临时分配存储缓冲区。

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