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1. 发明授权

US5101478A I/O structure for information processing system 失效
标题翻译：信息处理系统的I / O结构
公开(公告)号：US5101478A
公开(公告)日：1992-03-31
申请号：US228768
申请日：1988-08-04
申请人： Andrew N. Fu , Tom R. Kibler , James B. MacDonald , Robert C. Nash , Stephen W. Olson , Bhikoo J. Patel , Robert R. Trottier , Kevin T. Mahoney , David L. Whipple , Peter A. Morrison
发明人： Andrew N. Fu , Tom R. Kibler , James B. MacDonald , Robert C. Nash , Stephen W. Olson , Bhikoo J. Patel , Robert R. Trottier , Kevin T. Mahoney , David L. Whipple , Peter A. Morrison
IPC分类号： G06F13/12
CPC分类号： G06F13/126
摘要： An I/O structure for use in a digital data processing system of the type in which system components including a processor and a system memory are connected by a system bus. The I/O structure includes a system bus interface connected to the system bus, a synchronous satellite processing unit (SPU) bus connected to the system bus interface, one or more satellite processing units (SPUs) connected to the SPU bus, and peripheral devices attached to the satellite processing units. Each SPU has three main components: control logic including a microprocessor for controlling the SPU, a device adapter specific to the peripheral device for controlling the peripheral device and transferring data between the peripheral device and the SPU, and an interface unit connected to the control logic and the device adapter for providing I/O communications to the SPU bus and responding to I/O communications on the SPU bus. The I/O communications fall into two classes: communications to SPUs and communications to system components. The communications to SPUs all require a single SPU bus cycle; the communications to system components require one or more cycles. The system bus interface translates communications to system components into communications on the system bus and translates communications on the system bus intended for a SPU into communications to SPUs. The SPU bus includes first lines for carrying an I/O command and an identifier for an SPU involved in the communication and second lines for carrying the contents of the communication. In multicycle communications, the I/O command and identifier remain on the first lines for all cycles, but the information on the second lines varies from cycle to cycle.
摘要翻译：一种用于数字数据处理系统的I / O结构，其中包括处理器和系统存储器在内的系统组件通过系统总线连接。 I / O结构包括连接到系统总线的系统总线接口，连接到系统总线接口的同步卫星处理单元（SPU）总线，连接到SPU总线的一个或多个卫星处理单元（SPU）和外围设备附属于卫星处理单元。每个SPU具有三个主要部分：包括用于控制SPU的微处理器的控制逻辑，用于控制外围设备并在外围设备和SPU之间传送数据的外围设备专用的设备适配器，以及连接到控制逻辑的接口单元以及用于向SPU总线提供I / O通信并响应SPU总线上的I / O通信的设备适配器。 I / O通信分为两类：与SPU的通信和与系统组件的通信。与SPU的通信都需要单个SPU总线周期; 与系统组件的通信需要一个或多个周期。系统总线接口将系统组件的通信转换为系统总线上的通信，并将用于SPU的系统总线上的通信转换为与SPU通信。 SPU总线包括用于承载I / O命令的第一行和用于通信中涉及的SPU的标识符和用于承载通信内容的第二行。在多循环通信中，I / O命令和标识符保留在所有周期的第一行上，但是第二行的信息随周期而不同。

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