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    • 3. 发明授权
    • Ski boot with insert piece
    • 滑雪靴插入片
    • US4958448A
    • 1990-09-25
    • US306948
    • 1989-02-06
    • Andreas Wenzel
    • Andreas Wenzel
    • A43B5/04
    • A43B5/04
    • The ski boot comprises a lower shell (1) with which a rear portion (2) of the shaft and a front portion (3) of the shaft are connected so as to be articulated. The lower shell (1) comprises a cut out portion (7) in the rear in the area which is provided for enclosing the lower leg, an insert piece (8) which is arranged at the rear portion (2) of the shaft being insertable in the cut out portion (7). The inclination position of the rear portion (2) of the shaft, and accordingly the inclination position of the entire shaft, can be determined by means of the cooperation of the flanks (7a, 8a) of the cut out portion (7) and the insert piece (8) which extend in the longitudinal direction of the shaft, which inclination position can be varied by means of insert pieces (8) having different radian measures. A clamping device (10, 11) which, in addition to a heel pull (17, 18), is supported at the lower shell (1) serves to fix this inclination position. The ski boot has a great degree of comfort due to the shaft portion (2), which can be swiveled back, and has athletic characteristics due to the shaft which is adjustable with respect to the inclination position and encloses the lower leg of the wearer.
    • 滑雪靴包括下壳体(1),轴的后部(2)和轴的前部(3)通过该下壳体连接以便铰接。 下壳体(1)包括在用于封闭小腿的区域中的后部的切口部分(7),布置在轴的后部(2)处的插入件(8)可插入 在切口部分(7)中。 轴的后部(2)的倾斜位置以及整个轴的倾斜位置可以通过切口部分(7)的侧面(7a,8a)和切口部分(7)的配合来确定, 插入件(8),其沿轴的纵向方向延伸,该倾斜位置可以通过具有不同弧度度量的插入件(8)来改变。 除了脚跟拉(17,18)之外,在下壳体(1)处支撑的夹紧装置(10,11)用于固定该倾斜位置。 滑雪靴由于可以回转的轴部分(2)而具有很大的舒适度,并且由于可相对于倾斜位置调节的轴并且包围穿着者的小腿具有运动特性。
    • 6. 发明授权
    • Integrated circuit and method for operating the integrated circuit
    • 用于集成电路的集成电路和方法
    • US06873558B2
    • 2005-03-29
    • US10870451
    • 2004-06-15
    • Thomas KunemundAndreas Wenzel
    • Thomas KunemundAndreas Wenzel
    • G06K19/07G06K19/073H03K3/356H04L9/10G11C7/00
    • H03K3/356182G06K19/07G06K19/073H04L9/003
    • An integrated circuit having first connections, a first memory cell, first and second prechargers, and first and second data transmission devices. The first connections have a dual-rail signal applied thereto. The first memory cell is connected to the first connections and buffer-stores the dual-rail signal applied to the first connections. The first precharger precharges first lines, which are connected to the first connections. The first data transmission device, which forwards the dual-rail signal stored in the first memory cell to second connections, which are connected to a second memory cell which transmits the dual-rail signal to the first connections again using the second data transmission device. The second precharger precharges second lines, which are connected to the second connections.
    • 具有第一连接的集成电路,第一存储单元,第一和第二预充电器以及第一和第二数据传输装置。 第一连接具有施加于其上的双轨信号。 第一存储器单元连接到第一连接并且缓冲器存储施加到第一连接的双轨信号。 第一个预充电器对连接到第一个连接的第一个线进行预充电。 第一数据传输装置将存储在第一存储器单元中的双轨信号转发到第二连接,第二数据传输装置连接到第二存储器单元,该第二存储器单元使用第二数据传输装置再次将双轨信号发送到第一连接。 第二预充电器预充电连接到第二连接的第二线。
    • 10. 发明授权
    • Memory device and method for operating a memory device
    • 用于操作存储器件的存储器件和方法
    • US07468931B2
    • 2008-12-23
    • US11458243
    • 2006-07-18
    • Andreas WenzelStefan RupingSteffen M. Sonnekalb
    • Andreas WenzelStefan RupingSteffen M. Sonnekalb
    • G11C8/00
    • G11C8/10
    • A memory arrangement having a memory area with a plurality of memory locations, to which external addresses can be allocated, and an address decoder which is coupled to the memory area and which includes an address input for applying an external address. The address decoder can be switched so that one of the external addresses of an address range is allocated to each memory location of the memory area, or that one of the external addresses of a sub-address range of the address range is allocated to each memory location only within a part-memory area of the memory area. The address decoder is also arranged for identifying the memory location allocated to the external address applied.
    • 一种存储器装置,具有具有可分配外部地址的多个存储器位置的存储区域,以及耦合到该存储器区域并包括用于施加外部地址的地址输入的地址解码器。 可以切换地址解码器,使得地址范围的外部地址之一被分配给存储区域的每个存储器位置,或者地址范围的子地址范围的外部地址之一被分配给每个存储器 位置仅在存储器区域的部分存储器区域内。 地址解码器还被布置用于识别分配给所应用的外部地址的存储器位置。