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1. 发明申请

US20090073013A1 METHOD FOR PERFORMING A DIGITAL TO ANALOG CONVERSION OF A DIGITAL SIGNAL, AND CORRESPONDING ELECTRONIC DEVICE 有权
标题翻译：用于数字数字信号转换的数字方法及相应的电子设备
公开(公告)号：US20090073013A1
公开(公告)日：2009-03-19
申请号：US12208966
申请日：2008-09-11
申请人： Andras Pozsgay , Mounir Boulemnakher , Frederic Paillardet
发明人： Andras Pozsgay , Mounir Boulemnakher , Frederic Paillardet
IPC分类号： H03M1/66
CPC分类号： H03M1/745 , H04L27/36
摘要： A method for processing a digital signal includes an elementary processing including a radiofrequency transposition with a radiofrequency transposition signal and a digital to analog conversion of the transposed digital signal for delivering a radiofrequency analog signal. The digital to analog conversion is controlled by a control signal and a power control signal, the control signal having a frequency twice the frequency of the radiofrequency transposition signal. Each transition of the radiofrequency transposition signal occurs between two consecutive pulses of said control signal.
摘要翻译：用于处理数字信号的方法包括基本处理，其包括具有射频转置信号的射频转置和用于传递射频模拟信号的转置数字信号的数模转换。数模转换由控制信号和功率控制信号控制，控制信号的频率是射频转置信号频率的两倍。射频转置信号的每个转换发生在所述控制信号的两个连续脉冲之间。

2. 发明授权

US07755524B2 Method for performing a digital to analog conversion of a digital signal, and corresponding electronic device 有权
标题翻译：用于执行数字信号的数模转换的方法及相应的电子设备
公开(公告)号：US07755524B2
公开(公告)日：2010-07-13
申请号：US12208966
申请日：2008-09-11
申请人： Andras Pozsgay , Mounir Boulemnakher , Frédéric Paillardet
发明人： Andras Pozsgay , Mounir Boulemnakher , Frédéric Paillardet
IPC分类号： H03M3/00 , H03M1/66 , H04L27/00
CPC分类号： H03M1/745 , H04L27/36
摘要： A method for processing a digital signal includes an elementary processing including a radiofrequency transposition with a radiofrequency transposition signal and a digital to analog conversion of the transposed digital signal for delivering a radiofrequency analog signal. The digital to analog conversion is controlled by a control signal and a power control signal, the control signal having a frequency twice the frequency of the radiofrequency transposition signal. Each transition of the radiofrequency transposition signal occurs between two consecutive pulses of said control signal.
摘要翻译：用于处理数字信号的方法包括基本处理，其包括具有射频转置信号的射频转置和用于传递射频模拟信号的转置数字信号的数模转换。数模转换由控制信号和功率控制信号控制，控制信号的频率是射频转置信号频率的两倍。射频转置信号的每个转换发生在所述控制信号的两个连续脉冲之间。

3. 发明申请

US20090082006A1 METHOD FOR NOTCH FILTERING A DIGITAL SIGNAL, AND CORRESPONDING ELECTRONIC DEVICE 有权
标题翻译：用于对数字信号进行过滤的方法和相应的电子设备
公开(公告)号：US20090082006A1
公开(公告)日：2009-03-26
申请号：US12208921
申请日：2008-09-11
申请人： Andras Pozsgay , Frederic Paillardet
发明人： Andras Pozsgay , Frederic Paillardet
IPC分类号： H04W99/00
CPC分类号： H03H17/025 , H03M3/504
摘要： An electronic device, includes sigma-delta modulation circuit to operate with a clock signal and having output circuitry to deliver a digital data signal. First circuitry delivers a radiofrequency transposition signal. A notch filter includes radiofrequency digital-to-analog conversion blocks, having first input circuitry coupled to the output circuitry. Second input circuitry receives the radiofrequency transposition signal. Second output circuitry delivers a radiofrequency analog signal. Digital delay circuitry is controlled by the clock signal and includes a delay block between the two first input circuits. The frequency of a notch of the notch filter is related to the value of the delay from the delay block. Summation circuitry sums the radiofrequency signals.
摘要翻译：电子设备包括用时钟信号操作并具有输出电路以输送数字数据信号的Σ-Δ调制电路。第一个电路传送一个射频转置信号。陷波滤波器包括射频数模转换块，其具有耦合到输出电路的第一输入电路。第二输入电路接收射频转置信号。第二输出电路提供射频模拟信号。数字延迟电路由时钟信号控制，并且包括两个第一输入电路之间的延迟块。陷波滤波器的陷波的频率与延迟块的延迟值有关。求和电路对射频信号进行求和。

4. 发明授权

US08165549B2 Method for notch filtering a digital signal, and corresponding electronic device 有权
标题翻译：数字信号陷波滤波方法及相应的电子设备
公开(公告)号：US08165549B2
公开(公告)日：2012-04-24
申请号：US12208921
申请日：2008-09-11
申请人： Andras Pozsgay , Frédéric Paillardet
发明人： Andras Pozsgay , Frédéric Paillardet
IPC分类号： H04B1/06 , H03M1/66 , H04L27/00
CPC分类号： H03H17/025 , H03M3/504
摘要： An electronic device, includes sigma-delta modulation circuit to operate with a clock signal and having output circuitry to deliver a digital data signal. First circuitry delivers a radiofrequency transposition signal. A notch filter includes radiofrequency digital-to-analog conversion blocks, having first input circuitry coupled to the output circuitry. Second input circuitry receives the radiofrequency transposition signal. Second output circuitry delivers a radiofrequency analog signal. Digital delay circuitry is controlled by the clock signal and includes a delay block between the two first input circuits. The frequency of a notch of the notch filter is related to the value of the delay from the delay block. Summation circuitry sums the radiofrequency signals.
摘要翻译：电子设备包括用时钟信号操作并具有输出电路以输送数字数据信号的Σ-Δ调制电路。第一个电路传送一个射频转置信号。陷波滤波器包括射频数模转换块，其具有耦合到输出电路的第一输入电路。第二输入电路接收射频转置信号。第二输出电路提供射频模拟信号。数字延迟电路由时钟信号控制，并且包括两个第一输入电路之间的延迟块。陷波滤波器的陷波的频率与延迟块的延迟值有关。求和电路对射频信号进行求和。

5. 发明授权

US09306082B2 System for managing and controlling photovoltaic panels 有权
标题翻译：光伏面板管理和控制系统
公开(公告)号：US09306082B2
公开(公告)日：2016-04-05
申请号：US13520147
申请日：2011-01-10
申请人： Andras Pozsgay
发明人： Andras Pozsgay
IPC分类号： H02J1/00 , H01L31/02
CPC分类号： H01L31/02021 , Y02E10/50 , Y10T307/865
摘要： The invention relates to a module for locally controlling a photovoltaic panel that includes: first and second terminals (B1, B2) for connecting in series by a single conductor (13) having homologous modules; a first terminal (A1) for connecting the photovoltaic panel, said first terminal being connected to the first terminal (B1) for connecting in series; a switcher (S) that is connected between the second terminal (B2) for connecting in series and a second terminal (A2) connecting the panel; a diode (D0) that is connected between the first and second terminals (B1, B2) for connecting in series; a converter (70) that is provided so as to supply power to the module on the basis of the voltage that is developed by the panel between the first and second terminals (A1, A2) connecting the panel; a sensor (R3) for measuring the current flowing within the single conductor (13); and a means (60, 62) for closing the switcher when the current flowing within the single conductor exceeds a threshold.
摘要翻译：本发明涉及用于本地控制光伏面板的模块，其包括：用于通过具有同源模块的单个导体（13）串联连接的第一和第二端子（B1，B2）用于连接光伏面板的第一端子（A1），所述第一端子连接到用于串联连接的第一端子（B1）; 连接在用于串联连接的第二端子（B2）和连接面板的第二端子（A2）之间的切换器（S）连接在第一和第二端子（B1，B2）之间用于串联连接的二极管（D0）; 转换器（70），其被设置为基于由连接面板的第一和第二端子（A1，A2）之间的面板显影的电压向模块供电; 传感器（R3），用于测量在单个导体（13）内流动的电流; 以及当在单个导体内流动的电流超过阈值时关闭切换器的装置（60,62）。

6. 发明授权

US08203475B2 Parallel mash ΔΣ modulator 有权
标题翻译：平行捣碎机调制器
公开(公告)号：US08203475B2
公开(公告)日：2012-06-19
申请号：US12785895
申请日：2010-05-24
申请人： Razak Hossain , Andras Pozsgay
发明人： Razak Hossain , Andras Pozsgay
IPC分类号： H03M3/00
CPC分类号： H03M7/302
摘要： A parallel, multi-stage noise shaping (MASH) delta-sigma (ΔΣ) modulator reduces the required operating frequency by predicting the inputs to later stages of a serial MASH modulator to be multiples of the MASH input. An Nth order parallel MASH ΔΣ modulator generates N outputs (one from each stage) in a single modulator cycle. Accordingly, the Nth order parallel MASH ΔΣ modulator may be operated at 1/N the frequency of a corresponding prior art Nth order serial MASH ΔΣ modulator.
摘要翻译：并行多级噪声整形（MASH）delta-sigma（＆Dgr＆amp; Sgr）调制器通过将串行MASH调制器的后级的输入预测为MASH输入的倍数来降低所需的工作频率。第N级并行MASH＆Dgr;＆Sgr; 调制器在单个调制器周期中产生N个输出（每个阶段一个）。因此，第N阶并行MASH＆Dgr＆调制器可以以相应的现有技术N阶序列MASH＆Dgr＆amp; Sgr的频率的1 / N操作。调制器。

7. 发明申请

US20110285565A1 PARALLEL MASH DELTA SIGMA MODULATOR 有权
标题翻译：并行MASH DELTA SIGMA调制器
公开(公告)号：US20110285565A1
公开(公告)日：2011-11-24
申请号：US12785895
申请日：2010-05-24
申请人： Razak Hossain , Andras Pozsgay
发明人： Razak Hossain , Andras Pozsgay
IPC分类号： H03M3/00
CPC分类号： H03M7/302
摘要： A parallel, multi-stage noise shaping (MASH) delta-sigma (ΔΣ) modulator reduces the required operating frequency by predicting the inputs to later stages of a serial MASH modulator to be multiples of the MASH input. An Nth order parallel MASH ΔΣ modulator generates N outputs (one from each stage) in a single modulator cycle. Accordingly, the Nth order parallel MASH ΔΣ modulator may be operated at 1/N the frequency of a corresponding prior art Nth order serial MASH ΔΣ modulator.
摘要翻译：并行多级噪声整形（MASH）delta-sigma（＆Dgr＆amp; Sgr）调制器通过将串行MASH调制器的后级的输入预测为MASH输入的倍数来降低所需的工作频率。第N级并行MASH＆Dgr;＆Sgr; 调制器在单个调制器周期中产生N个输出（每个阶段一个）。因此，第N阶并行MASH＆Dgr＆调制器可以以相应的现有技术N阶序列MASH＆Dgr＆amp; Sgr的频率的1 / N操作。调制器。

8. 发明申请

US20060258314A1 METHOD AND DEVICE FOR GENERATING TWO SIGNALS IN PHASE QUADRATURE FOR A FREQUENCY TRANSPOSITION IN A CELLULAR MOBILE TELEPHONE 有权
标题翻译：用于在细胞移动电话中进行频率传输的相位中产生两个信号的方法和装置
公开(公告)号：US20060258314A1
公开(公告)日：2006-11-16
申请号：US11382553
申请日：2006-05-10
申请人： Andras Pozsgay
发明人： Andras Pozsgay
IPC分类号： H04B7/00 , H04B1/06 , H04B1/26
CPC分类号： H03C3/40
摘要： The method and device include the generation of two output signals (IRF, QRF) in phase quadrature, having a frequency spectrum including a dominant harmonic at a wanted frequency FC. The generation of a periodic basic signal (VP) having a frequency FOSC equal to the product of R and the desired frequency FC is included, R being a non-integer rational number greater than one and equal to a ratio p/q, in which p is an integer multiple of 4 and q an odd integer. Also included is a processing of the basic signal including, for example, at least a preprocessing having a frequency division by p with elimination of the even harmonics and a frequency multiplication by q.
摘要翻译：该方法和装置包括产生相位正交的两个输出信号（I SUB RF，Q RF），具有包括所需频率F < SUB> C 。具有等于R乘积和期望频率F C C的频率F OSC等于周期性基本信号（V SUB）的周期性的产生是包括，R是大于1并且等于p / q的非整数有理数，其中p是4的整数倍，q是奇整数。还包括基本信号的处理，包括例如至少具有除以均匀谐波的p分频的预处理和乘以q的倍频。

9. 发明申请

US20120306289A1 SYSTEM FOR MANAGING AND CONTROLLING PHOTOVOLTAIC PANELS 有权
标题翻译：用于管理和控制光伏面板的系统
公开(公告)号：US20120306289A1
公开(公告)日：2012-12-06
申请号：US13520147
申请日：2011-01-10
申请人： Andras Pozsgay
发明人： Andras Pozsgay
IPC分类号： H01H47/00
CPC分类号： H01L31/02021 , Y02E10/50 , Y10T307/865
摘要： The invention relates to a module for locally controlling a photovoltaic panel that includes: first and second terminals (B1, B2) for connecting in series by a single conductor (13) having homologous modules; a first terminal (A1) for connecting the photovoltaic panel, said first terminal being connected to the first terminal (B1) for connecting in series; a switcher (S) that is connected between the second terminal (B2) for connecting in series and a second terminal (A2) connecting the panel; a diode (D0) that is connected between the first and second terminals (B1, B2) for connecting in series; a converter (70) that is provided so as to supply power to the module on the basis of the voltage that is developed by the panel between the first and second terminals (A1, A2) connecting the panel; a sensor (R3) for measuring the current flowing within the single conductor (13); and a means (60, 62) for closing the switcher when the current flowing within the single conductor exceeds a threshold.
摘要翻译：本发明涉及用于本地控制光伏面板的模块，其包括：用于通过具有同源模块的单个导体（13）串联连接的第一和第二端子（B1，B2）用于连接光伏面板的第一端子（A1），所述第一端子连接到用于串联连接的第一端子（B1）; 连接在用于串联连接的第二端子（B2）和连接面板的第二端子（A2）之间的切换器（S）连接在第一和第二端子（B1，B2）之间用于串联连接的二极管（D0）; 转换器（70），其被设置为基于由连接面板的第一和第二端子（A1，A2）之间的面板显影的电压向模块供电; 传感器（R3），用于测量在单个导体（13）内流动的电流; 以及当在单个导体内流动的电流超过阈值时关闭切换器的装置（60,62）。

10. 发明授权

US07567789B2 Method and device for generating two signals in phase quadrature for a frequency transposition in a cellular mobile telephone 有权
标题翻译：用于在蜂窝移动电话中产生频移的相位正交中的两个信号的方法和装置
公开(公告)号：US07567789B2
公开(公告)日：2009-07-28
申请号：US11382553
申请日：2006-05-10
申请人： Andras Pozsgay
发明人： Andras Pozsgay
IPC分类号： H04B7/00 , H04B1/00
CPC分类号： H03C3/40
摘要： The method and device include the generation of two output signals (IRF, QRF) in phase quadrature, having a frequency spectrum including a dominant harmonic at a wanted frequency FC. The generation of a periodic basic signal (VP) having a frequency FOSC equal to the product of R and the desired frequency FC is included, R being a non-integer rational number greater than one and equal to a ratio p/q, in which p is an integer multiple of 4 and q an odd integer. Also included is a processing of the basic signal including, for example, at least a preprocessing having a frequency division by p with elimination of the even harmonics and a frequency multiplication by q.
摘要翻译：该方法和装置包括在相位正交中产生两个输出信号（IRF，QRF），具有包括所需频率FC的主要谐波的频谱。包括具有等于R的乘积的频率FOSC和期望频率FC的周期性基本信号（VP）的生成，R是大于1并且等于比率p / q的非整数有理数，其中 p是4的整数倍，q是奇整数。还包括基本信号的处理，包括例如至少具有除以均匀谐波的p分频的预处理和乘以q的倍频。

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