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1. 发明申请

US20080276563A1 Stud attachment clip 审中-公开
标题翻译：螺柱附件夹
公开(公告)号：US20080276563A1
公开(公告)日：2008-11-13
申请号：US11803084
申请日：2007-05-11
申请人： Anatoly Gosis , Robert G. Kobetsky , Yury Shkolnikov , George M. Velan , Mark Bauer , Matthew Davis , Anthony Caringella
发明人： Anatoly Gosis , Robert G. Kobetsky , Yury Shkolnikov , George M. Velan , Mark Bauer , Matthew Davis , Anthony Caringella
IPC分类号： E04B1/38
CPC分类号： E04B2/767 , F16B7/0486
摘要： A stud attachment clip for attaching a metal stud to a metal track includes a mounting portion configured for mounting on the metal track and an attaching portion connected to the mounting portion and configured to hold the stud in place.
摘要翻译：用于将金属螺柱附接到金属轨道的螺柱附接夹具包括构造成用于安装在金属轨道上的安装部分和连接到安装部分并被配置为将螺柱保持在适当位置的安装部分。

2. 发明授权

US08498124B1 Magnetic circuit board stacking component 有权
标题翻译：磁电路板堆叠组件
公开(公告)号：US08498124B1
公开(公告)日：2013-07-30
申请号：US12634852
申请日：2009-12-10
申请人： Donald Folker , Mark Bauer , Travis Berry , Mike LeBlanc
发明人： Donald Folker , Mark Bauer , Travis Berry , Mike LeBlanc
IPC分类号： H05K1/14
CPC分类号： H05K1/145 , H01F27/06 , H01F27/325 , H01F2027/065 , H05K1/0233 , H05K1/144 , H05K3/3447 , H05K2201/042 , H05K2201/1003
摘要： A magnetic component provides both electrical interconnectivity and mechanical support between stacked circuit boards. The magnetic component includes a bobbin structure and a magnetically permeable core. The bobbin structure includes an upper bobbin pin rail and a lower bobbin pin rail. The upper bobbin pin rail includes one or more upper bobbin pins extending from the upper bobbin pin rail. Each upper bobbin pin may be adapted for soldering onto a first circuit board. At least one lower bobbin pin extends from the lower bobbin pin rail. Each lower bobbin pin may also be adapted for soldering onto a second circuit board, forming a circuit board assembly. Each soldered connection between a bobbin pin and a circuit board may provide an electrical connection between the circuit board and the magnetic component. Each soldered connection may also provide a mechanical attachment between a printed circuit board and the magnetic component. A conductive coil is positioned on the bobbin structure and may be connected to an upper or lower bobbin pin. The core is positioned near the conductive coil for providing an electrical connection between the circuit boards through magnetic coupling.
摘要翻译：磁性部件提供堆叠电路板之间的电互连和机械支撑。磁性部件包括线轴结构和磁导芯。线轴结构包括上梭芯导轨和下梭芯导轨。上梭销导轨包括从上筒管销导轨延伸的一个或多个上筒管销。每个上筒管可以适于焊接到第一电路板上。至少一个下梭骨销从下梭芯导轨延伸。每个下筒管也可以适于焊接到第二电路板上，形成电路板组件。梭芯和电路板之间的每个焊接连接可以在电路板和磁性部件之间提供电连接。每个焊接连接也可以在印刷电路板和磁性部件之间提供机械连接。导线圈位于线轴结构上，并可连接到上或下梭芯。芯线位于导电线圈附近，用于通过磁耦合在电路板之间提供电连接。

3. 发明申请

US20110183685A1 MULTI-BAND RADIO FREQUENCY DETECTION AND LOCATION SYSTEM 有权
标题翻译：多频无线电频率检测和位置系统
公开(公告)号：US20110183685A1
公开(公告)日：2011-07-28
申请号：US13009834
申请日：2011-01-19
申请人： Mitch Burton , Mark Wilson , Mark Bauer , Tim Thompson , Osvaldo Diaz
发明人： Mitch Burton , Mark Wilson , Mark Bauer , Tim Thompson , Osvaldo Diaz
IPC分类号： H04W24/00
CPC分类号： G06F21/316 , G06F21/552 , G06F2221/2111 , G06F2221/2129 , G06F2221/2151 , H04L63/0263 , H04L67/18 , H04W12/08
摘要： A method is provided that comprises: providing a rules storage that provides one or more rules to determine authorized wireless device usage at a site; using a wireless communications sensor system to determine use of a wireless device at the at the site; and using the one or more rules to determine whether the determined use of wireless device use is authorized.
摘要翻译：提供了一种方法，其包括：提供规则存储器，其提供一个或多个规则以确定站点处的授权无线设备使用; 使用无线通信传感器系统来确定在现场的无线设备的使用; 以及使用一个或多个规则来确定确定的无线设备使用是否被授权。

4. 发明申请

US20110069548A1 DATA PATH FOR MULTI-LEVEL CELL MEMORY, METHODS FOR STORING AND METHODS FOR UTILIZING A MEMORY ARRAY 有权
标题翻译：用于多级细胞存储器的数据路径，用于存储的方法和使用存储器阵列的方法
公开(公告)号：US20110069548A1
公开(公告)日：2011-03-24
申请号：US12956977
申请日：2010-11-30
申请人： Mark Bauer
发明人： Mark Bauer
IPC分类号： G11C16/04
CPC分类号： G11C16/10 , G11C11/56 , G11C11/5628 , G11C11/5642 , G11C16/06 , G11C2211/5641
摘要： Memories, data paths, methods for storing, and methods for utilizing are disclosed, including a data path for a memory using multi-level memory cells to provide storage of multiple bits per memory cell. One such data path includes a bit mapping circuit and a data converter circuit. Such a bit mapping circuit can be configured to map bits of the original data to an intermediate arrangement of bits and such a data converter circuit can be configured to receive the intermediate arrangement of bits and convert the intermediate arrangement of bits into intermediate data corresponding to a memory state to be stored by memory cells of a memory cell array.
摘要翻译：公开了存储器，数据路径，存储方法和利用方法，包括使用多级存储单元的存储器的数据路径，以提供每存储器单元多位的存储。一个这样的数据路径包括位映射电路和数据转换器电路。这样的位映射电路可以被配置为将原始数据的位映射到位的中间排列，并且这样的数据转换器电路可以被配置为接收位的中间排列，并将位的中间排列转换成对应于由存储单元阵列的存储单元存储的存储器状态。

5. 发明授权

US07737269B2 Process for preparing an alpha-lipoic acid/cyclodextrin complex and product prepared 有权
标题翻译：制备α-硫辛酸/环糊精复合物的方法和制备的产物
公开(公告)号：US07737269B2
公开(公告)日：2010-06-15
申请号：US11302810
申请日：2005-12-14
申请人： Helmut Reuscher , Mark Bauer
发明人： Helmut Reuscher , Mark Bauer
IPC分类号： C08B37/16 , C07D327/00 , C07D331/00 , C07D333/00 , C07D335/00 , C07D337/00 , C07D341/00 , C07D343/00 , C07D409/00 , C07D411/00 , C07D495/00 , C07D497/00
CPC分类号： A61K31/385 , A61K31/724 , A61K47/6951 , B82Y5/00
摘要： The invention relates to a process for the preparation of a cyclodextrin/alpha-lipoic acid complex, wherein in a first step, an alpha-lipoic acid and a cyclodextrin are dissolved in an aqueous alkaline solution having a pH above pH 7, and in a second step an acid is added to lower the pH of the solution to a pH below pH 7.
摘要翻译：本发明涉及一种制备环糊精/α-硫辛酸络合物的方法，其中在第一步中将α-硫辛酸和环糊精溶于pH高于pH 7的碱性水溶液中，第二步，加入酸以将溶液的pH降至低于pH 7的pH。

6. 发明申请

US20080298158A1 TWO TRANSISTOR WORDLINE DECODER OUTPUT DRIVER 失效
标题翻译：两个晶体管WORDLINE解码器输出驱动器
公开(公告)号：US20080298158A1
公开(公告)日：2008-12-04
申请号：US11756419
申请日：2007-05-31
申请人： Hari Giduturi , Mark Bauer , Hernan A. Castro
发明人： Hari Giduturi , Mark Bauer , Hernan A. Castro
IPC分类号： G11C8/10
CPC分类号： G11C8/10 , G11C8/12
摘要： A wordline decoder scheme for a memory device is generally described. In one example, a memory device includes a distributed logical NOR gate to decode addressing signals to generate wordline selection signals within a block of memory wherein the distributed logical NOR gate comprises a wordline decoder output driver, the wordline decoder output driver comprising two transistors coupled with a wordline signal.
摘要翻译：通常描述用于存储器件的字线解码器方案。在一个示例中，存储器件包括分布式逻辑“或”门，用于解码寻址信号以在存储器块内产生字线选择信号，其中分布逻辑或非门包括字线解码器输出驱动器，字线解码器输出驱动器包括与字线信号。

7. 发明申请

US20060194699A1 Sprayable non-aqueous, oil-continuous microemulsions and methods of making same 审中-公开
标题翻译：可喷涂非水，油连续微乳液及其制备方法
公开(公告)号：US20060194699A1
公开(公告)日：2006-08-31
申请号：US10541685
申请日：2004-01-10
申请人： Nadim Moucharafieh , Mark Bauer , Brian Graham , John Finney , Jeffrey Calmeyer , Robert Fellows
发明人： Nadim Moucharafieh , Mark Bauer , Brian Graham , John Finney , Jeffrey Calmeyer , Robert Fellows
IPC分类号： A01N57/18 , A01N25/04
CPC分类号： A01N25/02 , A01N25/04 , A01N57/20 , A01N2300/00 , A01N39/04
摘要： Non-aqueous, oil-continuous microemulsions and methods of making such microemulsions are provided. The non-aqueous, oil-continuous microemulsions comprise at least one oil component, at least one non-aqueous polar solvent component, at least one amphiphilic material component, and at least one solubilized polar compound component. The solubilized polar compound can be a polar-acidic agrochemical complex such as glyphosate. The microemulsions can be applied by either conventional mechanical, non-electrostatic or by electrostatic LV or ULV techniques, such as, for example, electrohydrodynamic spraying, and exhibit enhanced pesticidal activity.
摘要翻译：提供非水，油连续微乳液和制备这种微乳液的方法。非水性油连续微乳液包含至少一种油组分，至少一种非水极性溶剂组分，至少一种两亲物质组分和至少一种溶解的极性化合物组分。溶解的极性化合物可以是极性酸性农药化合物如草甘膦。微乳液可以通过常规的机械，非静电或静电LV或ULV技术施加，例如电动水喷雾，并显示增强的杀虫活性。

8. 发明授权

US06570789B2 Load for non-volatile memory drain bias 有权
标题翻译：负载用于非易失性存储器漏极偏置
公开(公告)号：US06570789B2
公开(公告)日：2003-05-27
申请号：US09752535
申请日：2000-12-29
申请人： Ritesh Trivedi , Robert Baltar , Mark Bauer , Sandeep Guliani , Balaji Srinivasan
发明人： Ritesh Trivedi , Robert Baltar , Mark Bauer , Sandeep Guliani , Balaji Srinivasan
IPC分类号： G11C1606
CPC分类号： G11C16/28 , G11C16/24
摘要： An apparatus is disclosed for providing a load for a non-volatile memory drain bias circuit. Under an embodiment, a load for a non-volatile memory drain bias circuit comprises a column load and a current mirror, a reference voltage for the current mirror being a sample and hold voltage reference. The column load and the current mirror are coupled to a cascode device.
摘要翻译：公开了一种用于为非易失性存储器漏极偏置电路提供负载的装置。在一个实施例中，用于非易失性存储器漏极偏置电路的负载包括列负载和电流镜，电流镜的参考电压是采样和保持电压基准。列负载和电流镜耦合到共源共栅器件。

9. 发明授权

US08406007B1 Magnetic circuit board connector component 有权
标题翻译：磁性电路板连接器组件
公开(公告)号：US08406007B1
公开(公告)日：2013-03-26
申请号：US12634040
申请日：2009-12-09
申请人： Donald Folker , Mike LeBlanc , Mark Bauer
发明人： Donald Folker , Mike LeBlanc , Mark Bauer
IPC分类号： H05K7/00
CPC分类号： H01F27/325 , H01F27/06 , H01F27/306 , H01F2005/046 , H01F2027/065
摘要： A magnetic component includes a bobbin structure adapted for attachment to a circuit board. The magnetic component may include a magnetically permeable core and a conductive winding. The bobbin structure may include a gap for inserting the edge of a circuit board. Potential applications of the magnetic component include mechanically and electrically interconnecting two or more circuit boards in a substantially side-by-side configuration while providing increased heat dissipation from the magnetic component, improving power density of the electronic device, reducing electronic device profile, allowing magnetic isolation between high-voltage and low-voltage circuits and allowing single-sided and double-sided circuit boards to be used in a single circuit. Also, a circuit board assembly may have two or more circuit boards electrically and mechanically connected by at least one magnetic component.
摘要翻译：磁性部件包括适于附接到电路板的线轴结构。磁性部件可以包括导磁芯和导电绕组。线轴结构可以包括用于插入电路板的边缘的间隙。磁性部件的潜在应用包括以大致并排的结构机械地和电气地互连两个或多个电路板，同时提供从磁性部件增加的散热，提高电子器件的功率密度，减少电子器件的轮廓，允许磁性隔离高压和低压电路，并允许在单个电路中使用单面和双面电路板。此外，电路板组件可以具有通过至少一个磁性部件电连接和机械连接的两个或多个电路板。

10. 发明授权

US07852671B2 Data path for multi-level cell memory, methods for storing and methods for utilizing a memory array 有权
标题翻译：用于多级单元存储器的数据路径，存储方法和利用存储器阵列的方法
公开(公告)号：US07852671B2
公开(公告)日：2010-12-14
申请号：US12261928
申请日：2008-10-30
申请人： Mark Bauer
发明人： Mark Bauer
IPC分类号： G11C11/34
CPC分类号： G11C16/10 , G11C11/56 , G11C11/5628 , G11C11/5642 , G11C16/06 , G11C2211/5641
摘要： Memories, data paths, methods for storing, and methods for utilizing are disclosed, including a data path for a memory using multi-level memory cells to provide storage of multiple bits per memory cell. One such data path includes a bit mapping circuit and a data converter circuit. Such a bit mapping circuit can be configured to map bits of the original data to an intermediate arrangement of bits and such a data converter circuit can be configured to receive the intermediate arrangement of bits and convert the intermediate arrangement of bits into intermediate data corresponding to a memory state to be stored by memory cells of a memory cell array.
摘要翻译：公开了存储器，数据路径，存储方法和利用方法，包括使用多级存储单元的存储器的数据路径，以提供每存储器单元多位的存储。一个这样的数据路径包括位映射电路和数据转换器电路。这样的位映射电路可以被配置为将原始数据的位映射到位的中间排列，并且这样的数据转换器电路可以被配置为接收位的中间排列，并将位的中间排列转换成对应于由存储单元阵列的存储单元存储的存储器状态。

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