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1. 发明申请

US20070008013A1 Universal programmable logic gate and routing method 失效
标题翻译：通用可编程逻辑门和路由方法
公开(公告)号：US20070008013A1
公开(公告)日：2007-01-11
申请号：US11377935
申请日：2006-03-15
申请人： Amir Fijany , Farrokh Vatan , Kerem Akarvardar , Benjamin Blalock , Suheng Chen , Sorin Cristoloveanu , Elzbieta Kolawa , Mohammad Mojarradi , Nikzad Toomarian
发明人： Amir Fijany , Farrokh Vatan , Kerem Akarvardar , Benjamin Blalock , Suheng Chen , Sorin Cristoloveanu , Elzbieta Kolawa , Mohammad Mojarradi , Nikzad Toomarian
IPC分类号： H03K19/20
CPC分类号： H01L29/785 , H01L27/11807 , H01L27/1203 , H01L29/42384 , H01L2029/7857
摘要： An universal and programmable logic gate based on G4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G4-FET is also presented. The G4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.
摘要翻译：公开了一种基于GOS-4FET技术的通用和可编程逻辑门，从而设计出更有效的逻辑电路。还提出了一种基于G_FET 4FET的新的全加器设计。也可以用作独特的路由器设备，提供彼此隔离和垂直的信号路径的共面交叉。这有可能克服VLSI设计中的复杂互连方案变得越来越成问题的主要限制。

2. 发明授权

US07514964B2 Universal programmable logic gate and routing method 失效
标题翻译：通用可编程逻辑门和路由方法
公开(公告)号：US07514964B2
公开(公告)日：2009-04-07
申请号：US11377935
申请日：2006-03-15
申请人： Amir Fijany , Farrokh Vatan , Kerem Akarvardar , Benjamin Blalock , Suheng Chen , Sorin Cristoloveanu , Elzbieta Kolawa , Mohammad M. Mojarradi , Nikzad Toomarian
发明人： Amir Fijany , Farrokh Vatan , Kerem Akarvardar , Benjamin Blalock , Suheng Chen , Sorin Cristoloveanu , Elzbieta Kolawa , Mohammad M. Mojarradi , Nikzad Toomarian
IPC分类号： H03K19/20 , G11C7/00
CPC分类号： H01L29/785 , H01L27/11807 , H01L27/1203 , H01L29/42384 , H01L2029/7857
摘要： An universal and programmable logic gate based on G4-FET technology is disclosed, leading to the design of more efficient logic circuits. A new full adder design based on the G4-FET is also presented. The G4-FET can also function as a unique router device offering coplanar crossing of signal paths that are isolated and perpendicular to one another. This has the potential of overcoming major limitations in VLSI design where complex interconnection schemes have become increasingly problematic.
摘要翻译：公开了一种基于G4-FET技术的通用和可编程逻辑门，从而设计出更高效的逻辑电路。还介绍了一种基于G4-FET的全加器设计。 G4-FET还可以作为独特的路由器设备，提供彼此隔离和垂直的信号路径的共面交叉。这有可能克服VLSI设计中的复杂互连方案变得越来越成问题的主要限制。

3. 发明申请

US20080001658A1 Four-gate transistor analog multiplier circuit 有权
标题翻译：四门晶体管模拟乘法电路
公开(公告)号：US20080001658A1
公开(公告)日：2008-01-03
申请号：US11804893
申请日：2007-05-21
申请人： Mohammad Mojarradi , Benjamin Blalock , Sorin Cristoloveanu , Suheng Chen , Kerem Akarvardar
发明人： Mohammad Mojarradi , Benjamin Blalock , Sorin Cristoloveanu , Suheng Chen , Kerem Akarvardar
IPC分类号： H99Z99/00
CPC分类号： G06G7/16
摘要： A differential output analog multiplier circuit utilizing four G4-FETs, each source connected to a current source. The four G4-FETs may be grouped into two pairs of two G4-FETs each, where one pair has its drains connected to a load, and the other par has its drains connected to another load. The differential output voltage is taken at the two loads. In one embodiment, for each G4-FET, the first and second junction gates are each connected together, where a first input voltage is applied to the front gates of each pair, and a second input voltage is applied to the first junction gates of each pair. Other embodiments are described and claimed.
摘要翻译：一个差分输出模拟乘法器电路，利用四个四极管，每个源极连接到电流源。四个G 4 SFET可以被分组成两对两个两个G 4 -FET，其中一对具有连接到负载的漏极，另一对具有其下水道连接到另一个负载。差分输出电压在两个负载下进行。在一个实施例中，对于每个G 4 -FET，第一和第二结门各自连接在一起，其中第一输入电压施加到每对的前栅极，第二输入电压为应用于每对的第一个结门。描述和要求保护其他实施例。

4. 发明授权

US08010591B2 Four-gate transistor analog multiplier circuit 有权
标题翻译：四门晶体管模拟乘法电路
公开(公告)号：US08010591B2
公开(公告)日：2011-08-30
申请号：US11804893
申请日：2007-05-21
申请人： Mohammad M. Mojarradi , Benjamin Blalock , Sorin Cristoloveanu , Suheng Chen , Kerem Akarvardar
发明人： Mohammad M. Mojarradi , Benjamin Blalock , Sorin Cristoloveanu , Suheng Chen , Kerem Akarvardar
IPC分类号： G06E3/00
CPC分类号： G06G7/16
摘要： A differential output analog multiplier circuit utilizing four G4-FETs, each source connected to a current source. The four G4-FETs may be grouped into two pairs of two G4-FETs each, where one pair has its drains connected to a load, and the other par has its drains connected to another load. The differential output voltage is taken at the two loads. In one embodiment, for each G4-FET, the first and second junction gates are each connected together, where a first input voltage is applied to the front gates of each pair, and a second input voltage is applied to the first junction gates of each pair. Other embodiments are described and claimed.
摘要翻译：使用四个G4-FET的差分输出模拟乘法器电路，每个源极连接到电流源。四个G4-FET可以分成两对，每对两个G4-FET，其中一对具有连接到负载的漏极，另一对的漏极连接到另一个负载。差分输出电压在两个负载下进行。在一个实施例中，对于每个G4-FET，第一和第二结门各自连接在一起，其中第一输入电压施加到每对的前门，并且第二输入电压施加到每个的第一结门对。描述和要求保护其他实施例。

5. 发明申请

US20120139500A1 METHOD FOR LIMITING BATTERY DISCHARGING CURRENT IN BATTERY CHARGER AND DISCHARGER CIRCUIT 有权
标题翻译：在电池充电器和放电电路中限制电池放电电流的方法
公开(公告)号：US20120139500A1
公开(公告)日：2012-06-07
申请号：US13107086
申请日：2011-05-13
申请人： Mao Ye , Jinrong Qian , Suheng Chen , Richard Stair
发明人： Mao Ye , Jinrong Qian , Suheng Chen , Richard Stair
IPC分类号： H02J7/04
CPC分类号： H02J7/0063 , H02J7/0068 , H02J2007/0059 , H02M1/10 , H02M1/32 , H02M3/1582 , Y02T90/127 , Y10T307/625
摘要： A power supply system includes a rechargeable battery to deliver a supply current to a load and a circuit to limit a discharge current when the rechargeable battery is supplying power to the load. The power supply system may further include an integrator for integrating a discharge voltage representing the discharge current that exceeds a predetermined limit, a pulse-width-modulation (PWM) circuit for producing a control signal having a PWM duty cycle representing the discharge voltage, and a driver circuit for delivering the supply current to said load according to said control signal. In one embodiment, a digital register is used to set the battery discharging current limit, in another embodiment an analog circuit is used to set the battery discharging current limit, and in yet another embodiment or a combination of the digital register and analog circuit is used to set the battery discharging current limit.
摘要翻译：电源系统包括可充电电池，用于向负载输送电流，并且当可再充电电池向负载供电时，限制放电电流。供电系统还可以包括用于积分表示超过预定极限的放电电流的放电电压的积分器，用于产生具有表示放电电压的PWM占空比的控制信号的脉宽调制（PWM）电路，以及驱动电路，用于根据所述控制信号将电源电流传送到所述负载。在一个实施例中，使用数字寄存器来设置电池放电电流限制，在另一实施例中，使用模拟电路来设置电池放电电流限制，并且在另一个实施例中或者使用数字寄存器和模拟电路的组合设置电池放电电流限制。

6. 发明授权

US09136724B2 Method for limiting battery discharging current in battery charger and discharger circuit 有权
标题翻译：限制电池充电器和放电器电路中电池放电电流的方法
公开(公告)号：US09136724B2
公开(公告)日：2015-09-15
申请号：US13107086
申请日：2011-05-13
申请人： Mao Ye , Jinrong Qian , Suheng Chen , Richard Stair
发明人： Mao Ye , Jinrong Qian , Suheng Chen , Richard Stair
IPC分类号： H02J7/00 , H02M1/10 , H02M3/158 , H02M1/32
CPC分类号： H02J7/0063 , H02J7/0068 , H02J2007/0059 , H02M1/10 , H02M1/32 , H02M3/1582 , Y02T90/127 , Y10T307/625
摘要： A power supply system includes a rechargeable battery to deliver a supply current to a load and a circuit to limit a discharge current when the rechargeable battery is supplying power to the load. The power supply system may further include an integrator for integrating a discharge voltage representing the discharge current that exceeds a predetermined limit, a pulse-width-modulation (PWM) circuit for producing a control signal having a PWM duty cycle representing the discharge voltage, and a driver circuit for delivering the supply current to said load according to said control signal. In one embodiment, a digital register is used to set the battery discharging current limit, in another embodiment an analog circuit is used to set the battery discharging current limit, and in yet another embodiment or a combination of the digital register and analog circuit is used to set the battery discharging current limit.
摘要翻译：电源系统包括可充电电池，用于向负载输送电流，并且当可再充电电池向负载供电时，限制放电电流。供电系统还可以包括用于积分表示超过预定极限的放电电流的放电电压的积分器，用于产生具有表示放电电压的PWM占空比的控制信号的脉冲宽度调制（PWM）电路，以及驱动电路，用于根据所述控制信号将电源电流传送到所述负载。在一个实施例中，使用数字寄存器来设置电池放电电流限制，在另一实施例中，使用模拟电路来设置电池放电电流限制，并且在另一个实施例中或者使用数字寄存器和模拟电路的组合设置电池放电电流限制。

7. 发明申请

US20120139345A1 CONTROL METHOD OF HYBRID POWER BATTERY CHARGER 审中-公开
标题翻译：混合动力电池充电器的控制方法
公开(公告)号：US20120139345A1
公开(公告)日：2012-06-07
申请号：US13106773
申请日：2011-05-12
申请人： Mao Ye , Richard Stair , Suheng Chen , Jinrong Qian , Qiong M. Li
发明人： Mao Ye , Richard Stair , Suheng Chen , Jinrong Qian , Qiong M. Li
IPC分类号： H02J9/04
CPC分类号： H02J7/0063 , H02J7/0068 , H02J2007/0059 , H02M1/10 , H02M1/32 , H02M3/1582 , Y02T90/127 , Y10T307/625
摘要： A power supply system and method for operating same. The power supply system is connectable to receive power from an adapter and supply power to a load. The power supply system includes a rechargeable battery, a buck mode circuit, and a boost mode circuit. A switching circuit switches between the buck mode circuit and boost mode circuit for supplying power to the load. If the power required by the load reaches a first predetermined level related to an adapter overload condition for a first predetermined time, the switching circuit disconnects said buck mode circuit from the load and connects the rechargeable battery and the boost mode circuit to said load. The first predetermined level may be established by a first predetermined percent of the current of a dynamic power management level established by the load, which is related to a power level below that which can be provided by the adapter.
摘要翻译：供电系统及其运行方法。电源系统可连接，以从适配器接收电力并向负载供电。电源系统包括可充电电池，降压模式电路和升压模式电路。开关电路在降压模式电路和升压模式电路之间切换，以向负载供电。如果负载所需的功率达到与适配器过载状态相关的第一预定时间的第一预定电平，则开关电路将所述降压模式电路与负载断开，并将可再充电电池和升压模式电路连接到所述负载。可以通过由负载建立的动态功率管理电平的电流的第一预定百分比来建立第一预定电平，其与低于可由适配器提供的功率电平相关联。

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