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1. 发明申请

US20090217054A1 SECURE SOFTWARE AND HARDWARE ASSOCIATION TECHNIQUE 有权
标题翻译：安全软件和硬件协会技术
公开(公告)号：US20090217054A1
公开(公告)日：2009-08-27
申请号：US12392004
申请日：2009-02-24
申请人： Amer Haider , Muhammad R. Hussain , Richard E. Kessler , Imran Badr
发明人： Amer Haider , Muhammad R. Hussain , Richard E. Kessler , Imran Badr
IPC分类号： H04L9/06
CPC分类号： H04L9/0825 , G06F21/57 , H04L9/3234 , H04L9/3247
摘要： In an embodiment, authenticated hardware and authenticated software are cryptographically binded using symmetric and asymmetric cryptography. Cryptographically binding the hardware and software ensures that original equipment manufacturer (OEM) hardware will only run OEM software. Cryptographically binding the hardware and software protects the OEM binary code so it will only run on the OEM hardware and cannot be replicated or altered to operate on unauthorized hardware. This cryptographic binding technique is referred to herein as secure software and hardware association (SSHA).
摘要翻译：在一个实施例中，经认证的硬件和认证的软件使用对称和非对称加密技术被加密地绑定。加密硬件和软件的密码确保原始设备制造商（OEM）硬件只能运行OEM软件。加密硬件和软件的加密保护了OEM二进制代码，因此它只能在OEM硬件上运行，不能被复制或更改以对未授权的硬件进行操作。这种加密绑定技术在这里被称为安全软件和硬件关联（SSHA）。

2. 发明授权

US08677144B2 Secure software and hardware association technique 有权
标题翻译：安全的软硬件关联技术
公开(公告)号：US08677144B2
公开(公告)日：2014-03-18
申请号：US12392004
申请日：2009-02-24
申请人： Amer Haider , Muhammad R. Hussain , Richard E. Kessler , Imran Badr
发明人： Amer Haider , Muhammad R. Hussain , Richard E. Kessler , Imran Badr
IPC分类号： G06F21/00
CPC分类号： H04L9/0825 , G06F21/57 , H04L9/3234 , H04L9/3247
摘要： In an embodiment, authenticated hardware and authenticated software are cryptographically binded using symmetric and asymmetric cryptography. Cryptographically binding the hardware and software ensures that original equipment manufacturer (OEM) hardware will only run OEM software. Cryptographically binding the hardware and software protects the OEM binary code so it will only run on the OEM hardware and cannot be replicated or altered to operate on unauthorized hardware. This cryptographic binding technique is referred to herein as secure software and hardware association (SSHA).
摘要翻译：在一个实施例中，经认证的硬件和认证的软件使用对称和非对称加密技术被加密地绑定。加密硬件和软件的密码确保原始设备制造商（OEM）硬件只能运行OEM软件。加密硬件和软件的加密保护了OEM二进制代码，因此它只能在OEM硬件上运行，不能被复制或更改以对未授权的硬件进行操作。这种加密绑定技术在这里被称为安全软件和硬件关联（SSHA）。

3. 发明申请

US20100023626A1 METHOD AND APPARATUS FOR REDUCING HOST OVERHEAD IN A SOCKET SERVER IMPLEMENTATION 有权
标题翻译：用于减少插座服务器实现中的主机的方法和装置
公开(公告)号：US20100023626A1
公开(公告)日：2010-01-28
申请号：US12574263
申请日：2009-10-06
申请人： Muhammad R. Hussain , Richard E. Kessler , Faisal Masood , Robert A. Sanzone , Imran Badr
发明人： Muhammad R. Hussain , Richard E. Kessler , Faisal Masood , Robert A. Sanzone , Imran Badr
IPC分类号： G06F15/16
CPC分类号： H04L69/16 , H04L49/90 , H04L49/901 , H04L49/9031 , H04L49/9063 , H04L69/162 , H04L69/163 , H04L69/165
摘要： A network application executing on a host system provides a list of application buffers in host memory stored in a queue to a network services processor coupled to the host system. The application buffers are used for storing data transferred on a socket established between the network application and a remote network application executing in a remote host system. Using the application buffers, data received by the network services processor over the network is transferred between the network services processor and the application buffers. After the transfer, a completion notification is written to one of the two control queues in the host system. The completion notification includes the size of the data transferred and an identifier associated with the socket. The identifier identifies a thread associated with the transferred data and the location of the data in the host system.
摘要翻译：在主机系统上执行的网络应用程序将存储在队列中的主机存储器中的应用缓冲器列表提供给耦合到主机系统的网络服务处理器。应用程序缓冲区用于存储在网络应用程序和在远程主机系统中执行的远程网络应用程序之间建立的套接字上传输的数据。使用应用缓冲器，由网络服务处理器通过网络接收的数据在网络服务处理器和应用缓冲器之间传送。在传输之后，将完成通知写入主机系统中的两个控制队列之一。完成通知包括传输的数据的大小和与套接字相关联的标识符。标识符标识与传送的数据相关联的线程和主机系统中数据的位置。

4. 发明授权

US07930349B2 Method and apparatus for reducing host overhead in a socket server implementation 有权
标题翻译：减少套接字服务器实现中的主机开销的方法和装置
公开(公告)号：US07930349B2
公开(公告)日：2011-04-19
申请号：US12574263
申请日：2009-10-06
申请人： Muhammad R. Hussain , Richard E. Kessler , Faisal Masood , Robert A. Sanzone , Imran Badr
发明人： Muhammad R. Hussain , Richard E. Kessler , Faisal Masood , Robert A. Sanzone , Imran Badr
IPC分类号： G06F15/16
CPC分类号： H04L69/16 , H04L49/90 , H04L49/901 , H04L49/9031 , H04L49/9063 , H04L69/162 , H04L69/163 , H04L69/165
摘要： A network application executing on a host system provides a list of application buffers in host memory stored in a queue to a network services processor coupled to the host system. The application buffers are used for storing data transferred on a socket established between the network application and a remote network application executing in a remote host system. Using the application buffers, data received by the network services processor over the network is transferred between the network services processor and the application buffers. After the transfer, a completion notification is written to one of the two control queues in the host system. The completion notification includes the size of the data transferred and an identifier associated with the socket. The identifier identifies a thread associated with the transferred data and the location of the data in the host system.
摘要翻译：在主机系统上执行的网络应用程序将存储在队列中的主机存储器中的应用缓冲器列表提供给耦合到主机系统的网络服务处理器。应用程序缓冲区用于存储在网络应用程序和在远程主机系统中执行的远程网络应用程序之间建立的套接字上传输的数据。使用应用缓冲器，由网络服务处理器通过网络接收的数据在网络服务处理器和应用缓冲器之间传送。在传输之后，将完成通知写入主机系统中的两个控制队列之一。完成通知包括传输的数据的大小和与套接字相关联的标识符。标识符标识与传送的数据相关联的线程和主机系统中数据的位置。

5. 发明授权

US07613813B2 Method and apparatus for reducing host overhead in a socket server implementation 有权
标题翻译：减少套接字服务器实现中的主机开销的方法和装置
公开(公告)号：US07613813B2
公开(公告)日：2009-11-03
申请号：US11225373
申请日：2005-09-12
申请人： Muhammad R. Hussain , Richard E. Kessler , Faisal Masood , Robert A. Sanzone , Imran Badr
发明人： Muhammad R. Hussain , Richard E. Kessler , Faisal Masood , Robert A. Sanzone , Imran Badr
IPC分类号： G06F15/16
CPC分类号： H04L69/16 , H04L49/90 , H04L49/901 , H04L49/9031 , H04L49/9063 , H04L69/162 , H04L69/163 , H04L69/165
摘要： A network application executing on a host system provides a list of application buffers in host memory stored in a queue to a network services processor coupled to the host system. The application buffers are used for storing data transferred on a socket established between the network application and a remote network application executing in a remote host system. Using the application buffers, data received by the network services processor over the network is transferred between the network services processor and the application buffers. After the transfer, a completion notification is written to one of the two control queues in the host system. The completion notification includes the size of the data transferred and an identifier associated with the socket. The identifier identifies a thread associated with the transferred data and the location of the data in the host system.
摘要翻译：在主机系统上执行的网络应用程序将存储在队列中的主机存储器中的应用缓冲器列表提供给耦合到主机系统的网络服务处理器。应用程序缓冲区用于存储在网络应用程序和在远程主机系统中执行的远程网络应用程序之间建立的套接字上传输的数据。使用应用缓冲器，由网络服务处理器通过网络接收的数据在网络服务处理器和应用缓冲器之间传送。在传输之后，将完成通知写入主机系统中的两个控制队列之一。完成通知包括传输的数据的大小和与套接字相关联的标识符。标识符标识与传送的数据相关联的线程和主机系统中数据的位置。

6. 发明授权

US07535907B2 TCP engine 有权
标题翻译： TCP引擎
公开(公告)号：US07535907B2
公开(公告)日：2009-05-19
申请号：US11218727
申请日：2005-09-02
申请人： Muhammad R. Hussain , Imran Badr , Faisal Masood , Philip H. Dickinson , Richard E. Kessler , Daniel A. Katz , Michael S. Bertone , Robert A. Sanzone , Thomas F. Hummel , Gregg A. Bouchard
发明人： Muhammad R. Hussain , Imran Badr , Faisal Masood , Philip H. Dickinson , Richard E. Kessler , Daniel A. Katz , Michael S. Bertone , Robert A. Sanzone , Thomas F. Hummel , Gregg A. Bouchard
IPC分类号： H04L12/28 , H04L12/56 , G06F15/16
CPC分类号： H04L69/16 , H04L49/90 , H04L49/9047 , H04L69/163
摘要： A network transport layer accelerator accelerates processing of packets so that packets can be forwarded at wire-speed. To accelerate processing of packets, the accelerator performs pre-processing on a network transport layer header encapsulated in a packet for a connection and performs in-line network transport layer checksum insertion prior to transmitting a packet. A timer unit in the accelerator schedules processing of the received packets. The accelerator also includes a free pool allocator which manages buffers for storing the received packets and a packet order unit which synchronizes processing of received packets for a same connection.
摘要翻译：网络传输层加速器加速数据包的处理，使数据包能够以线速转发。为了加速分组的处理，加速器在封装在用于连接的分组中的网络传输层报头上执行预处理，并且在发送分组之前执行在线网络传输层校验和插入。加速器中的定时器单元调度接收到的分组的处理。加速器还包括一个空闲池分配器，用于管理用于存储接收到的分组的缓冲器，以及分组顺序单元，用于同步用于相同连接的接收分组的处理。

7. 发明授权

US07594081B2 Direct access to low-latency memory 有权
标题翻译：直接访问低延迟内存
公开(公告)号：US07594081B2
公开(公告)日：2009-09-22
申请号：US11024002
申请日：2004-12-28
申请人： Gregg A. Bouchard , David A. Carlson , Richard E. Kessler , Muhammad R. Hussain
发明人： Gregg A. Bouchard , David A. Carlson , Richard E. Kessler , Muhammad R. Hussain
IPC分类号： G06F12/00 , G06F13/00 , G06F13/28
CPC分类号： G06F9/3824 , G06F9/3885 , G06F12/0888
摘要： A content aware application processing system is provided for allowing directed access to data stored in a non-cache memory thereby bypassing cache coherent memory. The processor includes a system interface to cache coherent memory and a low latency memory interface to a non-cache coherent memory. The system interface directs memory access for ordinary load/store instructions executed by the processor to the cache coherent memory. The low latency memory interface directs memory access for non-ordinary load/store instructions executed by the processor to the non-cache memory, thereby bypassing the cache coherent memory. The non-ordinary load/store instruction can be a coprocessor instruction. The memory can be a low-latency type memory. The processor can include a plurality of processor cores.
摘要翻译：提供内容感知应用处理系统，用于允许定向访问存储在非高速缓冲存储器中的数据，从而绕过高速缓存一致存储器。该处理器包括用于缓存相干存储器的系统接口和用于非高速缓存一致记忆体的低延迟存储器接口。系统接口将由处理器执行的普通加载/存储指令的存储器访问指向高速缓存一致存储器。低延迟存储器接口将由处理器执行的非普通加载/存储指令的存储器访问引导到非高速缓存存储器，从而绕过高速缓存一致存储器。非普通的加载/存储指令可以是协处理器指令。存储器可以是低延迟型存储器。处理器可以包括多个处理器核。

8. 发明授权

US07814310B2 IPsec performance optimization 有权
标题翻译： IPsec性能优化
公开(公告)号：US07814310B2
公开(公告)日：2010-10-12
申请号：US10411967
申请日：2003-04-12
申请人： Gregg A. Bouchard , Richard E. Kessler , Muhammad R. Hussain
发明人： Gregg A. Bouchard , Richard E. Kessler , Muhammad R. Hussain
IPC分类号： H04L29/06
CPC分类号： H04L63/0485 , H04L63/1466 , H04L63/164
摘要： A method and apparatus for optimizing IPsec processing by providing execution units with windowing data during prefetch and managing coherency of security association data by management of security association accesses. Providing execution units with windowing data allows initial parallel processing of IPsec packets. The security association access ordering apparatus serializes access to the dynamic section of security association data according to packet order arrival while otherwise allowing parallel processing of the IPsec packet by multiple execution units in a security processor.
摘要翻译：一种通过在预取期间向执行单元提供窗口数据并通过管理安全关联访问来管理安全关联数据的一致性来优化IPsec处理的方法和装置。为执行单元提供窗口数据允许IPsec数据包的初始并行处理。安全关联访问排序装置根据分组顺序序列化对安全关联数据的动态部分的访问，而另外允许在安全处理器中由多个执行单元并行处理IPsec分组。

9. 发明授权

US07398386B2 Transparent IPSec processing inline between a framer and a network component 有权
标题翻译：在成帧器和网络组件之间内联的透明IPSec处理
公开(公告)号：US07398386B2
公开(公告)日：2008-07-08
申请号：US10411909
申请日：2003-04-12
申请人： Richard E. Kessler , Muhammad R. Hussain
发明人： Richard E. Kessler , Muhammad R. Hussain
IPC分类号： G06F21/00 , G06F15/16 , H04L9/00 , H04K1/00
CPC分类号： H04L63/045 , H04L63/0485 , H04L63/164
摘要： A method and apparatus for transparent processing of IPsec network traffic by a security processor in line between a framer and a network processor. Security processor parses packet header and tail information to determine if encryption or decryption is required. After encryption or decryption is completed packet header and tail information is modified to reflect the changes in the packet such as length of the packet. The modified packet is then passed on to the network processor or framer.
摘要翻译：一种用于通过成帧器和网络处理器之间的安全处理器来透明处理IPsec网络流量的方法和装置。安全处理器解析分组报头和尾部信息，以确定是否需要加密或解密。在完成加密或解密之后，数据包头和尾信息被修改以反映分组中的变化，例如分组的长度。修改后的数据包然后传递到网络处理器或成帧器。

10. 发明授权

US08392590B2 Deterministic finite automata (DFA) processing 有权
标题翻译：确定性有限自动机（DFA）处理
公开(公告)号：US08392590B2
公开(公告)日：2013-03-05
申请号：US11221408
申请日：2005-09-07
申请人： Gregg A. Bouchard , David A. Carlson , Richard E. Kessler , Muhammad R. Hussain
发明人： Gregg A. Bouchard , David A. Carlson , Richard E. Kessler , Muhammad R. Hussain
IPC分类号： G06F15/16 , G06F17/28
CPC分类号： H04L49/90 , G06F15/7846 , H04L29/06 , H04L63/02 , H04L63/04 , H04L63/145 , H04L63/164 , H04L69/12
摘要： A processor for traversing deterministic finite automata (DFA) graphs with incoming packet data in real-time. The processor includes at least one processor core and a DFA module operating asynchronous to the at least one processor core for traversing at least one DFA graph stored in a non-cache memory with packet data stored in a cache-coherent memory.
摘要翻译：用于实时传入传入分组数据的运行确定性有限自动机（DFA）图的处理器。所述处理器包括至少一个处理器核心和与所述至少一个处理器核心异步操作的DFA模块，用于使用存储在高速缓存相干存储器中的分组数据遍历存储在非高速缓冲存储器中的至少一个DFA图形。

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