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    • 1. 发明授权
    • Low noise filter for a wireless receiver
    • 无线接收机的低噪声滤波器
    • US07415264B2
    • 2008-08-19
    • US10949534
    • 2004-09-25
    • Aly IsmailJohn E. VasaBalasubramanian Ramachandran
    • Aly IsmailJohn E. VasaBalasubramanian Ramachandran
    • H04B1/16H04B1/10
    • H04B1/30H03F3/45968H03F2200/294H03F2200/372
    • A low noise filter is arranged to receive an input signal from a downconverter. The low noise filter is constructed to block or cancel any DC offset in the input signal, as well as filter selected frequency components from the input signal. The low noise filter uses a shared capacitor both to handle the DC offset and to set filter response characteristics. As the low noise filter is implemented with a Frequency Dependent Negative Resistance (FDNR) device, the shared capacitor may be relatively small. The low noise filter has a load capacitor, with the output of the load capacitor coupled to a bias resistor and voltage. This bias structure cooperates with the load capacitor to set a high cutoff frequency for the low noise filter useful for blocking or canceling the DC offset.
    • 低噪声滤波器布置成从下变频器接收输入信号。 低噪声滤波器被构造为阻挡或消除输入信号中的任何DC偏移,以及从输入信号中滤除所选择的频率分量。 低噪声滤波器使用共享电容器来处理DC偏移并设置滤波器响应特性。 由于利用频率相关负电阻(FDNR)器件实现低噪声滤波器,所以共享电容器可能相对较小。 低噪声滤波器具有负载电容,负载电容的输出耦合到偏置电阻和电压。 该偏置结构与负载电容器配合,为低噪声滤波器设置高截止频率,可用于阻断或抵消DC偏移。
    • 2. 发明申请
    • Low noise filter for a wireless receiver
    • 无线接收机的低噪声滤波器
    • US20060068749A1
    • 2006-03-30
    • US10949534
    • 2004-09-25
    • Aly IsmailJohn VasaBalasubramanian Ramachandran
    • Aly IsmailJohn VasaBalasubramanian Ramachandran
    • H04B1/16
    • H04B1/30H03F3/45968H03F2200/294H03F2200/372
    • A low noise filter is arranged to receive an input signal from a downconverter. The low noise filter is constructed to block or cancel any DC offset in the input signal, as well as filter selected frequency components from the input signal. The low noise filter uses a shared capacitor both to handle the DC offset and to set filter response characteristics. As the low noise filter is implemented with a Frequency Dependent Negative Resistance (FDNR) device, the shared capacitor may be relatively small. The low noise filter has a load capacitor, with the output of the load capacitor coupled to a bias resistor and voltage. This bias structure cooperates with the load capacitor to set a high cutoff frequency for the low noise filter useful for blocking or canceling the DC offset.
    • 低噪声滤波器布置成从下变频器接收输入信号。 低噪声滤波器被构造为阻挡或消除输入信号中的任何DC偏移,以及从输入信号中滤除所选择的频率分量。 低噪声滤波器使用共享电容器来处理DC偏移并设置滤波器响应特性。 由于利用频率相关负电阻(FDNR)器件实现低噪声滤波器,所以共享电容器可能相对较小。 低噪声滤波器具有负载电容,负载电容的输出耦合到偏置电阻和电压。 该偏置结构与负载电容器配合,为低噪声滤波器设置高截止频率,可用于阻断或抵消DC偏移。
    • 3. 发明申请
    • METHOD AND APPARATUS FOR DC OFFSET CANCELLATION IN AMPLIFIERS
    • 放大器中DC偏移消除的方法和装置
    • US20080048773A1
    • 2008-02-28
    • US11466465
    • 2006-08-23
    • Amr FahimHassan ElwanAly Ismail
    • Amr FahimHassan ElwanAly Ismail
    • H03F1/02
    • H03F3/45475H03F3/45968H03F3/45977H03F2200/78H03F2203/45212H03F2203/45424H03F2203/45438H03F2203/45444H03F2203/45618
    • A system, circuit, and method of canceling DC offset errors in cascaded amplifiers comprises arranging a plurality of any of analog voltage and analog current amplifier stages in any of cascaded and parallel configurations; operatively connecting a feedback comparator and digital logic in a feedback path around a given amplifier, wherein the digital logic comprises a finite state machine implementing an adaptive search algorithm comprising fixed switching and modulated switching; operatively connecting a switch at a differential input of the amplifier to short both input terminals of the amplifier; performing fixed switching on binary weighted elements generating discrete analog steps used to vary any of DC offset voltage and current at the input of the amplifier; and performing modulated switching on at least one lower least significant bit (LSB) of all bits used to vary the any of the DC offset voltage and current.
    • 在级联放大器中消除DC偏移误差的系统,电路和方法包括以任何级联和并联配置布置多个模拟电压和模拟电流放大器级; 在给定的放大器周围的反馈路径中可操作地连接反馈比较器和数字逻辑,其中数字逻辑包括实现包括固定切换和调制切换的自适应搜索算法的有限状态机; 可操作地连接放大器的差分输入端的开关以缩短放大器的两个输入端子; 对二进制加权元件执行固定切换,产生用于改变放大器输入处的DC偏移电压和电流中的任何一个的离散模拟步骤; 以及对用于改变DC偏移电压和电流中的任何一个的所有位的至少一个较低最低有效位(LSB)执行调制开关。
    • 5. 发明授权
    • Noise shaped n th order filter
    • 噪声形n级滤波器
    • US07525372B2
    • 2009-04-28
    • US11683651
    • 2007-03-08
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • H03B1/00H03K5/00
    • H03H11/04
    • A low noise nth order filter, system, and method includes a plurality of nested general immittance converters (GICs) operatively connected to one another in successive GIC stages; and a capacitor operatively connected to each of the GICs, wherein a first successive GIC stage begins at a first node located in between a previous GIC stage and a corresponding capacitor operatively connected to the previous GIC stage. A second successive GIC stage begins at a second node located in between the first node and the first successive GIC stage. The filter may further comprise a resistor operatively connected to at least one successive GIC stage, wherein the resistor is preferably located in between the first node and the first successive GIC stage.
    • 低噪声第n阶滤波器,系统和方法包括在连续GIC阶段中可操作地彼此连接的多个嵌套通用导纳转换器(GIC); 以及可操作地连接到每个GIC的电容器,其中第一连续GIC级开始于位于先前GIC级与可操作地连接到先前GIC级的对应电容器之间的第一节点处。 第二个连续的GIC阶段从位于第一节点和第一连续GIC阶段之间的第二节点开始。 滤波器还可以包括可操作地连接到至少一个连续GIC级的电阻器,其中电阻优选地位于第一节点和第一连续GIC级之间。
    • 6. 发明申请
    • NOISE SHAPED NTH ORDER FILTER
    • 噪音形状的第N个订单过滤器
    • US20080220737A1
    • 2008-09-11
    • US11683651
    • 2007-03-08
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • H04B1/10
    • H03H11/04
    • A low noise nth order filter, system, and method includes a plurality of nested general immittance converters (GICs) operatively connected to one another in successive GIC stages; and a capacitor operatively connected to each of the GICs, wherein a first successive GIC stage begins at a first node located in between a previous GIC stage and a corresponding capacitor operatively connected to the previous GIC stage. A second successive GIC stage begins at a second node located in between the first node and the first successive GIC stage. The filter may further comprise a resistor operatively connected to at least one successive GIC stage, wherein the resistor is preferably located in between the first node and the first successive GIC stage.
    • 低噪声第n阶滤波器,系统和方法包括在连续GIC阶段中可操作地彼此连接的多个嵌套通用导纳转换器(GIC); 以及可操作地连接到每个GIC的电容器,其中第一连续GIC级开始于位于先前GIC级与可操作地连接到先前GIC级的对应电容器之间的第一节点处。 第二个连续的GIC阶段从位于第一节点和第一连续GIC阶段之间的第二节点开始。 滤波器还可以包括可操作地连接到至少一个连续GIC级的电阻器,其中电阻优选地位于第一节点和第一连续GIC级之间。
    • 8. 发明申请
    • dB-linear analog variable gain amplifier (VGA) realization system and method
    • dB线性模拟可变增益放大器(VGA)实现系统和方法
    • US20070296490A1
    • 2007-12-27
    • US11472138
    • 2006-06-21
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • H03G3/20
    • H03G7/06H03G1/0088H03G3/001H03G3/3047
    • A dB-linear variable gain amplifier, a method for creation, and a system includes an amplifier; a pair of resistor arrays operatively connected to the amplifier, wherein each resistor array comprises MOS transistor resistive switches; a differential ramp-generator circuit operatively connected to the pair of resistor arrays; and voltage control lines generated by the differential ramp-generator circuit, wherein the voltage control lines are operatively connected to each of the MOS transistor resistive switches in the pair of resistor arrays. The number of the voltage control lines that are operatively connected to the each of the MOS transistor resistive switches is equal to the number of resistors in a particular resistor array. The differential ramp-generator circuit is preferably operable to take an automatic gain control voltage and generate a series of differential ramp voltages and apply the series of differential ramp voltages to one of the MOS transistor resistive switches.
    • 一个dB线性可变增益放大器,一种创建方法和一个系统,包括放大器; 一对可操作地连接到放大器的电阻器阵列,其中每个电阻器阵列包括MOS晶体管电阻开关; 差分斜坡发生器电路,可操作地连接到所述一对电阻器阵列; 以及由差分斜坡发生器电路产生的电压控制线,其中电压控制线可操作地连接到该对电阻器阵列中的每个MOS晶体管电阻开关。 可操作地连接到每个MOS晶体管电阻开关的电压控制线的数量等于特定电阻器阵列中的电阻器的数量。 差分斜坡发生器电路优选地可操作以获取自动增益控制电压并产生一系列差分斜坡电压,并将一系列差分斜坡电压施加到MOS晶体管电阻开关之一。
    • 9. 发明申请
    • Low power highly linear RF downconverter
    • 低功率高线性RF下变频器
    • US20070218857A1
    • 2007-09-20
    • US11378558
    • 2006-03-17
    • Aly IsmailEdward YoussoufianHassan ElwanFrank Carr
    • Aly IsmailEdward YoussoufianHassan ElwanFrank Carr
    • H04B1/26
    • H03D7/161
    • A technique for downconverting a RF signal comprises an antenna adapted to receive an RF signal; a transconductance amplifier connected to the antenna and adapted to amplify the RF signal; a passive mixer connected to the transconductance amplifier and adapted for current domain mixing of electrical current transferred from the transconductance amplifier; and a load impedance connected to the passive mixer. The load impedance may comprise a parallel combination of a frequency dependent negative resistance component, a capacitor, and a resistor. The load impedance may comprise a pair of complex poles, a pair of imaginary zeros, and a real pole. Voltages at an input and an output of the passive mixer are related such that the input voltage of the passive mixer is an upconverted version of the output voltage of the passive mixer, wherein the input voltage of the passive mixer is at an output of the transconductance amplifier.
    • 用于下变频RF信号的技术包括适于接收RF信号的天线; 连接到天线并适于放大RF信号的跨导放大器; 连接到跨导放大器的无源混频器,适用于从跨导放大器传输的电流的电流域混合; 以及连接到无源混频器的负载阻抗。 负载阻抗可以包括频率依赖负电阻分量,电容器和电阻器的并联组合。 负载阻抗可以包括一对复极点,一对假想零点和实数极点。 无源混频器的输入和输出端的电压与无源混频器的输入电压是无源混频器的输出电压的上变频版本相关,其中无源混频器的输入电压处于跨导输出端 放大器
    • 10. 发明授权
    • dB-linear analog variable gain amplifier (VGA) realization system and method
    • dB线性模拟可变增益放大器(VGA)实现系统和方法
    • US07352238B2
    • 2008-04-01
    • US11472138
    • 2006-06-21
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • Hassan ElwanAmr FahimAly IsmailEdward Youssoufian
    • H03F1/36
    • H03G7/06H03G1/0088H03G3/001H03G3/3047
    • A dB-linear variable gain amplifier, a method for creation, and a system includes an amplifier; a pair of resistor arrays operatively connected to the amplifier, wherein each resistor array comprises MOS transistor resistive switches; a differential ramp-generator circuit operatively connected to the pair of resistor arrays; and voltage control lines generated by the differential ramp-generator circuit, wherein the voltage control lines are operatively connected to each of the MOS transistor resistive switches in the pair of resistor arrays. The number of the voltage control lines that are operatively connected to the each of the MOS transistor resistive switches is equal to the number of resistors in a particular resistor array. The differential ramp-generator circuit is preferably operable to take an automatic gain control voltage and generate a series of differential ramp voltages and apply the series of differential ramp voltages to one of the MOS transistor resistive switches.
    • 一个dB线性可变增益放大器,一种创建方法和一个系统,包括放大器; 一对可操作地连接到放大器的电阻器阵列,其中每个电阻器阵列包括MOS晶体管电阻开关; 差分斜坡发生器电路,可操作地连接到所述一对电阻器阵列; 以及由差分斜坡发生器电路产生的电压控制线,其中电压控制线可操作地连接到该对电阻器阵列中的每个MOS晶体管电阻开关。 可操作地连接到每个MOS晶体管电阻开关的电压控制线的数量等于特定电阻器阵列中的电阻器的数量。 差分斜坡发生器电路优选地可操作以获得自动增益控制电压并产生一系列差分斜坡电压,并将一系列差分斜坡电压施加到MOS晶体管电阻开关之一。