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1. 发明授权

US06218911B1 Planar airbridge RF terminal MEMS switch 有权
标题翻译：平面飞桥RF终端MEMS开关
公开(公告)号：US06218911B1
公开(公告)日：2001-04-17
申请号：US09352999
申请日：1999-07-13
申请人： Alvin M. Kong , Robert B. Stokes , Joseph P. Trieu , Rahil U. Bhorania , Michael D. Lammert
发明人： Alvin M. Kong , Robert B. Stokes , Joseph P. Trieu , Rahil U. Bhorania , Michael D. Lammert
IPC分类号： H01H5900
CPC分类号： H01H59/0009 , H01H2001/0078 , H01H2059/0027
摘要： An RF switch and a process for fabricating an RF switch which includes multiple throws and can be fabricated utilizing only a single layer of metallization. The switch in accordance with the present invention includes an airbridge suspended beam disposed adjacent to one or more metal traces. One or more control pads are disposed adjacent to the airbridged suspended beam to operate the switch electrostatically. The suspended beam as well as the metal traces and contact pads are all fabricated with a single metallization layer. The switch is configured such that deflection of the beam is in a plane generally parallel to the plane of the substrate. By eliminating multiple metallization layers, the complexity for fabricating the switch is greatly reduced. Moreover, the switch configuration also allows multiple throws and multiple poles using a single level of metallization.
摘要翻译： RF开关和用于制造RF开关的过程，其包括多个投掷并且可以仅使用单个金属化层制造。根据本发明的开关包括邻近一个或多个金属迹线设置的空中悬臂梁。一个或多个控制焊盘被布置成与节气门悬挂梁相邻，以静电地操作开关。悬挂梁以及金属轨迹和接触垫都用单个金属化层制造。开关被配置成使得光束的偏转在大致平行于衬底的平面的平面中。通过消除多个金属化层，大大减少了用于制造开关的复杂性。此外，开关配置还允许使用单个金属化级别的多个引线和多极。

2. 发明授权

US5486483A Method of forming closely spaced metal electrodes in a semiconductor device 失效
标题翻译：在半导体器件中形成紧密间隔的金属电极的方法
公开(公告)号：US5486483A
公开(公告)日：1996-01-23
申请号：US312845
申请日：1994-09-27
申请人： Michael D. Lammert
发明人： Michael D. Lammert
IPC分类号： H01L21/28 , H01L21/285 , H01L21/331 , H01L29/73 , H01L29/737 , H01L21/265
CPC分类号： H01L29/66318
摘要： A method of forming closely spaced metal electrodes contacting different regions of a semiconductor device is disclosed. The method includes first depositing a sacrificial layer over a developing semiconductor structure. Next, a photoresist layer is deposited over the sacrificial layer and then patterned and developed with a re-entrant profile opening. An opening in the dielectric layer is formed to expose a first semiconductor layer through the re-entrant profile using an anisotropic etch. The photoresist opening is enlarged by removing a portion of the photoresist layer. Then, a metal layer is deposited over the entire structure such that the metal contacts the first semiconductor layer and extends over a portion of the sacrificial layer. The photoresist layer, the sacrificial layer and portions of the first semiconductor layer are removed so that a first metal electrode is connected to a semiconductor region. The first electrode has a lateral extension determined by the amount the photoresist opening is enlarged. The vertical clearance between the first electrode and a second semiconductor layer is determined by the thickness of the sacrificial layer. A second metal electrode is formed by either a conventional lift-off procedure or by a conventional deposition and etch procedure.
摘要翻译：公开了形成与半导体器件的不同区域接触的紧密间隔的金属电极的方法。该方法包括首先在显影半导体结构上沉积牺牲层。接下来，在牺牲层上沉积光致抗蚀剂层，然后用入口轮廓打开图案化和显影。形成电介质层中的开口，以使用各向异性蚀刻使第一半导体层通过入口轮廓露出。通过去除光致抗蚀剂层的一部分来增大光致抗蚀剂开口。然后，金属层沉积在整个结构上，使得金属接触第一半导体层并且在牺牲层的一部分上延伸。去除光致抗蚀剂层，牺牲层和第一半导体层的部分，使得第一金属电极连接到半导体区域。第一电极具有由光致抗蚀剂开口增大的量确定的横向延伸。第一电极和第二半导体层之间的垂直间隙由牺牲层的厚度决定。第二金属电极通过传统的剥离程序或通过常规的沉积和蚀刻程序形成。

3. 发明授权

US5804487A Method of fabricating high .beta.HBT devices 失效
标题翻译：制造高βHBT器件的方法
公开(公告)号：US5804487A
公开(公告)日：1998-09-08
申请号：US676697
申请日：1996-07-10
申请人： Michael D. Lammert
发明人： Michael D. Lammert
IPC分类号： H01L29/73 , H01L21/331 , H01L29/205 , H01L29/737
CPC分类号： H01L29/66318 , Y10S148/072 , Y10S148/10 , Y10S438/926 , Y10S438/944 , Y10S438/945 , Y10S438/951
摘要： A method for controlling the spacing between the emitter mesa and the base ohmic metal of a heterojunction bipolar transistor (HBT) to obtain a relatively high gain (.beta.) with a low-parasitic base resistance. In a first method, after the emitter, base and collector layers are epitaxially grown on a substrate, a sacrificial layer is deposited on top of the emitter layer. The emitter mesa is patterned with a photoresist using conventional lithography. Subsequently, the sacrificial layer is etched to produce an undercut. The emitter layer is then etched and a photoresist is applied over the first photoresist used to pattern the emitter mesa, as well as the entire device. The top layer of photoresist is patterned with a conventional process for lift-off metalization, such that the final resist profile has a re-entrant slope. The base ohmic metal is deposited and then lifted off by dissolving both the second layer of photoresist, as well as the original photoresist over the emitter mesa. The sacrificial layer is stripped using an isotropic etch leaving a base ohmic metal region surrounding an emitter mesa at a spacing that is determined by the initial undercut of the sacrificial layer. In an alternate embodiment of the invention, a method is disclosed for controlling the spacing between the base ohmic metal and an emitter ohmic metal.
摘要翻译：用于控制异质结双极晶体管（HBT）的发射极台面和基极欧姆金属之间的间隔以获得具有低寄生基极电阻的较高增益（β）的方法。在第一种方法中，在发射极，基极和集电极层在衬底上外延生长之后，牺牲层沉积在发射极层的顶部。使用常规光刻技术，用光致抗蚀剂对发射极台面进行图案化。随后，牺牲层被蚀刻以产生底切。然后蚀刻发射极层，并且在用于对发射极台面进行图案化的第一光致抗蚀剂以及整个器件上施加光致抗蚀剂。用常规的用于剥离金属化的方法对光致抗蚀剂的顶层进行图案化，使得最终的抗蚀剂轮廓具有重入的斜率。沉积基础欧姆金属，然后通过将第二层光致抗蚀剂以及原始光致抗蚀剂溶解在发射台台面上而提起。使用各向同性蚀刻剥离牺牲层，以由牺牲层的初始底切确定的间隔留下围绕发射器台面的基极欧姆金属区域。在本发明的替代实施例中，公开了一种用于控制基极欧姆金属和发射极欧姆金属之间的间隔的方法。

4. 发明授权

US5328856A Method for producing bipolar transistors having polysilicon contacted terminals 失效
标题翻译：具有多晶硅接触端子的双极晶体管的制造方法
公开(公告)号：US5328856A
公开(公告)日：1994-07-12
申请号：US937329
申请日：1992-08-27
申请人： Michael D. Lammert
发明人： Michael D. Lammert
IPC分类号： H01L21/285 , H01L21/331 , H01L21/265 , H01L29/70
CPC分类号： H01L29/66272 , H01L21/28525 , Y10S148/011
摘要： This invention discloses a process by which a silicon bipolar transistor can be fabricated having a polysilicon emitter region and a polysilicon base region by a single polysilicon deposition step. After conventional fabrication of the substrate, collector and base layers, a first dielectric layer is deposited over the developing wafer structure. The first dielectric layer is then etched in order to define polysilicon emitter, base and collector regions. Next, a polysilicon layer is deposited over the first dielectric layer and the etched regions. A planarization layer is deposited over the polysilicon layer, and the planarization layer and the polysilicon layer are etched so that polysilicon only remains in the defined polysilicon emitter, base and collector regions. The polysilicon emitter, base and collector regions are then implanted with dopants to provide the appropriate interfaces. A second dielectric layer is deposited over the first dielectric layer and the polysilicon regions and is etched to open contacts to the polysilicon emitter, base and collector regions. A metallization layer is then deposited and etched to contact the polysilicon emitter, base and collector regions.
摘要翻译：本发明公开了一种通过单个多晶硅沉积步骤制造具有多晶硅发射极区域和多晶硅基底区域的硅双极晶体管的方法。在基板，集电体和基底层的常规制造之后，在显影晶片结构上沉积第一介电层。然后蚀刻第一介电层，以便限定多晶硅发射极，基极和集电极区。接下来，在第一介电层和蚀刻区域上沉积多晶硅层。平坦化层沉积在多晶硅层上，并且平坦化层和多晶硅层被蚀刻，使得多晶硅仅保留在限定的多晶硅发射极，基极和集电极区域中。然后用掺杂剂注入多晶硅发射极，基极和集电极区域以提供适当的界面。第二介电层沉积在第一介电层和多晶硅区域上，并被蚀刻以将触点打开到多晶硅发射极，基极和集电极区域。然后沉积并蚀刻金属化层以接触多晶硅发射极，基极和集电极区域。

5. 发明授权

US4711017A Formation of buried diffusion devices 失效
标题翻译：掩埋扩散装置的形成
公开(公告)号：US4711017A
公开(公告)日：1987-12-08
申请号：US835571
申请日：1986-03-03
申请人： Michael D. Lammert
发明人： Michael D. Lammert
IPC分类号： H01L29/73 , H01L21/331 , H01L21/74 , H01L21/762 , H01L29/732 , H01L21/00
CPC分类号： H01L21/762 , H01L21/74 , H01L21/76281 , Y10S148/147
摘要： A low collector parasitic resistance in bipolar transistors may be achieved without the use of an epitaxial layer or a high energy implant. Essentially, the invention employs the use of trenches in an N.sup.- layer overlying a P.sup.- substrate to surround the transistor, forming an N.sup.+ region in the walls defining the trench and below the surface, extending the trench into the P.sup.- substrate, implanting the bottom of the trench with a P-type dopant and refilling the trench with insulating material.The process of the invention permits fabrication of complex bipolar integrated circuits having a very high performance, and is particularly adaptable to very small geometry devices of 1 .mu.m and lower.
摘要翻译：双极晶体管中的低集电极寄生电阻可以在不使用外延层或高能量注入的情况下实现。本质上，本发明采用覆盖在P-衬底上的N层中的沟槽来围绕晶体管，在限定沟槽并在表面下面的壁中形成N +区，将沟槽延伸到P-衬底中，沟槽的底部具有P型掺杂剂并用绝缘材料再填充沟槽。本发明的方法允许制造具有非常高性能的复杂双极集成电路，并且特别适用于1μm和更小的非常小的几何装置。

6. 发明授权

US06406965B1 Method of fabricating HBT devices 有权
标题翻译：制造HBT器件的方法
公开(公告)号：US06406965B1
公开(公告)日：2002-06-18
申请号：US09837966
申请日：2001-04-19
申请人： Michael D. Lammert
发明人： Michael D. Lammert
IPC分类号： H01L21331
CPC分类号： H01L29/66143 , H01L27/0664 , H01L29/66318 , H01L29/7371 , H01L29/872
摘要： A method of fabricating an HBT transistor with extremely high speed and low operating current. The transistor has a small base area and a small emitter area with most of the emitter area contacted with metal, most of the base area, outside of the emitter, contacted with metal and a collector ohmic metal placed close to the device emitter and the base ohmic metal. To achieve this, the method includes partially undercutting the base ohmic metal along all external edges to reduce the device's parasitic base-collector capacitance. In order to provide metal step coverage, the undercut of the base ohmic metal can be covered with a sloped edge polymer. In addition, a Schottky diode can be fabricated within the process steps used to form the HBT transistor without additional process steps being needed to build the Schottky diode.
摘要翻译：一种制造具有极高速度和低工作电流的HBT晶体管的方法。晶体管具有小的基极面积和小的发射极区域，其中大部分发射极区域与金属接触，大部分基极区域，发射极外部与金属接触，并且靠近器件发射极和基极放置的集电极欧姆金属欧姆金属。为了实现这一点，该方法包括沿着所有外部边缘部分地切割基极欧姆金属，以减小器件的寄生基极 - 集电极电容。为了提供金属台阶覆盖，底部欧姆金属的底切可以用倾斜的边缘聚合物覆盖。此外，在用于形成HBT晶体管的工艺步骤中可以制造肖特基二极管，而不需要构建肖特基二极管的额外工艺步骤。

7. 发明授权

US5686743A Method of forming airbridged metallization for integrated circuit fabrication 失效
标题翻译：形成用于集成电路制造的气动金属化方法
公开(公告)号：US5686743A
公开(公告)日：1997-11-11
申请号：US679637
申请日：1996-07-10
申请人： Michael D. Lammert
发明人： Michael D. Lammert
IPC分类号： H01L21/3205 , H01L21/768 , H01L23/522 , H05K3/46 , H01L23/48
CPC分类号： H01L21/76885 , H01L21/7682 , H01L23/5221 , H01L2924/0002 , H05K3/4685
摘要： A method for forming an airbridge for interconnecting metal contacts on an integrated circuit. The airbridge is formed by initially patterning a support photoresist between the metal contacts to be interconnected, over the metal contact to be crossed. The pattern support photoresist is flood exposed with UV light and subsequently baked at a relatively high temperature to cause the support photoresist to flow into a generally spherical shape. The airbridged metal lines are patterned over the spherically shaped support photoresist. Excess metallization is lifted off the support photoresist and the photoresist used to pattern the airbridge is removed, forming an airbridge with curvature along both its width and length.
摘要翻译：一种用于形成用于在集成电路上互连金属触点的空气桥的方法。通过在待互连的金属接触件之间，在要交叉的金属接触件上，首先构图支撑光致抗蚀剂，形成空中桥梁。图案支持光致抗蚀剂用UV光进行泛光曝光，随后在相对较高的温度下烘烤，使支持光致抗蚀剂流入大致球形。气流金属线在球形支撑光致抗蚀剂上图案化。从支撑光致抗蚀剂上剥离过多的金属化物质，去除用于图案化空气桥的光致抗蚀剂，形成沿其宽度和长度都具有曲率的空气桥。

8. 发明授权

US06638366B2 Automated spray cleaning apparatus for semiconductor wafers 失效
公开(公告)号：US06638366B2
公开(公告)日：2003-10-28
申请号：US09855962
申请日：2001-05-15
申请人： Michael D. Lammert , Victor J. Watson , John M. DiMond , Michael E. Barsky
发明人： Michael D. Lammert , Victor J. Watson , John M. DiMond , Michael E. Barsky
IPC分类号： B08B302
CPC分类号： H01L21/67051 , B08B3/024 , B08B5/02
摘要： Semiconductor wafer (11) are uniformly and thoroughly cleaned of particulate and organic contaminants by sweeping the wafer with a hydraulic broom that sprays cleaning solution onto the wafer. The broom contains an aspirating nozzle (3) for connection to a source of pressurized gas, such as nitrogen, and to a source of cleaning fluid, such as acetone, wherein cleaning fluid aspirated by the gas stream is expressed through the nozzle outlet to impact the surface of the wafer, dislodging particulate matter and dissolving organic contaminants. A programmed controller (9) controls movement of the hydraulic broom relative to the wafer to ensure that the entire surface is cleaned and permits a variety of sweeping patterns.

9. 发明授权

US06475400B2 Method for controlling the sheet resistance of thin film resistors 有权
公开(公告)号：US06475400B2
公开(公告)日：2002-11-05
申请号：US09793252
申请日：2001-02-26
申请人： Michael D. Lammert
发明人： Michael D. Lammert
IPC分类号： B44C122
CPC分类号： H01C17/2404 , H01C17/24 , H01L28/24
摘要： A method for controlling the sheet resistance of thin film resistors. The sheet resistance can be inexpensively controlled within a tight tolerance by determining a desired final value for the sheet resistance of thin film resistor material to be deposited on a substrate, depositing the resistor material on the substrate using a deposition process which is consistent enough to achieve a target sheet resistance within a first specified tolerance, the resistor material being deposited to achieve a target sheet resistance which is equal to the desired final value minus the first specified tolerance, and removing a small amount of material from the surface of the deposited thin film resistor material by etching or ion bombardment to raise the sheet resistance to the desired final value within a second specified tolerance characteristic of the removing process where the second specified tolerance is less than the first specified tolerance.

10. 发明授权

US5994194A Self-aligned base ohmic metal for an HBT device cross-reference to related applications 失效
标题翻译：用于HBT器件的自对准基极欧姆金属交叉参考相关应用
公开(公告)号：US5994194A
公开(公告)日：1999-11-30
申请号：US074199
申请日：1998-05-07
申请人： Michael D. Lammert
发明人： Michael D. Lammert
IPC分类号： H01L29/73 , H01L21/331 , H01L29/205 , H01L29/737
CPC分类号： H01L29/66318 , Y10S148/072 , Y10S148/10 , Y10S438/926 , Y10S438/944 , Y10S438/945 , Y10S438/951
摘要： A relatively simple method for providing relatively close spacing between the emitter mesa and the base ohmic metal of a heterojunction bipolar transistor (HBT) on a relatively uniform basis. An emitter and base layer are epitaxially grown on a substrate. An emitter mesa is patterned with an i-line negative photoresist using conventional photolithography. Baking before and after exposure is used to form a resist pattern with a re-entrant profile having about a 0.1 .mu.m resist overhang. The emitter layer is then etched with a wet etch and or isotropic dry etch to expose a portion of the base ohmic metal to make contact with the base. A second layer of an i-line negative photoresist is applied over the first photoresist. The second layer is used to pattern the base ohmic metal mask. The base ohmic metal is deposited by evaporation. The resist is stripped from the emitter mesa and the non-base ohmic metal regions which lifts the metal deposited on the resist leaving the metal in the base ohmic metal regions, aligned to the emitter mesa at a uniform spacing.
摘要翻译：在相对均匀的基础上，在异质结双极晶体管（HBT）的发射极台面和基极欧姆金属之间提供相对较小的间距的相对简单的方法。在衬底上外延生长发射极和基极层。使用常规光刻法，用i线负性光致抗蚀剂对发射极台面进行图案化。曝光前后的烘烤用于形成抗蚀剂图案，其具有约0.1μm抗蚀剂突出端的入口轮廓。然后用湿蚀刻和/或各向同性干蚀刻蚀刻发射极层，以暴露基极欧姆金属的一部分以与基底接触。在第一光致抗蚀剂上施加第i层负光致抗蚀剂层。第二层用于对基本欧姆金属掩模进行图案化。通过蒸发沉积基极欧姆金属。抗蚀剂从发射极台面和非基极欧姆金属区域剥离，这些金属区域提升沉积在抗蚀剂上的金属，离开基极欧姆金属区域中的金属，以均匀的间隔与发射极台面对准。

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