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1. 发明授权

US06180533B2 Method for etching a trench having rounded top corners in a silicon substrate 失效
标题翻译：用于蚀刻在硅衬底中具有圆形顶角的沟槽的方法
公开(公告)号：US06180533B2
公开(公告)日：2001-01-30
申请号：US09545700
申请日：2000-04-07
申请人： Alok Jain , Michelle Siew Mooi Low , Gang Zou , David Mui , Dragan Podlesnik , Wei Liu
发明人： Alok Jain , Michelle Siew Mooi Low , Gang Zou , David Mui , Dragan Podlesnik , Wei Liu
IPC分类号： H01L2100
CPC分类号： H01L21/3065 , H01L21/3081 , H01L21/76232
摘要： The present disclosure includes a method of plasma etching a trench having rounded top corners in a silicon substrate. One embodiment includes the following general steps: a) providing a semiconductor structure comprising a hard masking layer, overlying a silicon substrate; b) plasma etching through said hard masking layer and any additional underlying layers overlying said silicon substrate using at least one plasma feed gas which does not provide polymer deposition on surfaces of said semiconductor structure during etching; where said plasma etching exposes a face of said silicon substrate; and c) plasma etching at least a first portion of a trench into said silicon substrate using reactive species generated from a feed gas comprising a source of fluorine, a source of carbon, a source of hydrogen, and a source of high energy species which provide physical bombardment of said silicon substrate. Top corner rounding is effected by deposition of a thin layer of polymer on a top corner of the trench during etching of the first portion of the trench, resulting in the formation of a rounded “shoulder” at the top corner of the trench. Typically a layer of silicon oxide overlies at least a portion of the silicon substrate surface. The method described provides excellent critical dimension control over the active area of a transistor produced using the method and reduces the need to remove polymer from substrate and reactor surfaces after etching of the silicon trench.
摘要翻译：本公开内容包括等离子体蚀刻在硅衬底中具有圆形顶角的沟槽的方法。一个实施例包括以下一般步骤：a）提供包括覆盖硅衬底的硬掩模层的半导体结构; b）使用至少一种在蚀刻期间不提供聚合物沉积在所述半导体结构的表面上的等离子体进料气体来等离子体蚀刻通过所述硬掩模层和覆盖所述硅衬底的任何附加的底层; 其中所述等离子体蚀刻暴露所述硅衬底的表面; 以及c）使用由包含氟源，碳源，氢源和高能量源的进料气体产生的反应性物质将沟槽的至少第一部分等离子体蚀刻到所述硅基板中，所述源提供所述硅衬底的物理轰击。通过在沟槽的第一部分的蚀刻期间在沟槽的顶角上沉积聚合物薄层来实现顶角圆角化，导致在沟槽的顶角形成圆形“肩部”。通常，氧化硅层覆盖硅衬底表面的至少一部分。所描述的方法提供了使用该方法制造的晶体管的有源面积的优异临界尺寸控制，并且减少了在蚀刻硅沟槽之后从衬底和反应器表面除去聚合物的需要。

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