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1. 发明授权

US07190972B1 Method and apparatus for a wireless network 有权
标题翻译：无线网络的方法和装置
公开(公告)号：US07190972B1
公开(公告)日：2007-03-13
申请号：US10425382
申请日：2003-04-28
申请人： Allen L. Hollister , Steve C. Evans
发明人： Allen L. Hollister , Steve C. Evans
IPC分类号： H04B1/40 , H04M1/66
CPC分类号： H04M1/6066 , H04L29/06027 , H04L65/1069 , H04M1/2535 , H04M2250/02 , H04M2250/06 , H04W28/06 , H04W80/00
摘要： The present invention provides a solution to the needs described above through a method and apparatus for a wireless network. The network includes a first wireless device and a second wireless device. The first wireless device comprises a transceiver for receiving and transmitting signals utilizing a wireless air interface and communication protocol. The second wireless device is capable of communicating with the first wireless device using the wireless air interface and communication protocol. The second wireless device is further capable of receiving and transmitting signals utilizing an IEEE 802.11 wireless protocol. The network further includes a wired device for communicating with the second wireless device utilizing the IEEE 802.11 wireless protocol.
摘要翻译：本发明通过无线网络的方法和装置提供了上述需求的解决方案。网络包括第一无线设备和第二无线设备。第一无线设备包括用于使用无线空中接口和通信协议来接收和发送信号的收发器。第二无线设备能够使用无线空中接口和通信协议与第一无线设备进行通信。第二无线设备还能够使用IEEE 802.11无线协议来接收和发送信号。网络还包括用于使用IEEE 802.11无线协议与第二无线设备通信的有线设备。

2. 发明授权

US4791404A Predictive time base control circuit for a waveform system 失效
标题翻译：波形系统的预测时基控制电路
公开(公告)号：US4791404A
公开(公告)日：1988-12-13
申请号：US119289
申请日：1987-11-06
申请人： Allen L. Hollister
发明人： Allen L. Hollister
IPC分类号： G01R13/34 , H03M1/36
CPC分类号： G01R13/34
摘要： A predictive time base control circuit for a waveform sampling system of the type which converts a sequence of analog waveform samples into a sequence of digital quantities for storage in an addressable acquisition memory. The time base circuit generates a sampling control signal which initiates sampling at the end of a time interval of programmable duration following detection of a triggering event in the waveform, and which maintains sampling thereafter at regular intervals. The time base circuit permits the sampling system to operate in an equivalent time mode in which repetitive waveform sections are sampled at progressively skewed sampling intervals with respect to a repetitive triggering event. The sampling control signal is also frequency divided, delayed, and then applied as a write control signal to the sampling system acquisition memory. The time base control circuit includes a memory addressing circuit responsive to the write control signal for incrementing the address of the acquisition memory by an adjustable step size each time data is stored in the memory, thereby facilitating proper ordering of sample data in the memory.
摘要翻译：一种用于波形采样系统的预测时基控制电路，该系统将一系列模拟波形样本转换成数字量序列，以存储在可寻址采集存储器中。时基电路产生采样控制信号，其在检测到波形中的触发事件之后的可编程持续时间的时间间隔结束时启动采样，并且以其间隔定期地维持采样。时基电路允许采样系统在等效时间模式下操作，其中重复波形段相对于重复触发事件以逐渐偏斜的采样间隔进行采样。采样控制信号也被分频，延迟，然后作为写入控制信号施加到采样系统采集存储器。时基控制电路包括响应写控制信号的存储器寻址电路，用于每当数据存储在存储器中时将采集存储器的地址递增可调步长，从而便于存储器中样本数据的正确排序。

3. 发明授权

US4646030A Triggered frequency locked oscillator having programmable delay circuit 失效
标题翻译：具有可编程延迟电路的触发锁频振荡器
公开(公告)号：US4646030A
公开(公告)日：1987-02-24
申请号：US835583
申请日：1986-03-03
申请人： Allen L. Hollister
发明人： Allen L. Hollister
IPC分类号： H03K3/03 , H03K7/06 , H03L7/099 , H03L7/181 , H03L7/00
CPC分类号： H03K3/03 , H03K7/06 , H03L7/0995 , H03L7/181 , Y10S331/03
摘要： An oscillator produces an output signal which is frequency locked to a reference signal but phased locked to a triggering signal. The oscillator includes a NOR gate having its output fed back to one of its inputs through a programmable delay circuit while the triggering signal is applied to another of its inputs. When enabled by the triggering signal, the output signal of the NOR gate oscillates at a frequency inversely proportional to the delay time of the delay circuit. The delay time is controlled by a control circuit which counts NOR gate output signal cycles occurring during a predetermined number of reference signal cycles and increments the delay time when the count is higher than expected for an oscillator output signal of a desired frequency and decrements the delay time when the count is lower than expected.
摘要翻译：振荡器产生频率锁定到参考信号但被锁相到触发信号的输出信号。振荡器包括NOR门，其NOR输出端通过可编程延迟电路反馈到其输入端之一，同时将触发信号施加到其另一个输入端。当触发信号使能时，NOR门的输出信号以与延迟电路的延迟时间成反比的频率振荡。延迟时间由控制电路控制，该控制电路在预定数量的参考信号周期期间计数NOR门输出信号周期，并且当计数高于期望频率的振荡器输出信号的预期时延迟延迟时间，并且减小延迟计数低于预期的时间。

4. 发明授权

US4799165A Level detecting waveform sampling system 失效
标题翻译：电平检测波形采样系统
公开(公告)号：US4799165A
公开(公告)日：1989-01-17
申请号：US835417
申请日：1986-03-03
申请人： Allen L. Hollister , Edward L. Reuss
发明人： Allen L. Hollister , Edward L. Reuss
IPC分类号： G01R13/20 , G01R13/34 , G01R29/02 , H03K5/135 , H03K7/02 , G09G1/00 , H01J29/98
CPC分类号： G01R13/34 , H03K5/135
摘要： A level detecting waveform digitizer for repetitively sampling an analog waveform and converting analog samples into representative digital data is provided with a predictive time base circuit for accurately controlling sample timing with respect to a triggering event in the input waveform and a comparator for indicating when the magnitude of the waveform as indicated by the digital data exceeds a predetermined level. The digitizer also includes a counter for counting samples taken and a second comparator for indicating when the sample count reaches a predetermined limit.
摘要翻译：用于对模拟波形重复采样并将模拟样本转换成代表数字数据的电平检测波形数字转换器具有用于相对于输入波形中的触发事件精确控制采样定时的预测时基电路，以及用于指示何时大小由数字数据指示的波形超过预定电平。数字转换器还包括用于计数取样的计数器和用于指示样本计数何时达到预定极限的第二比较器。

5. 发明授权

US4707834A Computer-based instrument system 失效
标题翻译：基于计算机的仪器系统
公开(公告)号：US4707834A
公开(公告)日：1987-11-17
申请号：US777104
申请日：1985-09-17
申请人： Arnold M. Frisch , Allen L. Hollister , Larry L. Hutchinson
发明人： Arnold M. Frisch , Allen L. Hollister , Larry L. Hutchinson
IPC分类号： G05B15/02 , G01R31/319 , G06F13/38 , G06F15/16 , G06F15/173 , G06F11/00
CPC分类号： G01R31/31922 , G01R31/31907 , G01R31/31908 , G06F13/385
摘要： A computer-based instrument system is provided for progammably configuring a variety of computer-based test instruments for performing a variety of tests and permitting high speed execution of tests through concurrent operation of individual test instruments. The instruments are implemented on circuit boards and mounted in a chassis including permanent backplane wiring interconnecting the instruments and a timing and triggering control unit. The backplane wiring includes a conventional computer bus for carrying instructions from a master controller to each instrument and lines for a common system clock signal, protocol signals, and trigger signals between selected instruments and the timing and triggering control unit for synchronizing the operation of the instruments when performing a test. The timing and triggering control unit is adapted to programmably control instrument triggering according to individual test requirements without modification of backplane wiring. The backplane wiring further includes a high speed data bus for rapidly transferring data between instruments in the course of a test.
摘要翻译：提供了一种基于计算机的仪器系统，用于可程式地配置各种基于计算机的测试仪器，用于执行各种测试，并允许通过单独测试仪器的并发操作高速执行测试。这些仪器在电路板上实现，并安装在底盘中，其中包括连接仪器的永久背板布线和定时和触发控制单元。背板布线包括用于承载来自主控制器到每个仪器的指令的常规计算机总线，以及用于公共系统时钟信号，协议信号和所选择的仪器之间的触发信号的线路以及用于使仪器的操作同步的定时和触发控制单元进行测试时。定时和触发控制单元适用于可编程控制根据单独测试要求的仪器触发，而无需修改背板接线。背板布线还包括用于在测试过程中在仪器之间快速传输数据的高速数据总线。

6. 发明授权

US4755951A Method and apparatus for digitizing a waveform 失效
标题翻译：用于数字化波形的方法和装置
公开(公告)号：US4755951A
公开(公告)日：1988-07-05
申请号：US835582
申请日：1986-03-03
申请人： Allen L. Hollister
发明人： Allen L. Hollister
IPC分类号： G01R13/20 , G01R13/22 , G01R13/34 , H03K5/135 , H03M1/10 , G01R23/16 , H03K13/02
CPC分类号： G01R13/34 , H03K5/135
摘要： A waveform digitizer includes a sampling bridge for producing a sequence of analog samples of an input waveform, the samples being calibrated by an amplifier having adjustable offset and gain and then converted to digital quantities for storage in an addressable memory. The digitizer also includes memory and time base control circuits permitting real and equivalent time sampling of repetitive waveforms and logic circuits providing hardware averaging of multiple data samples.
摘要翻译：波形数字转换器包括用于产生输入波形的模拟样本序列的采样桥，样本由具有可调偏移和增益的放大器校准，然后转换成数字量以存储在可寻址存储器中。数字转换器还包括存储器和时基控制电路，允许重复波形的实时和等效时间采样以及提供多个数据样本的硬件平均的逻辑电路。

7. 发明授权

US4578667A Digital acquisition system including a high-speed sampling gate 失效
标题翻译：数字采集系统包括高速采样门
公开(公告)号：US4578667A
公开(公告)日：1986-03-25
申请号：US593010
申请日：1984-03-23
申请人： Allen L. Hollister
发明人： Allen L. Hollister
IPC分类号： H03M1/12 , G01R13/20 , G01R13/34 , G01R19/25 , H03M1/00 , H03M13/00
CPC分类号： G01R13/345 , H03M1/1047
摘要： A digital acquisition system includes a high-speed sampling gate with analog memory for sampling input signals. The samples are converted to digital representations and stored in a digital memory. The digital representations are selectively recalled from the digital memory and fed back as estimators to the sampling gate's analog memory. Since the estimators are essentially the previous samples for each point of a given waveform, the stored waveform converges to the input waveform very quickly, facilitating accurate waveform replication. Embodiments for both sequential sampling and pseudo-random sampling are provided. Operational techniques of the digital acquisition system include noise reduction, loop gain determination, adaptive filtering and signal averaging.
摘要翻译：数字采集系统包括具有用于采样输入信号的模拟存储器的高速采样门。样本被转换为数字表示并存储在数字存储器中。从数字存储器选择性地调用数字表示，并将其作为估计器反馈到采样门的模拟存储器。由于估计器基本上是给定波形的每个点的先前采样，所以存储的波形非常快速地收敛到输入波形，有助于精确的波形复制。提供了连续采样和伪随机采样的实施例。数字采集系统的操作技术包括降噪，环路增益确定，自适应滤波和信号平均。

8. 发明授权

US4739277A Triggered, programmable skew signal generator 失效
标题翻译：触发的可编程偏移信号发生器
公开(公告)号：US4739277A
公开(公告)日：1988-04-19
申请号：US835412
申请日：1986-03-03
申请人： Allen L. Hollister , Philip S. Crosby
发明人： Allen L. Hollister , Philip S. Crosby
IPC分类号： H03K5/135 , G01R13/32 , H03B28/00 , H03K5/15
CPC分类号： G01R13/32
摘要： A signal generator for producing a triggered output signal of digitally controlled phase and frequency includes a skewing circuit for producing an output clock signal of the same period, T, as an input, triggered reference clock signal but which is phase skewed from the reference clock signal by a phase angle, P, of 0 to 360 degrees as determined by input digital data. The skewed clock signal is frequency divided by an integer factor N, and a timing circuit counts reference clock periods to initiate frequency division a programmable delay time (J.times.T seconds) following triggering of the reference clock signal, where J and N are integers also determined by input digital data. An AND gate qualifies the frequency divided skewed clock signal with the skewed clock signal itself to produce a periodic output signal of digitally controlled frequency N/T, the first pulse of which is delayed following triggering of the reference signal by a digitally controlled interval of (T.times.J)+(P.times.T/360) seconds.
摘要翻译：用于产生数字控制的相位和频率的触发输出信号的信号发生器包括用于产生相同周期的输出时钟信号的偏斜电路T作为输入触发的参考时钟信号，但是从参考时钟信号通过输入数字数据确定的0到360度的相位角P。偏斜时钟信号被除以整数因子N，并且定时电路对参考时钟周期进行计数，以在触发参考时钟信号之后启动分频可编程延迟时间（JxT秒），其中J和N也是由输入数字数据。与门对频分频偏移时钟信号与偏斜时钟信号本身进行限定，以产生数字控制频率N / T的周期性输出信号，其第一脉冲在触发参考信号之后被数字控制的间隔（ TxJ）+（PxT / 360）秒。

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