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    • 3. 发明授权
    • Circuits for detecting framing bits in a t.d.m. bit stream
    • 用于检测t.d.m.中的成帧位的电路 位流
    • US4622666A
    • 1986-11-11
    • US680436
    • 1984-12-10
    • Alan F. GravesPaul A. LittlewoodJohannes S. Weiss
    • Alan F. GravesPaul A. LittlewoodJohannes S. Weiss
    • H04J3/06
    • H04J3/0617
    • A framing circuit is disclosed for detecting framing bits in a t.d.m. bit stream having an extended DS1 framing format. The circuit comprises a RAM for storing in respect of each of the 772 time channels the five most recent information bits of the time channel and three other, candidate, bits which represent the likelihood that the particular time channel carries the framing bit pattern. The current and five stored information bits of each time channel are checked to detect the six-bit framing bit pattern. The candidate bits have their value increased or decreased, within predetermined limits, in dependence upon whether or not a phase of the framing bit pattern is detected, and the updated information and candidate bits are stored in the RAM. The modification of the candidate bits in this manner is effected in only every third 772-bit frame. A framing signal is produced in dependence upon the candidate bits.
    • 公开了一种用于检测t.d.m中的成帧位的成帧电路。 具有扩展的DS1成帧格式的比特流。 该电路包括RAM,用于存储772个时间通道中的每一个时钟信道的五个最新信息位以及表示特定时间信道携带成帧位模式的可能性的三个其他候选位。 检查每个时间通道的当前和五个存储的信息位以检测六位成帧位模式。 根据是否检测到成帧位模式的相位,并且更新的信息和候选比特存储在RAM中,候选比特在其预定限制内增加或减少其值。 以这种方式对候选比特的修改仅在每第三个772比特帧中实现。 根据候选位产生成帧信号。