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    • 7. 发明授权
    • Vertical type semiconductor device and method for producing the same
    • 垂直型半导体装置及其制造方法
    • US5250449A
    • 1993-10-05
    • US767313
    • 1991-09-30
    • Akira KuroyanagiMasami YamaokaYoshifumi Okabe
    • Akira KuroyanagiMasami YamaokaYoshifumi Okabe
    • H01L21/336H01L29/10H01L29/423H01L29/739H01L29/78H01L21/265
    • H01L29/66719H01L29/1095H01L29/66712H01L29/7811H01L29/0615H01L29/0638H01L29/402H01L29/42368Y10S148/126
    • The present invention has as an object the provision of a vertical type semiconductor device whereby miniaturization and lowered ON resistance of the cell can be achieved without impairing the functioning of the device.The line width of the gate electrode is made smaller to meet the demand for miniaturization of the cell, but the distance between the channel regions diffused into the portions below the gate at the time of double diffusion is kept to be virtually equal to that in the device of larger cell size having a low J.sub.FET resistance component. Here, the reason for making the line width of the gate electrode smaller is for securing an area for the source contact.The point is that, while the width of the gate electrode is set to be smaller, the mask members as the mask for double diffusion, having the width allowing the source region to diffuse to the portion under the gate, are attached to the side walls of the gate electrode.Thereby, miniaturization and lowered ON resistance of the cell can be achieved without impairing the functioning of the device.
    • 本发明的目的是提供一种垂直型半导体器件,由此可以实现电池的小型化和降低的导通电阻,而不会损害器件的功能。 使栅电极的线宽变小以满足电池小型化的需要,但是扩散到双扩散时的栅极下方的沟道区域之间的距离保持实质上等于 具有低JFET电阻分量的较大单元尺寸的器件。 这里,使栅电极的线宽变小的原因是为了确保源极接触的面积。 要注意的是,尽管栅电极的宽度被设定得较小,但是具有允许源极区域扩散到栅极下方的宽度的双扩散掩模的掩模构件附接到侧壁 的栅电极。 由此,可以实现电池的小型化和降低的导通电阻,而不会损害器件的功能。