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1. 发明申请

US20090194821A1 SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090194821A1
公开(公告)日：2009-08-06
申请号：US12359974
申请日：2009-01-26
申请人： Akio KANEKO , Seiji Inumiya , Tomonori Aoyama , Takuya Kobayashi
发明人： Akio KANEKO , Seiji Inumiya , Tomonori Aoyama , Takuya Kobayashi
IPC分类号： H01L29/68 , H01L21/8238
CPC分类号： H01L21/823807 , H01L21/0245 , H01L21/02532 , H01L21/02667 , H01L21/823431 , H01L21/82385 , H01L21/823857 , H01L27/0886 , H01L27/0922 , H01L29/1037 , H01L29/1054 , H01L29/665 , H01L29/6659 , H01L29/66651 , H01L29/66795 , H01L29/7834 , H01L29/7851 , H01L29/7853
摘要： A method of fabricating a semiconductor device according to one embodiment includes: forming a SiGe crystal layer on a semiconductor substrate, the SiGe crystal layer having a first plane and a second plane inclined with respect to the first plane; forming an amorphous Si film on the SiGe crystal layer; crystallizing a portion located adjacent to the first and second planes of the amorphous Si film by applying heat treatment using the first and second planes of the SiGe crystal layer as a seed, thereby forming a Si crystal layer; selectively removing or thinning a portion of the amorphous Si film that is not crystallized by the heat treatment; applying oxidation treatment to a surface of the Si crystal layer, thereby forming a gate insulating film on the surface of the Si crystal layer; and forming a gate electrode on the gate insulating film.
摘要翻译：根据一个实施例的制造半导体器件的方法包括：在半导体衬底上形成SiGe晶体层，所述SiGe晶体层具有第一平面和相对于第一平面倾斜的第二平面; 在SiGe晶体层上形成非晶Si膜; 通过使用SiGe晶体层的第一和第二平面作为种子进行热处理，使位于非晶Si膜的第一和第二平面附近的部分结晶，从而形成Si晶体层; 通过热处理选择性去除或稀薄未结晶的非晶Si膜的一部分; 对Si晶体层的表面进行氧化处理，从而在Si晶体层的表面上形成栅极绝缘膜; 以及在所述栅极绝缘膜上形成栅电极。

2. 发明授权

US08039333B2 Semiconductor device and method of fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08039333B2
公开(公告)日：2011-10-18
申请号：US12359974
申请日：2009-01-26
申请人： Akio Kaneko , Seiji Inumiya , Tomonori Aoyama , Takuya Kobayashi
发明人： Akio Kaneko , Seiji Inumiya , Tomonori Aoyama , Takuya Kobayashi
IPC分类号： H01L21/336 , H01L21/8234
CPC分类号： H01L21/823807 , H01L21/0245 , H01L21/02532 , H01L21/02667 , H01L21/823431 , H01L21/82385 , H01L21/823857 , H01L27/0886 , H01L27/0922 , H01L29/1037 , H01L29/1054 , H01L29/665 , H01L29/6659 , H01L29/66651 , H01L29/66795 , H01L29/7834 , H01L29/7851 , H01L29/7853
摘要： A method of fabricating a semiconductor device according to one embodiment includes: forming a SiGe crystal layer on a semiconductor substrate, the SiGe crystal layer having a first plane and a second plane inclined with respect to the first plane; forming an amorphous Si film on the SiGe crystal layer; crystallizing a portion located adjacent to the first and second planes of the amorphous Si film by applying heat treatment using the first and second planes of the SiGe crystal layer as a seed, thereby forming a Si crystal layer; selectively removing or thinning a portion of the amorphous Si film that is not crystallized by the heat treatment; applying oxidation treatment to a surface of the Si crystal layer, thereby forming a gate insulating film on the surface of the Si crystal layer; and forming a gate electrode on the gate insulating film.
摘要翻译：根据一个实施例的制造半导体器件的方法包括：在半导体衬底上形成SiGe晶体层，所述SiGe晶体层具有第一平面和相对于第一平面倾斜的第二平面; 在SiGe晶体层上形成非晶Si膜; 通过使用SiGe晶体层的第一和第二平面作为种子进行热处理，使位于非晶Si膜的第一和第二平面附近的部分结晶，从而形成Si晶体层; 通过热处理选择性去除或稀薄未结晶的非晶Si膜的一部分; 对Si晶体层的表面进行氧化处理，从而在Si晶体层的表面上形成栅极绝缘膜; 以及在所述栅极绝缘膜上形成栅电极。

3. 发明申请

US20090114996A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20090114996A1
公开(公告)日：2009-05-07
申请号：US12261770
申请日：2008-10-30
申请人： Seiji Inumiya , Takuya Kobayashi , Tomonori Aoyama
发明人： Seiji Inumiya , Takuya Kobayashi , Tomonori Aoyama
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823857 , H01L21/02148 , H01L21/02156 , H01L21/02161 , H01L21/02178 , H01L21/02192 , H01L21/022 , H01L21/0228 , H01L21/02332 , H01L21/0234 , H01L21/3162 , H01L21/31641 , H01L21/31645
摘要： A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first region and a second conductivity type second MISFET formed in the second region. The first MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate and a first insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film and which has a first element forming electric dipoles that reduce a threshold voltage of the first MISFET and the second MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate, and a second insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film formed on the surface of the substrate and which has a second element forming electric dipoles in a direction opposite to that in the first MISFET.
摘要翻译：半导体器件包括在其表面上具有第一和第二区域的衬底，在第一区域中形成的第一导电类型的第一MISFET和形成在第二区域中的第二导电类型的第二MISFET。第一MISFET包括在基板的表面上形成的氧化硅膜或氮氧化硅膜，以及形成为与氧化硅膜或氮氧化硅膜接触形成的第一元件的第一绝缘膜，其具有形成电偶极子的第一元件，降低第一MISFET的阈值电压，并且第二MISFET包括在衬底的表面上形成的氧化硅膜或氧氮化硅膜，以及形成为与氧化硅膜或氮氧化硅膜接触的第二绝缘膜形成在基板的表面上，并且具有在与第一MISFET中的方向相反的方向上形成电偶极子的第二元件。

4. 发明申请

US20100065918A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100065918A1
公开(公告)日：2010-03-18
申请号：US12561862
申请日：2009-09-17
申请人： Daisuke Ikeno , Tomonori Aoyama , Kazuaki Nakajima , Seiji Inumiya , Takashi Shimizu , Takuya Kobayashi
发明人： Daisuke Ikeno , Tomonori Aoyama , Kazuaki Nakajima , Seiji Inumiya , Takashi Shimizu , Takuya Kobayashi
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823807 , H01L21/823828
摘要： A semiconductor device includes a semiconductor substrate containing a p-type diffusion layer and an n-type diffusion layer which are separated by an element separation film; a gate insulating film formed on or above the p-type diffusion layer and the n-type diffusion layer of the semiconductor substrate, respectively; a gate electrode containing a metallic film and formed on the gate insulating film; a Ge inclusion formed at an interface between the gate insulating film and the metallic film; and a silicon-containing layer formed on the metallic film.
摘要翻译：半导体器件包括由元件分离膜分离的包含p型扩散层和n型扩散层的半导体衬底; 分别形成在所述p型扩散层和所述半导体衬底的n型扩散层上或之上的栅绝缘膜; 含有金属膜并形成在栅极绝缘膜上的栅电极; 形成在栅极绝缘膜和金属膜之间的界面处的Ge夹杂物; 以及形成在金属膜上的含硅层。

5. 发明授权

US08198155B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08198155B2
公开(公告)日：2012-06-12
申请号：US12693985
申请日：2010-01-26
申请人： Daisuke Ikeno , Tomonori Aoyama , Kazuaki Nakajima , Seiji Inumiya , Takashi Shimizu , Takuya Kobayashi
发明人： Daisuke Ikeno , Tomonori Aoyama , Kazuaki Nakajima , Seiji Inumiya , Takashi Shimizu , Takuya Kobayashi
IPC分类号： H01L21/8234 , H01L21/8238 , H01L29/51
CPC分类号： H01L21/823842 , H01L21/28088 , H01L21/823807 , H01L21/82385 , H01L29/1054 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6659
摘要： A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate. The device includes the substrate, a first gate insulation film formed on the substrate in the first and second regions, and containing silicon, a second gate insulation film formed on the first gate insulation film in the first region, and containing first metal and oxygen, a third gate insulation film formed on the first gate insulation film in the second region, and containing second metal different from the first metal and oxygen, a fourth gate insulation film formed on the second and third gate insulation films in the first and second regions, and containing hafnium, and a gate electrode layer formed on the fourth gate insulation film in the first and second regions, and containing metal and nitrogen, a thickness of the gate electrode layer formed in the second region being greater than a thickness of the gate electrode layer formed in the first region.
摘要翻译：根据本发明的实施例的半导体器件包括形成在衬底上的第一区域中的N型晶体管和形成在衬底上的第二区域中的P型晶体管。该器件包括衬底，形成在第一和第二区域的衬底上并含有硅的第一栅极绝缘膜，形成在第一区域中的第一栅极绝缘膜上并且包含第一金属和氧的第二栅极绝缘膜，形成在所述第二区域中的所述第一栅极绝缘膜上并且包含不同于所述第一金属和氧的第二金属的第三栅极绝缘膜，形成在所述第一和第二区域中的所述第二和第三栅极绝缘膜上的第四栅极绝缘膜，并且含有铪，以及形成在第一和第二区域中的第四栅极绝缘膜上并且包含金属和氮的栅极电极层，在第二区域中形成的栅电极层的厚度大于栅电极的厚度层形成在第一区域中。

6. 发明授权

US08143676B2 Semiconductor device having a high-dielectric-constant gate insulating film 失效
标题翻译：具有高介电常数栅极绝缘膜的半导体器件
公开(公告)号：US08143676B2
公开(公告)日：2012-03-27
申请号：US12261770
申请日：2008-10-30
申请人： Seiji Inumiya , Takuya Kobayashi , Tomonori Aoyama
发明人： Seiji Inumiya , Takuya Kobayashi , Tomonori Aoyama
IPC分类号： H01L21/02
CPC分类号： H01L21/823857 , H01L21/02148 , H01L21/02156 , H01L21/02161 , H01L21/02178 , H01L21/02192 , H01L21/022 , H01L21/0228 , H01L21/02332 , H01L21/0234 , H01L21/3162 , H01L21/31641 , H01L21/31645
摘要： A semiconductor device includes a substrate having first and second regions on a surface thereof, a first conductivity type first MISFET formed in the first region and a second conductivity type second MISFET formed in the second region. The first MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate and a first insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film and which has a first element forming electric dipoles that reduce a threshold voltage of the first MISFET and the second MISFET includes a silicon oxide film or a silicon oxynitride film formed on the surface of the substrate, and a second insulating film which is formed in contact with the silicon oxide film or the silicon oxynitride film formed on the surface of the substrate and which has a second element forming electric dipoles in a direction opposite to that in the first MISFET.
摘要翻译：半导体器件包括在其表面上具有第一和第二区域的衬底，在第一区域中形成的第一导电类型的第一MISFET和形成在第二区域中的第二导电类型的第二MISFET。第一MISFET包括在基板的表面上形成的氧化硅膜或氮氧化硅膜，以及形成为与氧化硅膜或氮氧化硅膜接触形成的第一元件的第一绝缘膜，其具有形成电偶极子的第一元件，降低第一MISFET的阈值电压，并且第二MISFET包括在衬底的表面上形成的氧化硅膜或氧氮化硅膜，以及形成为与氧化硅膜或氮氧化硅膜接触的第二绝缘膜形成在基板的表面上，并且具有在与第一MISFET中的方向相反的方向上形成电偶极子的第二元件。

7. 发明申请

US20100187612A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100187612A1
公开(公告)日：2010-07-29
申请号：US12693985
申请日：2010-01-26
申请人： Daisuke IKENO , Tomonori Aoyama , Kazuaki Nakajima , Seiji Inumiya , Takashi Shimizu , Takuya Kobayashi
发明人： Daisuke IKENO , Tomonori Aoyama , Kazuaki Nakajima , Seiji Inumiya , Takashi Shimizu , Takuya Kobayashi
IPC分类号： H01L27/092 , H01L21/8238
CPC分类号： H01L21/823842 , H01L21/28088 , H01L21/823807 , H01L21/82385 , H01L29/1054 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/6659
摘要： A semiconductor device according to an embodiment of the present invention includes an N-type transistor formed in a first region on a substrate, and a P-type transistor formed in a second region on the substrate. The device includes the substrate, a first gate insulation film formed on the substrate in the first and second regions, and containing silicon, a second gate insulation film formed on the first gate insulation film in the first region, and containing first metal and oxygen, a third gate insulation film formed on the first gate insulation film in the second region, and containing second metal different from the first metal and oxygen, a fourth gate insulation film formed on the second and third gate insulation films in the first and second regions, and containing hafnium, and a gate electrode layer formed on the fourth gate insulation film in the first and second regions, and containing metal and nitrogen, a thickness of the gate electrode layer formed in the second region being greater than a thickness of the gate electrode layer formed in the first region.
摘要翻译：根据本发明的实施例的半导体器件包括形成在衬底上的第一区域中的N型晶体管和形成在衬底上的第二区域中的P型晶体管。该器件包括衬底，形成在第一和第二区域的衬底上并含有硅的第一栅极绝缘膜，形成在第一区域中的第一栅极绝缘膜上并且包含第一金属和氧的第二栅极绝缘膜，形成在所述第二区域中的所述第一栅极绝缘膜上并且包含不同于所述第一金属和氧的第二金属的第三栅极绝缘膜，形成在所述第一和第二区域中的所述第二和第三栅极绝缘膜上的第四栅极绝缘膜，并且含有铪，以及形成在第一和第二区域中的第四栅极绝缘膜上并且包含金属和氮的栅极电极层，在第二区域中形成的栅电极层的厚度大于栅电极的厚度层形成在第一区域中。

8. 发明申请

US20120045882A1 SEMICONDUCTOR DEVICE MANUFACTURING METHOD 有权
标题翻译：半导体器件制造方法
公开(公告)号：US20120045882A1
公开(公告)日：2012-02-23
申请号：US13282507
申请日：2011-10-27
申请人： Seiji Inumiya , Tomonori Aoyama
发明人： Seiji Inumiya , Tomonori Aoyama
IPC分类号： H01L21/762 , H01L21/28
CPC分类号： H01L21/28167 , H01L21/02057 , H01L21/28088 , H01L21/28194 , H01L21/28202 , H01L21/7624 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66795 , H01L29/785
摘要： A semiconductor device manufacturing method includes: removing an insulating film on a semiconductor substrate by etching and subsequently oxidizing a surface of the semiconductor substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the semiconductor substrate on the surface of the semiconductor substrate; forming a second insulating film containing an aluminum oxide on the first insulating film; forming a third insulating film containing a rare earth oxide on the second insulating film; forming a high-k insulating film on the third insulating film; introducing nitrogen into the high-k insulating film to thereby make it a fourth insulating film; and conducting heat treatment to change the first through third insulating films into a insulating film made of a mixture containing aluminum, a rare earth element, the constituent element of the semiconductor substrate, and oxygen.
摘要翻译：半导体器件制造方法包括：通过使用液体氧化剂蚀刻并随后氧化半导体衬底的表面而在半导体衬底上去除绝缘膜而不将该表面暴露在大气中，从而形成含有氧化物的第一绝缘膜半导体衬底的表面上的构成元件; 在所述第一绝缘膜上形成含有氧化铝的第二绝缘膜; 在所述第二绝缘膜上形成含有稀土类氧化物的第三绝缘膜; 在第三绝缘膜上形成高k绝缘膜; 将氮引入高k绝缘膜，从而使其成为第四绝缘膜; 并且进行热处理以将第一至第三绝缘膜改变为由含有铝，稀土元素，半导体衬底的构成元素和氧的混合物制成的绝缘膜。

9. 发明授权

US08435858B2 Semiconductor device manufacturing method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US08435858B2
公开(公告)日：2013-05-07
申请号：US13282507
申请日：2011-10-27
申请人： Seiji Inumiya , Tomonori Aoyama
发明人： Seiji Inumiya , Tomonori Aoyama
IPC分类号： H01L21/336
CPC分类号： H01L21/28167 , H01L21/02057 , H01L21/28088 , H01L21/28194 , H01L21/28202 , H01L21/7624 , H01L21/823857 , H01L29/4966 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66795 , H01L29/785
摘要： A semiconductor device manufacturing method includes: removing an insulating film on a semiconductor substrate by using wet etching and subsequently oxidizing a surface of the substrate by using a liquid oxidation agent without exposing this surface to an atmosphere, thereby forming a first insulating film containing an oxide of a constituent element of the substrate on the surface of the substrate; forming a second insulating film containing aluminum and another metal element on the first insulating film; forming a high-k insulating film containing at least one of hafnium and zirconium on the second insulating film; forming a metal film on the high-k insulating film; and conducting heat treatment to react the first insulating film and the second insulating film, thereby forming a third insulating film made of a mixture containing aluminum, the another metal element, the constituent element of the substrate, and oxygen.
摘要翻译：半导体器件制造方法包括：通过使用湿法蚀刻在半导体衬底上去除绝缘膜，随后通过使用液体氧化剂氧化衬底的表面而不将该表面暴露在大气中，从而形成含有氧化物的第一绝缘膜所述基板表面上的所述基板的构成元件; 在所述第一绝缘膜上形成含有铝和另一金属元素的第二绝缘膜; 在所述第二绝缘膜上形成含有铪和锆中的至少一种的高k绝缘膜; 在高k绝缘膜上形成金属膜; 进行热处理以使第一绝缘膜和第二绝缘膜反应，从而形成由含有铝，另一金属元素，基板的构成元素和氧的混合物制成的第三绝缘膜。

10. 发明授权

US08183641B2 Semiconductor device and method for manufacturing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08183641B2
公开(公告)日：2012-05-22
申请号：US12626216
申请日：2009-11-25
申请人： Seiji Inumiya , Tomonori Aoyama
发明人： Seiji Inumiya , Tomonori Aoyama
IPC分类号： H01L29/76
CPC分类号： H01L21/823857 , H01L29/513 , H01L29/517
摘要： A silicon oxynitride film is formed on entire surface of a semiconductor substrate, a lanthanum oxide film is formed on the silicon oxynitride film and the lanthanum oxide film is removed from a pMOS region. Then, a nitrided hafnium silicate film serving as a highly dielectric film is formed on the entire surface, an aluminum-containing titanium nitride film is formed, a polysilicon film is formed, and the stacked films are patterned into a gate electrode configuration. Next, impurities are introduced into a source/drain region, and an annealing for activating the impurities is utilized to diffuse the aluminum included in the aluminum-containing titanium nitride film to the interface between the silicon oxynitride film and the nitrided hafnium aluminum silicate film in the pMOS region.
摘要翻译：在半导体衬底的整个表面上形成氧氮化硅膜，在氧氮化硅膜上形成氧化镧膜，并从pMOS区域除去氧化镧膜。然后，在整个表面上形成用作高电介质膜的氮化铪硅酸盐膜，形成含铝的氮化钛膜，形成多晶硅膜，并将层叠的膜图案化为栅电极构造。接下来，将杂质引入源极/漏极区域，并且利用用于激活杂质的退火将包含在含铝氮化钛膜中的铝扩散到氮氧化硅膜和氮化铪硅酸铝膜之间的界面 pMOS区域。

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