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1. 发明授权

US06363791B1 Pressure sensor 失效
标题翻译：压力传感器
公开(公告)号：US06363791B1
公开(公告)日：2002-04-02
申请号：US09356666
申请日：1999-07-19
申请人： Akihito Kurosaka , Osamu Nakao , Takanao Suzuki , Masahiro Sato , Hitoshi Nishimura
发明人： Akihito Kurosaka , Osamu Nakao , Takanao Suzuki , Masahiro Sato , Hitoshi Nishimura
IPC分类号： G01L912
CPC分类号： G01L9/0073
摘要： A capacitance pressure sensor that prevents leakage from outside the sensor to the reference pressure cavity, has a structure that can decrease defects due to leakage compared to conventional technology. An electrode comprising a thin metallic layer is formed on the upper surface of a glass substrate that forms one of the substrates of a pressure sensor and an external electrode is formed on the surface edge of the substrate. In addition, in the region where the silicon substrate is bonded, a feedthrough extending from the electrode to the external electrode is formed, and spine shaped layers with three braches for blocking leakage gas are formed perpendicularly to the feedthrough.
摘要翻译：阻止传感器外部泄漏到参考压力腔的电容式压力传感器具有与传统技术相比能够减少泄漏的缺陷的结构。在形成压力传感器的基板之一的玻璃基板的上表面上形成有薄金属层的电极，在基板的表面边缘上形成外部电极。此外，在硅基板接合的区域中，形成从电极延伸到外部电极的馈通，并且与馈通垂直地形成具有三个用于阻断泄漏气体的支柱的脊形层。

2. 发明授权

US06860154B2 Pressure sensor and manufacturing method thereof 失效
标题翻译：压力传感器及其制造方法
公开(公告)号：US06860154B2
公开(公告)日：2005-03-01
申请号：US10047627
申请日：2002-01-14
申请人： Satoshi Yamamoto , Osamu Nakao , Hitoshi Nishimura , Masahiro Sato
发明人： Satoshi Yamamoto , Osamu Nakao , Hitoshi Nishimura , Masahiro Sato
IPC分类号： G01L1/14 , G01L9/00 , G01L9/12 , G01L7/08 , G01L9/16
CPC分类号： G01L9/0073 , G01L1/148
摘要： It is an object of the present invention to provide a touch mode capacitive pressure sensor having higher pressure durability than conventional sensors. In this invention, a touch mode capacitive pressure sensor has a diaphragm made from boron-doped silicon, and the boron concentration at the top face of the diaphragm is equal to or greater than 1×1019 cm−3 and less than 9×1019 cm−3. Further, in this invention, a touch mode capacitive pressure sensor has a conductive diaphragm made by doping of an impurity and anisotropic etching, and the etch pit density on the top face of the diaphragm is equal to or less than five per μm2, and preferably equal to or less than one per μm2. As a result, the pressure durability of the diaphragm is greatly improved.
摘要翻译：本发明的目的是提供一种具有比常规传感器更高的耐压耐久性的触摸模式电容式压力传感器。在本发明中，触摸模式电容式压力传感器具有由硼掺杂硅制成的光阑，并且隔膜顶面的硼浓度等于或大于1×10 19 cm -3且小于9×10 9 <19>厘米-3。此外，在本发明中，触摸模式电容式压力传感器具有通过掺杂杂质和各向异性蚀刻而形成的导电隔膜，并且隔膜顶面上的蚀刻坑密度等于或小于每mum 2的5个/ ，并且优选等于或小于每个m.2的一个。结果，隔膜的耐久性大大提高。

3. 发明授权

US5366583A Process for preparing barium titanate single crystals 失效
标题翻译：制备钛酸钡单晶的方法
公开(公告)号：US5366583A
公开(公告)日：1994-11-22
申请号：US957902
申请日：1992-10-08
申请人： Akihito Kurosaka , Kazuhiko Tomomatu , Osamu Nakao , Shoji Ajimura , Haruo Tominaga
发明人： Akihito Kurosaka , Kazuhiko Tomomatu , Osamu Nakao , Shoji Ajimura , Haruo Tominaga
IPC分类号： C30B15/00 , C30B29/32
CPC分类号： C30B15/00 , C30B29/32
摘要： A mixture of titanium dioxide and an oxide or carbonate of barium includes one or more transition metal elements selected from the group of V, Cr, Mn, Fe, Co, Ni and Cu, in the amount of 2 ppm or more. This mixture is used as a starting material. The mixture is heated to a predetermined temperature to make a melt. Then, a seed crystal of BaTiO.sub.3 is brought into contact with the melt under an environment with a low oxygen partial pressure of 0.02 atm. or less. From this state, the above melt is slowly cooled to grow a single crystal on the seed crystal. The thus obtained single crystal is heated in a temperature of 600 .degree. C. or more, under an oxidizing environment with its oxygen partial pressure more than 0.1 atm.
摘要翻译：二氧化钛和钡的氧化物或碳酸盐的混合物包括选自V，Cr，Mn，Fe，Co，Ni和Cu中的一种或多种过渡金属元素，其量为2ppm以上。该混合物用作原料。将混合物加热至预定温度以使其熔融。然后，在0.02atm的低氧分压的环境下，使BaTiO 3的晶种与熔体接触。或更少。从该状态，将上述熔体缓慢冷却以在晶种上生长单晶。将得到的单晶在氧分压大于0.1atm的氧化环境下，在600℃以上的温度下加热。

4. 发明授权

US07849591B2 Method of manufacturing a printed wiring board 有权
标题翻译：制造印刷电路板的方法
公开(公告)号：US07849591B2
公开(公告)日：2010-12-14
申请号：US12089480
申请日：2006-10-13
申请人： Masahiro Okamoto , Shouji Itou , Osamu Nakao , Takanao Suzuki , Satoshi Okude
发明人： Masahiro Okamoto , Shouji Itou , Osamu Nakao , Takanao Suzuki , Satoshi Okude
IPC分类号： H05K3/30 , H05K1/16
CPC分类号： H05K1/186 , H01L23/49816 , H01L23/5389 , H01L24/19 , H01L24/24 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/03 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/20 , H01L2224/24227 , H01L2224/32225 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/73267 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/1035 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/07811 , H01L2924/10253 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/30107 , H01L2924/3511 , H05K3/0058 , H05K3/4069 , H05K3/4614 , H05K3/4617 , H05K2201/10674 , H05K2203/063 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/00015
摘要： A configuration according to the invention includes at least one wired base material configured with an insulating base material having an adhesion property, and an electric conductive layer formed on one side of the insulating base material, a plugging electrode made of an electric conductive paste, connected to the electric conductive layer, and penetrating the insulating base material, and an IC chip having a re-wiring portion, the IC chip being buried in an interlayer binding material, with the re-wiring portion connected to the plugging electrode, having a supporting board disposed on an opposite side to the re-wiring portion of the IC chip, with an adhesion layer in between, and having a re-wiring layer configured with the wired base material and the re-wiring portion.According to the invention, therefore, it is allowed to provide a multi-layer printed wing board with highly defined components implemented, allowing for a fabrication by facile processes, without causing, among others, increased costs or decreased yields.
摘要翻译：根据本发明的结构包括至少一种配置有具有粘合性的绝缘基材的布线基材和形成在绝缘基材的一侧上的导电层，由导电浆料制成的封孔电极，导电层和贯穿绝缘基材的IC芯片和具有再布线部分的IC芯片，IC芯片被埋在层间粘合材料中，再布线部分连接到封堵电极，具有支撑设置在与IC芯片的再布线部分相对的一侧，其间具有粘合层，并且具有由布线基材和重新布线部分构成的重新布线层。因此，根据本发明，允许提供具有高度限定的部件的多层印刷翼板，允许通过简单的工艺制造，而不引起增加的成本或降低的产量。

5. 发明申请

US20090154132A1 PRINTED WIRING BOARD AND METHOD FOR MANUFACTURING PRINTED WIRING BOARD 有权
标题翻译：印刷线路板和制造印刷线路板的方法
公开(公告)号：US20090154132A1
公开(公告)日：2009-06-18
申请号：US12089480
申请日：2006-10-13
申请人： Masahiro Okamoto , Shouji Itou , Osamu Nakao , Takanao Suzuki , Satoshi Okude
发明人： Masahiro Okamoto , Shouji Itou , Osamu Nakao , Takanao Suzuki , Satoshi Okude
IPC分类号： H05K1/11 , H05K1/16 , B29C65/02
CPC分类号： H05K1/186 , H01L23/49816 , H01L23/5389 , H01L24/19 , H01L24/24 , H01L24/45 , H01L24/48 , H01L24/73 , H01L25/03 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16225 , H01L2224/20 , H01L2224/24227 , H01L2224/32225 , H01L2224/32245 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/73204 , H01L2224/73265 , H01L2224/73267 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/1035 , H01L2225/1058 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01018 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01041 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/07811 , H01L2924/10253 , H01L2924/12041 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/30105 , H01L2924/30107 , H01L2924/3511 , H05K3/0058 , H05K3/4069 , H05K3/4614 , H05K3/4617 , H05K2201/10674 , H05K2203/063 , Y10T29/49126 , Y10T29/49128 , Y10T29/4913 , Y10T29/49155 , Y10T29/49165 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/00015
摘要： A configuration according to the invention includes at least one wired base material configured with an insulating base material having an adhesion property, and an electric conductive layer formed on one side of the insulating base material, a plugging electrode made of an electric conductive paste, connected to the electric conductive layer, and penetrating the insulating base material, and an IC chip having a re-wiring portion, the IC chip being buried in an interlayer binding material, with the re-wiring portion connected to the plugging electrode, having a supporting board disposed on an opposite side to the re-wiring portion of the IC chip, with an adhesion layer in between, and having a re-wiring layer configured with the wired base material and the re-wiring portion.According to the invention, therefore, it is allowed to provide a multi-layer printed wing board with highly defined components implemented, allowing for a fabrication by facile processes, without causing, among others, increased costs or decreased yields.
摘要翻译：根据本发明的结构包括至少一种配置有具有粘合性的绝缘基材的布线基材和形成在绝缘基材的一侧上的导电层，由导电浆料制成的封孔电极，导电层和贯穿绝缘基材的IC芯片和具有再布线部分的IC芯片，IC芯片被埋在层间粘合材料中，再布线部分连接到封堵电极，具有支撑设置在与IC芯片的再布线部分相对的一侧，其间具有粘合层，并且具有由布线基材和重新布线部分构成的重新布线层。因此，根据本发明，允许提供具有高度限定的部件的多层印刷翼板，允许通过简单的工艺制造，而不引起增加的成本或降低的产量。

6. 发明申请

US20100090692A1 MAGNETIC SENSOR MODULE AND PISTON POSITION DETECTOR 审中-公开
标题翻译：磁传感器模块和活塞位置检测器
公开(公告)号：US20100090692A1
公开(公告)日：2010-04-15
申请号：US12528585
申请日：2008-02-08
申请人： Kazuhisa Itoi , Katsubumi Nagasu , Takuya Aizawa , Osamu Nakao
发明人： Kazuhisa Itoi , Katsubumi Nagasu , Takuya Aizawa , Osamu Nakao
IPC分类号： G01R33/02
CPC分类号： G01R33/09 , G01D5/147 , G01R33/0011 , G01R33/07 , G01R33/072
摘要： A magnetic sensor module which includes: a semiconductor substrate including an integrated circuit for switching operation; a magneto-resistive element which is disposed on a first surface of the semiconductor substrate and has a magneto-sensitive direction in a direction along the first surface; and a bias magnetic field applying member provided on the semiconductor substrate and disposed on a surface which is parallel to the first surface, wherein: the bias magnetic field applying member is magnetized in a direction along the surface on which the bias magnetic field applying member is disposed; and when no external magnetic field is applied, the bias magnetic field applying member applies a bias magnetic field in the direction along the first surface on which the magneto-resistive element is provided.
摘要翻译：一种磁传感器模块，包括：包括用于切换操作的集成电路的半导体衬底; 磁阻元件，其设置在所述半导体衬底的第一表面上，并且沿着所述第一表面的方向具有磁敏方向; 以及偏置磁场施加构件，其设置在所述半导体基板上并配置在与所述第一面平行的面上，其中：所述偏置磁场施加构件沿着所述偏置磁场施加构件的表面的方向被磁化，处置并且当没有施加外部磁场时，偏置磁场施加构件沿着设置有磁阻元件的第一表面的方向施加偏置磁场。

7. 发明申请

US20090217522A1 PROCESS FOR PRODUCING MULTILAYER PRINTED WIRING BOARD 有权
标题翻译：生产多层印刷线路板的工艺
公开(公告)号：US20090217522A1
公开(公告)日：2009-09-03
申请号：US12463708
申请日：2009-05-11
申请人： Shoji ITO , Ryoichi Kishihara , Osamu Nakao , Hiroki Hashiba , Masahiro Okamoto
发明人： Shoji ITO , Ryoichi Kishihara , Osamu Nakao , Hiroki Hashiba , Masahiro Okamoto
IPC分类号： H05K3/10
CPC分类号： H01L23/5385 , H01L2224/16 , H01L2924/00011 , H01L2924/00014 , H01L2924/01068 , H01L2924/01078 , H01L2924/01079 , H01L2924/1627 , H01L2924/3511 , H05K3/4602 , H05K3/4614 , H05K3/4691 , H05K3/4694 , H05K2201/09972 , Y10T29/49128 , Y10T29/4916 , Y10T29/49165 , H01L2224/0401
摘要： At least one base material having a wiring circuit that has been formed into a predetermined outer shape is bonded to a motherboard. The motherboard wiring board and the base material having a wiring circuit are electrically connected to each other at least one portion through an inner via hole. The outer shape of the base material having a wiring circuit is smaller than the outer shape of the motherboard, with the base material having a wiring circuit having an island shape on the motherboard.
摘要翻译：具有形成为预定外形的布线电路的至少一种基材被粘合到母板上。具有布线电路的主板布线板和基材通过内部通孔相互电连接至少一个部分。具有布线电路的基材的外形小于母板的外形，母基板具有在主板上具有岛状的布线电路。

8. 发明申请

US20090066326A1 MAGNETIC DEVICE 失效
标题翻译：磁性装置
公开(公告)号：US20090066326A1
公开(公告)日：2009-03-12
申请号：US12267169
申请日：2008-11-07
申请人： Kazuhisa ITOI , Katsubumi Nagasu , Takuya Aizawa , Osamu Nakao , Shigekazu Kawai
发明人： Kazuhisa ITOI , Katsubumi Nagasu , Takuya Aizawa , Osamu Nakao , Shigekazu Kawai
IPC分类号： G01R33/00
CPC分类号： G01R33/09 , G01R33/0011 , G01R33/02 , G01R33/063 , G01R33/18 , H01L43/12
摘要： A magnetic device comprises a magnetic element, a first magnetic field applying means, and a second magnetic field applying means. The first and second magnetic field applying means are disposed on mutually opposite sides of the magnetic element. The magnetic element is, for example, an element in which a soft magnetic film is formed in a meandering shape on a nonmagnetic substrate. The first and second magnetic field applying means create a magnetic field in one direction from the first magnetic field applying means toward the second magnetic field applying means. The bias magnetic field in one direction is thereby applied to the entire soft magnetic film in the magnetic element disposed between the first and second magnetic field applying means.
摘要翻译：磁性装置包括磁性元件，第一磁场施加装置和第二磁场施加装置。第一和第二磁场施加装置设置在磁性元件的彼此相对的两侧。磁性元件例如是在非磁性基板上以曲折形状形成软磁性膜的元件。第一和第二磁场施加装置在从第一磁场施加装置朝向第二磁场施加装置的一个方向上产生磁场。因此，一个方向上的偏置磁场被施加到设置在第一和第二磁场施加装置之间的磁性元件中的整个软磁膜上。

9. 发明授权

US07421779B2 Multilayer board manufacturing method 有权
标题翻译：多层板制造方法
公开(公告)号：US07421779B2
公开(公告)日：2008-09-09
申请号：US10545731
申请日：2004-02-13
申请人： Osamu Nakao , Reiji Higuchi , Syouji Ito , Masahiro Okamoto
发明人： Osamu Nakao , Reiji Higuchi , Syouji Ito , Masahiro Okamoto
IPC分类号： H05K3/30
CPC分类号： H05K3/4617 , H05K3/386 , H05K3/4069 , H05K3/4652 , H05K2201/0397 , H05K2201/09509 , H05K2201/096 , H05K2201/0969 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： A base material (20) is arranged on top of at least one first internal layer base material (10), and a second internal base material (30) is arranged underneath the base material (10). And thereafter a surface layer circuitry conductive foil (40) is arranged underneath the base material (30), and subsequently these materials are colaminated for forming a colaminated body (80). While this colaminating operation, conductive portions being formed in the base materials 10, 30 are aligned to electrically connect one another for forming an internal circuitry. And thereafter, an interlayer conductive portion (51) being electrically connected to the internal circuitry is formed, and a minute circuitry is formed on the top of the base material (20) and the conductive foil (40) accordingly.
摘要翻译：基材（20）布置在至少一个第一内层基材（10）的顶部上，并且第二内基材（30）布置在基材（10）的下方。此后，表面层电路导电箔（40）布置在基底材料（30）的下面，随后将这些材料进行混合以形成一个混合体（80）。在这种分层操作中，形成在基材10,30中的导电部分被对齐以彼此电连接以形成内部电路。此后，形成电连接到内部电路的层间导电部分（51），并且相应地在基底材料（20）的顶部和导电箔（40）上形成分电路。

10. 发明申请

US20060191133A1 Multilayer board and its manufacturing method 有权
标题翻译：多层板及其制造方法
公开(公告)号：US20060191133A1
公开(公告)日：2006-08-31
申请号：US10545731
申请日：2004-02-13
申请人： Osamu Nakao , Reiji Higuchi , Syouji Ito , Masahiro Okamoto
发明人： Osamu Nakao , Reiji Higuchi , Syouji Ito , Masahiro Okamoto
IPC分类号： H05K3/36 , H05K3/20
CPC分类号： H05K3/4617 , H05K3/386 , H05K3/4069 , H05K3/4652 , H05K2201/0397 , H05K2201/09509 , H05K2201/096 , H05K2201/0969 , Y10T29/49124 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： A base material (20) is arranged on top of at least one first internal layer base material (10), and a second internal base material (30) is arranged underneath the base material (10). And thereafter a surface layer circuitry conductive foil (40) is arranged underneath the base material (30), and subsequently these materials are colaminated for forming a colaminated body (80). While this colaminating operation, conductive portions being formed in the base materials 10, 30 are aligned to electrically connect one another for forming an internal circuitry. And thereafter, an interlayer conductive portion (51) being electrically connected to the internal circuitry is formed, and a minute circuitry is formed on the top of the base material (20) and the conductive foil (40) accordingly.
摘要翻译：基材（20）布置在至少一个第一内层基材（10）的顶部上，并且第二内基材（30）布置在基材（10）的下方。此后，表面层电路导电箔（40）布置在基底材料（30）的下面，随后将这些材料进行混合以形成一个混合体（80）。在这种分层操作中，形成在基材10,30中的导电部分被对齐以彼此电连接以形成内部电路。此后，形成电连接到内部电路的层间导电部分（51），并且相应地在基底材料（20）的顶部和导电箔（40）上形成分电路。

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