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1. 发明授权

US4933840A I/O control system using buffer full/empty and zero words signals to control DMA read/write commands 失效
标题翻译： I / O控制系统使用缓冲器全/空和零字信号来控制DMA读/写命令
公开(公告)号：US4933840A
公开(公告)日：1990-06-12
申请号：US281947
申请日：1988-12-07
申请人： Akihiro Sera , Kazuhiko Goukon , Yuji Shibata
发明人： Akihiro Sera , Kazuhiko Goukon , Yuji Shibata
IPC分类号： G06F13/38 , G06F3/06 , G06F11/267 , G06F13/28
CPC分类号： G06F11/2221 , G06F13/28 , G06F3/0601 , G06F2003/0692
摘要： In an input/output control system: a read/write operation for a control register (REG) under a program mode is achieved by hardware; the system is started or stopped under the control of firmware, and a data transfer in the system is achieved under the control of hardware. Therefore, a high speed data communication is realized, via the system, between a central control unit (CC) and an input/output unit (IO).
摘要翻译：在输入/输出控制系统中：通过硬件实现程序模式下控制寄存器（REG）的读/写操作; 系统在固件的控制下启动或停止，系统中的数据传输在硬件的控制下实现。因此，通过系统，在中央控制单元（CC）和输入/输出单元（IO）之间实现高速数据通信。

2. 发明授权

US07734165B2 Imaging apparatus 有权
标题翻译：成像设备
公开(公告)号：US07734165B2
公开(公告)日：2010-06-08
申请号：US11689718
申请日：2007-03-22
申请人： Naoki Mizutani , Kunihiko Kanai , Yuji Shibata , Masao Harada
发明人： Naoki Mizutani , Kunihiko Kanai , Yuji Shibata , Masao Harada
IPC分类号： G03B3/00 , G03B13/20
CPC分类号： G03B3/00 , G02B7/36 , G02B27/0093 , G03B13/36 , G03B2213/02 , H04N5/23212 , H04N5/23219
摘要： When focus adjustment operation is performed, a first measured distance acquired by utilization of TTL-AF and a second measured value acquired by utilization of a distance between the eyes have been computed in advance. The degree of reliability of the first measured distance is compared the degree of reliability of the second measured distance in accordance with a result of a determination as to whether or not a face is detected, a result of a determination as to whether or not an ambient brightness value Br is equal to or less than a reference value, a result of a determination as to whether or not a focal length “f” is equal to or less than a reference value, and a result of a determination as to whether or not a second measured distance De is less than a first measured distance Dt.
摘要翻译：当执行焦点调整操作时，预先计算通过利用TTL-AF获得的第一测量距离和通过利用眼睛之间的距离获得的第二测量值。将第一测量距离的可靠度与第二测量距离的可靠度进行比较，根据关于是否检测到面部的确定结果，确定是否环境温度的结果亮度值Br等于或小于参考值，关于焦距“f”是否等于或小于参考值的确定的结果，以及关于是否确定焦距第二测量距离De小于第一测量距离Dt。

3. 发明申请

US20080050108A1 IMAGING APPARATUS 有权
标题翻译：成像设备
公开(公告)号：US20080050108A1
公开(公告)日：2008-02-28
申请号：US11689718
申请日：2007-03-22
申请人： Naoki Mizutani , Kunihiko Kanai , Yuji Shibata , Masao Harada
发明人： Naoki Mizutani , Kunihiko Kanai , Yuji Shibata , Masao Harada
IPC分类号： G03B13/00 , G03B3/00
CPC分类号： G03B3/00 , G02B7/36 , G02B27/0093 , G03B13/36 , G03B2213/02 , H04N5/23212 , H04N5/23219
摘要： The accuracy of focus adjustment operation is enhanced further. When focus adjustment operation is performed, a first measured distance acquired by utilization of TTL-AF and a second measured value acquired by utilization of a distance between the eyes have been computed in advance. The degree of reliability of the first measured distance is compared the degree of reliability of the second measured distance in accordance with a result of a determination as to whether or not a face is detected (S10), a result of a determination as to whether or not an ambient brightness value Br is equal to or less than a reference value (S12), a result of a determination as to whether or not a focal length “f” is equal to or less than a reference value (S16), and a result of a determination as to whether or not a second measured distance De is less than a first measured distance Dt (S18). Focus adjustment operation is performed in accordance with a measured distance determined to be more reliable.
摘要翻译：焦点调整操作的精度进一步提高。当执行焦点调整操作时，预先计算通过利用TTL-AF获得的第一测量距离和通过利用眼睛之间的距离获得的第二测量值。将第一测量距离的可靠度与第二测量距离的可靠度进行比较，该距离是根据关于是否检测到脸部的确定结果（S10），确定是否或者不是环境亮度值Br等于或小于参考值（S12），关于焦距“f”是否等于或小于参考值的确定的结果（S16），以及第二测量距离De是否小于第一测量距离Dt的确定结果（S18）。根据被确定为更可靠的测量距离执行对焦调整操作。

4. 发明授权

US5594878A Bus interface structure and system for controlling the bus interface structure 失效
标题翻译：总线接口结构和系统，用于控制总线接口结构
公开(公告)号：US5594878A
公开(公告)日：1997-01-14
申请号：US392604
申请日：1995-02-22
申请人： Yuji Shibata , Makoto Okazaki , Hisamitsu Tanihira , Katsuyuki Okada
发明人： Yuji Shibata , Makoto Okazaki , Hisamitsu Tanihira , Katsuyuki Okada
IPC分类号： G06F13/28 , G06F12/02 , G06F13/16
CPC分类号： G06F13/1678
摘要： A bus interface system has a bus interface, a common memory, a local bus, and a memory controller for use in a memory control. The memory controller has a buffer and is connected to the local bus. The bus interface has a burst disassembling control circuit which disassembles burst transfer data into one or a plurality of block transfers and one or a plurality of one-word transfers, which are supplied to the memory controller so that when the bus interface receives all requested data received from the common memory during a read access, the bus interface adds information on a destination device, connected to a system bus, to all the requested data and sends all the requested data with that information to the destination device via the system bus.
摘要翻译：总线接口系统具有总线接口，公共存储器，本地总线和用于存储器控制的存储器控制器。存储器控制器具有缓冲器并连接到本地总线。总线接口具有突发分解控制电路，其将突发传输数据分解成一个或多个块传输和一个或多个单字传输，其被提供给存储器控制器，使得当总线接口接收到所有请求的数据时在读取访问期间从公共存储器接收到总线接口，将连接到系统总线的目的地设备上的信息添加到所有所请求的数据，并且通过该系统总线将具有该信息的所有请求的数据发送到目的地设备。

5. 发明授权

US5123099A Hot standby memory copy system 失效
标题翻译：热备份存储器复制系统
公开(公告)号：US5123099A
公开(公告)日：1992-06-16
申请号：US219565
申请日：1988-07-15
申请人： Yuji Shibata , Tetsuo Urushihara
发明人： Yuji Shibata , Tetsuo Urushihara
IPC分类号： G06F12/08 , G06F5/00 , G06F11/20 , G06F12/00 , G06F12/16
CPC分类号： G06F11/1666 , G06F11/1658 , G06F11/202 , G06F12/00 , G06F5/06
摘要： Disclosed is an electronic exchange with a hot standby memory copy system including main storage devices that are duplexed wherein to improve the processing capacity of a central processing unit and make the best use of the speed of a cache memory, in an information processing apparatus provided with central processing units, main storage devices and cache memories all of which are duplexed, first-in first-out memories that are duplexed and connected to the central processing units, a unit for simultaneously writing data, when the central processing unit writes the data into the cache memory, into the first-in first-out memory, and a unit for writing, independently of an operation of the central processing unit, the contents of a currently used one of the first-in first-out memories into a standby one of the main storage devices are provided.

6. 发明授权

US4792969A Line condition data collecting system for a telephone exchange 失效
标题翻译：用于电话交换的线路状况数据采集系统
公开(公告)号：US4792969A
公开(公告)日：1988-12-20
申请号：US118946
申请日：1987-11-10
申请人： Yuji Shibata , Atsushi Fujihira
发明人： Yuji Shibata , Atsushi Fujihira
IPC分类号： H04Q3/545 , H04Q11/04 , H04M3/00
CPC分类号： H04Q11/04
摘要： A line condition data collecting system for a telephone exchange includes an image memory in a central processing unit which stores line condition data to reduce the amount of time the central controller in the central processing unit waits for the line condition data. A signal receiving memory in the telephone exchange stores the line condition data and is sequentially accessed by an image memory controller autonomously from the central controller in the central processing unit. When the central controller requires line condition data, the image memory is checked and if the line condition data stored therein is valid, it is supplied to the central controller. If the line condition data in the image memory is invalid, a conventional access request is made to the signal receiving memory, but this occurs less frequently than in a conventional system.
摘要翻译：用于电话交换机的线路条件数据收集系统包括中央处理单元中的图像存储器，其存储线路条件数据以减少中央处理单元中的中央控制器等待线路状况数据的时间量。电话交换机中的信号接收存储器存储线路条件数据，并且由图像存储器控制器从中央处理单元中的中央控制器自主地顺序地访问。当中央控制器需要线路条件数据时，检查图像存储器，并且如果存储在其中的线路条件数据有效，则将其提供给中央控制器。如果图像存储器中的线条件数据无效，则对信号接收存储器进行传统的访问请求，但是这比常规系统中的频繁发生。

7. 发明授权

US4292137A Door lifter for coke oven 失效
标题翻译：焦炉门提升机
公开(公告)号：US4292137A
公开(公告)日：1981-09-29
申请号：US184308
申请日：1980-09-05
申请人： Kenji Fujita , Yuji Shibata , Hisao Mikuni , Tsuneo Shibuya
发明人： Kenji Fujita , Yuji Shibata , Hisao Mikuni , Tsuneo Shibuya
IPC分类号： C10B25/14 , C01B25/14
CPC分类号： C10B25/14
摘要： An door lifter for coke ovens is provided with a door lifting or lowering power actuator consisting of two hydraulic cylinders connected in series and in back-to-back relationship. In the case of the door removal, first one of the two hydraulic cylinders is actuated so that the hooks are made into engagement with the corresponding lug pieces of the door and when they have engaged, said one hydraulic cylinder is stopped and locked. Thereafter the other hydraulic cylinder is actuated so that the door is lifted to be removed from the oven. In order to reengage the door, the other hydraulic cylinder is reversely actuated so that the door is lowered by the same stroke as the lift stroke and then said one hydraulic cylinder is reversely actuated so that the hooks are disengaged from the lug pieces of the door. In the case of the prior art door lifter of the type having a single hydraulic cylinder for lifting or lowering the door in two steps or strokes, there must be provided a hydraulic control circuit which is very complex in construction and expensive, but the use of two hydraulic cylinders can considerably simplify the hydraulic control circuit.
摘要翻译：用于焦炉的门提升器设置有门提升或降低动力致动器，其由串联连接和背对背关系的两个液压缸组成。在门拆卸的情况下，两个液压缸中的第一个被致动，使得钩与门的相应的凸耳片接合，并且当它们接合时，所述一个液压缸被停止和锁定。此后，另一个液压缸被致动，使得门被提升以从烘箱中移出。为了重新接通门，另一个液压缸被反向致动，使得门以与升程行程相同的行程下降，然后所述一个液压缸反向致动，使得钩与门的凸耳片脱离。在现有技术的具有用于以两步或中风提升或降低门的单个液压缸的门式升降机的情况下，必须提供一种在结构上非常复杂并且昂贵的液压控制回路，但是使用两个液压缸可以大大简化液压控制回路。

8. 发明申请

US20140225300A1 POWDER MOLDING DEVICE AND PRODUCTION METHOD FOR POWDER MOLDED PRODUCT 审中-公开
标题翻译：粉末成型设备和粉末成型产品的生产方法
公开(公告)号：US20140225300A1
公开(公告)日：2014-08-14
申请号：US14241500
申请日：2012-08-29
申请人： Yuji Shibata , Kazuyuki Onishi
发明人： Yuji Shibata , Kazuyuki Onishi
IPC分类号： B29C43/28 , B29C43/26 , B29C43/46 , B29C43/24
CPC分类号： B29C43/28 , B22F3/18 , B29C43/24 , B29C43/265 , B29C43/46 , B29C2043/467 , B30B11/18 , H01G11/86 , H01G13/00 , H01M4/0433 , H01M4/139 , H01M4/1393 , Y02E60/13
摘要： A powder molding device, including: a pre-molding unit (6) for molding a sheet-form powder (14) having a first density higher than a density of the powder and not having fluidity by compressing a powder; and a molding roll (8) for molding a sheet-form molded product (16) having a second density higher than the first density by compressing the sheet-form powder.
摘要翻译：一种粉末成型装置，其特征在于，包括：预成型单元（6），其通过压缩粉末而成型具有比粉末密度高的第一密度且不具有流动性的片状粉末（14）以及用于通过压缩片状粉末来模制具有高于第一密度的第二密度的片状模制产品（16）的模制辊（8）。

9. 发明授权

US5526495A Bus control system in a multi-processor system 失效
标题翻译：总线控制系统在多处理器系统中
公开(公告)号：US5526495A
公开(公告)日：1996-06-11
申请号：US110752
申请日：1993-08-23
申请人： Yuji Shibata , Makoto Okazaki , Hisamitsu Tanihira
发明人： Yuji Shibata , Makoto Okazaki , Hisamitsu Tanihira
IPC分类号： G06F13/16 , G06F13/364 , G06F13/40 , G06F15/167 , G06F13/42 , G06F13/00 , G06F13/36 , G06F15/16
CPC分类号： G06F13/4018 , G06F13/1678 , G06F13/364 , G06F15/167
摘要： A bus arbiter permits an answer transfer request to utilize a system bus with higher priority than a command transfer request, thereby increasing the processing efficiency of CPU boards. A multi-processor system utilize the system bus with a time split transfer system in which the data width of a unit is inserted into a command and an answer transmitted and received between processors and transmitted as bus width information, thus making it possible to interconnect a unit, which processes data of an arbitrary data width, to the system bus. Local memories of a plurality of units connected to the system bus can be accessed via a bus interface of an input and output unit.
摘要翻译：总线仲裁器允许应答传送请求利用比命令传输请求更高优先级的系统总线，从而提高CPU板的处理效率。多处理器系统利用具有时间分割传送系统的系统总线，其中将单元的数据宽度插入到处理器之间发送和接收的命令和应答中，并作为总线宽度信息发送，从而可以将将处理任意数据宽度的数据的单元传送到系统总线。连接到系统总线的多个单元的本地存储器可以经由输入和输出单元的总线接口访问。

10. 发明授权

US5402430A Parity inversion test system 失效
标题翻译：奇偶校验反演测试系统
公开(公告)号：US5402430A
公开(公告)日：1995-03-28
申请号：US955826
申请日：1992-10-02
申请人： Masao Asai , Yuji Shibata , Makoto Okazaki
发明人： Masao Asai , Yuji Shibata , Makoto Okazaki
IPC分类号： G06F11/10 , G06F11/08 , G06F11/267 , G01R31/00
CPC分类号： G06F11/2215 , G06F11/10
摘要： A parity inversion test system includes an interface part having an input side coupled to a N-bit data line and an output side coupled to a M-bit data line, where N
摘要翻译：奇偶校验反演测试系统包括具有耦合到N位数据线的输入端和耦合到M位数据线的输出侧的接口部分，其中N

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