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1. 发明申请

US20080225984A1 Digital Polar Transmitter 有权
标题翻译：数字极性变送器
公开(公告)号：US20080225984A1
公开(公告)日：2008-09-18
申请号：US12048022
申请日：2008-03-13
申请人： Walid Khairy Mohamed Ahmed , Qing Li , Ajit Kumar Reddy , Eoin Carey
发明人： Walid Khairy Mohamed Ahmed , Qing Li , Ajit Kumar Reddy , Eoin Carey
IPC分类号： H03C3/00 , H04L27/12 , H03K7/06
CPC分类号： H03K7/10 , H03C5/00 , H04L25/06 , H04L27/34 , H04L27/361 , H04L27/3863 , H04L27/389
摘要： A digital polar transmitter includes a baseband processor configured to receive an input signal and to convert the input signal into a baseband amplitude component and a baseband phase component. The transmitter also includes a phase modulator in communication with the baseband processor. The phase modulator is configured to modulate an RF carrier signal based on the phase component and to generate a phase-modulated RF carrier signal. A power amplifier is provided in communication with the baseband processor and the phase modulator. The power amplifier is configured to amplify the phase-modulated RF carrier signal based on the baseband amplitude component and to generate an amplified RF signal. The transmitter also includes a digital feedback loop in communication with the power amplifier and the baseband processor. The digital feedback loop is configured to detect the amplified RF signal and to provide a digital amplitude feedback signal and a detected phase feedback signal to the baseband processor.
摘要翻译：数字极化发射机包括：基带处理器，被配置为接收输入信号并将输入信号转换成基带振幅分量和基带相位分量。发射机还包括与基带处理器通信的相位调制器。相位调制器被配置为基于相位分量来调制RF载波信号并且产生相位调制的RF载波信号。提供与基带处理器和相位调制器通信的功率放大器。功率放大器被配置为基于基带幅度分量来放大相位调制的RF载波信号并产生放大的RF信号。发射机还包括与功率放大器和基带处理器通信的数字反馈回路。数字反馈回路被配置为检测放大的RF信号，并向基带处理器提供数字幅度反馈信号和检测的相位反馈信号。

2. 发明申请

US20080225981A1 SYSTEM AND METHOD FOR SYNCHRONIZATION, POWER CONTROL, CALIBRATION, AND MODULATION IN COMMUNICATION TRANSMITTERS 有权
标题翻译：通信发射机同步，功率控制，校准和调制的系统与方法
公开(公告)号：US20080225981A1
公开(公告)日：2008-09-18
申请号：US12048013
申请日：2008-03-13
申请人： Ajit Kumar Reddy , Qing Li , Walid Khairy Mohamed Ahmed
发明人： Ajit Kumar Reddy , Qing Li , Walid Khairy Mohamed Ahmed
IPC分类号： H04L25/49
CPC分类号： H04L27/367
摘要： A system is provided for processing a communication signal including a baseband amplitude component and a baseband phase component. The system includes an amplitude predictor configured for closed-loop pre-distortion of a baseband amplitude component, an amplitude lookup table configured for open-loop pre-distortion of the baseband amplitude component, and an amplitude interpolator configured to build up the amplitude lookup table during a closed-loop calibration period. The system also includes a phase predictor configured for closed-loop pre-distortion of a baseband phase component, a phase lookup table configured for open-loop pre-distortion of the baseband phase component, and a phase interpolator configured to build up the phase lookup table during a closed-loop calibration period.
摘要翻译：提供一种用于处理包括基带振幅分量和基带相位分量的通信信号的系统。该系统包括被配置用于基带幅度分量的闭环预失真的幅度预测器，配置用于基带振幅分量的开环预失真的幅度查找表，以及被配置为建立幅度查找表的振幅内插器在闭环校准期间。该系统还包括配置用于基带相位分量的闭环预失真的相位预测器，配置用于基带相位分量的开环预失真的相位查找表，以及配置成建立相位查找的相位内插器在闭环校准期间。

3. 发明申请

US20110085619A1 SYSTEM AND METHOD FOR SYNCHRONIZATION, POWER CONTROL, CALIBRATION, AND MODULATION IN COMMUNICATION TRANSMITTERS 有权
标题翻译：通信发射机同步，功率控制，校准和调制的系统与方法
公开(公告)号：US20110085619A1
公开(公告)日：2011-04-14
申请号：US12969843
申请日：2010-12-16
申请人： Ajit Kumar Reddy , Qing Li , Walid Khairy Mohamed Ahmed
发明人： Ajit Kumar Reddy , Qing Li , Walid Khairy Mohamed Ahmed
IPC分类号： H04L25/03
CPC分类号： H04L27/367
摘要： A system is provided for processing a communication signal including a baseband amplitude component and a baseband phase component. The system includes an amplitude predictor configured for closed-loop pre-distortion of a baseband amplitude component, an amplitude lookup table configured for open-loop pre-distortion of the baseband amplitude component, and an amplitude interpolator configured to build up the amplitude lookup table during a closed-loop calibration period. The system also includes a phase predictor configured for closed-loop pre-distortion of a baseband phase component, a phase lookup table configured for open-loop pre-distortion of the baseband phase component, and a phase interpolator configured to build up the phase lookup table during a closed-loop calibration period.
摘要翻译：提供一种用于处理包括基带振幅分量和基带相位分量的通信信号的系统。该系统包括被配置用于基带幅度分量的闭环预失真的幅度预测器，配置用于基带振幅分量的开环预失真的幅度查找表，以及被配置为建立幅度查找表的振幅内插器在闭环校准期间。该系统还包括配置用于基带相位分量的闭环预失真的相位预测器，配置用于基带相位分量的开环预失真的相位查找表，以及配置成建立相位查找的相位内插器在闭环校准期间。

4. 发明授权

US08208583B2 System and method for synchronization, power control, calibration, and modulation in communication transmitters 有权
标题翻译：通信发射机的同步，功率控制，校准和调制的系统和方法
公开(公告)号：US08208583B2
公开(公告)日：2012-06-26
申请号：US12969843
申请日：2010-12-16
申请人： Ajit Kumar Reddy , Qing Li , Walid Khairy Mohamed Ahmed
发明人： Ajit Kumar Reddy , Qing Li , Walid Khairy Mohamed Ahmed
IPC分类号： H04L25/03
CPC分类号： H04L27/367
摘要： A system is provided for processing a communication signal including a baseband amplitude component and a baseband phase component. The system includes an amplitude predictor configured for closed-loop pre-distortion of a baseband amplitude component, an amplitude lookup table configured for open-loop pre-distortion of the baseband amplitude component, and an amplitude interpolator configured to build up the amplitude lookup table during a closed-loop calibration period. The system also includes a phase predictor configured for closed-loop pre-distortion of a baseband phase component, a phase lookup table configured for open-loop pre-distortion of the baseband phase component, and a phase interpolator configured to build up the phase lookup table during a closed-loop calibration period.
摘要翻译：提供一种用于处理包括基带振幅分量和基带相位分量的通信信号的系统。该系统包括被配置用于基带幅度分量的闭环预失真的幅度预测器，配置用于基带振幅分量的开环预失真的幅度查找表，以及被配置为建立幅度查找表的振幅内插器在闭环校准期间。该系统还包括配置用于基带相位分量的闭环预失真的相位预测器，配置用于基带相位分量的开环预失真的相位查找表，以及配置成建立相位查找的相位内插器在闭环校准期间。

5. 发明授权

US08009765B2 Digital polar transmitter 有权
标题翻译：数字极性发射机
公开(公告)号：US08009765B2
公开(公告)日：2011-08-30
申请号：US12048022
申请日：2008-03-13
申请人： Walid Khairy Mohamed Ahmed , Qing Li , Ajit Kumar Reddy , Eoin Carey
发明人： Walid Khairy Mohamed Ahmed , Qing Li , Ajit Kumar Reddy , Eoin Carey
IPC分类号： H04K1/02
CPC分类号： H03K7/10 , H03C5/00 , H04L25/06 , H04L27/34 , H04L27/361 , H04L27/3863 , H04L27/389
摘要： A digital polar transmitter includes a baseband processor configured to receive an input signal and to convert the input signal into a baseband amplitude component and a baseband phase component. The transmitter also includes a phase modulator in communication with the baseband processor. The phase modulator is configured to modulate an RF carrier signal based on the phase component and to generate a phase-modulated RF carrier signal. A power amplifier is provided in communication with the baseband processor and the phase modulator. The power amplifier is configured to amplify the phase-modulated RF carrier signal based on the baseband amplitude component and to generate an amplified RF signal. The transmitter also includes a digital feedback loop in communication with the power amplifier and the baseband processor. The digital feedback loop is configured to detect the amplified RF signal and to provide a digital amplitude feedback signal and a detected phase feedback signal to the baseband processor.
摘要翻译：数字极化发射机包括：基带处理器，被配置为接收输入信号并将输入信号转换成基带振幅分量和基带相位分量。发射机还包括与基带处理器通信的相位调制器。相位调制器被配置为基于相位分量来调制RF载波信号并且产生相位调制的RF载波信号。提供与基带处理器和相位调制器通信的功率放大器。功率放大器被配置为基于基带幅度分量来放大相位调制的RF载波信号并产生放大的RF信号。发射机还包括与功率放大器和基带处理器通信的数字反馈回路。数字反馈回路被配置为检测放大的RF信号，并向基带处理器提供数字幅度反馈信号和检测的相位反馈信号。

6. 发明授权

US07869543B2 System and method for synchronization, power control, calibration, and modulation in communication transmitters 有权
标题翻译：通信发射机的同步，功率控制，校准和调制的系统和方法
公开(公告)号：US07869543B2
公开(公告)日：2011-01-11
申请号：US12048013
申请日：2008-03-13
申请人： Ajit Kumar Reddy , Qing Li , Walid Khairy Mohamed Ahmed
发明人： Ajit Kumar Reddy , Qing Li , Walid Khairy Mohamed Ahmed
IPC分类号： H04K1/02 , H04B1/04 , H04L25/49
CPC分类号： H04L27/367
摘要： A system is provided for processing a communication signal including a baseband amplitude component and a baseband phase component. The system includes an amplitude predictor configured for closed-loop pre-distortion of a baseband amplitude component, an amplitude lookup table configured for open-loop pre-distortion of the baseband amplitude component, and an amplitude interpolator configured to build up the amplitude lookup table during a closed-loop calibration period. The system also includes a phase predictor configured for closed-loop pre-distortion of a baseband phase component, a phase lookup table configured for open-loop pre-distortion of the baseband phase component, and a phase interpolator configured to build up the phase lookup table during a closed-loop calibration period.
摘要翻译：提供一种用于处理包括基带振幅分量和基带相位分量的通信信号的系统。该系统包括被配置用于基带幅度分量的闭环预失真的幅度预测器，配置用于基带振幅分量的开环预失真的幅度查找表，以及被配置为建立幅度查找表的振幅内插器在闭环校准期间。该系统还包括配置用于基带相位分量的闭环预失真的相位预测器，配置用于基带相位分量的开环预失真的相位查找表，以及配置成建立相位查找的相位内插器在闭环校准期间。

7. 发明申请

US20080228292A1 System and method for pre-distorting a device input 有权
标题翻译：用于预失真设备输入的系统和方法
公开(公告)号：US20080228292A1
公开(公告)日：2008-09-18
申请号：US11717486
申请日：2007-03-12
申请人： Ajit Kumar Reddy
发明人： Ajit Kumar Reddy
IPC分类号： G05B13/02
CPC分类号： G05B21/02
摘要： A method for pre-distorting an input for a device is provided. A partial set of known data pairs is acquired during a closed-loop device calibration period. The partial set of known data pairs is searched for at least one missing data pair, and at least one data value is interpolated for the missing data pair. An augmented set of data pairs, including the known data pairs and the interpolated data value, is stored in a lookup table. During an open-loop operation period subsequent to the closed-loop device calibration period, the device input is pre-distorted based on the augmented set of data pairs stored in the lookup table.
摘要翻译：提供了一种用于对设备的输入进行预失真的方法。在闭环设备校准周期期间获取部分已知数据对的集合。搜索部分已知数据对集合中的至少一个丢失数据对，并为缺失的数据对内插至少一个数据值。包括已知数据对和内插数据值的增强数据集合被存储在查找表中。在闭环设备校准周期之后的开环操作期间，设备输入基于存储在查找表中的增加的数据组集合被预失真。

8. 发明授权

US07974373B2 Method and architecture for digital pulse shaping and rate conversion 有权
标题翻译：数字脉冲整形和速率转换的方法和架构
公开(公告)号：US07974373B2
公开(公告)日：2011-07-05
申请号：US11717258
申请日：2007-03-13
申请人： Ajit Kumar Reddy
发明人： Ajit Kumar Reddy
IPC分类号： H04B1/10
CPC分类号： H03H17/0621 , H03H2218/12 , H04L25/03834 , H04L27/2003
摘要： A method and architecture for pulse shaping are provided. The architecture includes a pulse shaping filter having a plurality of memory elements and a plurality of taps connected to the plurality of memory elements wherein a total number of the plurality of taps is independent of a sampling rate. The pulse shaping filter further includes a selector configured to select outputs from the plurality of taps to define a pulse shaped output.
摘要翻译：提供脉冲整形的方法和架构。该架构包括具有多个存储器元件的脉冲整形滤波器和连接到多个存储器元件的多个抽头，其中多个抽头的总数独立于采样率。脉冲整形滤波器还包括选择器，其被配置为选择来自多个抽头的输出以限定脉冲形输出。

9. 发明申请

US20080225935A1 Method and architecture for digital pulse shaping and rate conversion 有权
标题翻译：数字脉冲整形和速率转换的方法和架构
公开(公告)号：US20080225935A1
公开(公告)日：2008-09-18
申请号：US11717258
申请日：2007-03-13
申请人： Ajit Kumar Reddy
发明人： Ajit Kumar Reddy
IPC分类号： H03H7/40
CPC分类号： H03H17/0621 , H03H2218/12 , H04L25/03834 , H04L27/2003
摘要： A method and architecture for pulse shaping are provided. The architecture includes a pulse shaping filter having a plurality of memory elements and a plurality of taps connected to the plurality of memory elements wherein a total number of the plurality of taps is independent of a sampling rate. The pulse shaping filter further includes a selector configured to select outputs from the plurality of taps to define a pulse shaped output.
摘要翻译：提供脉冲整形的方法和架构。该架构包括具有多个存储器元件的脉冲整形滤波器和连接到多个存储器元件的多个抽头，其中多个抽头的总数独立于采样率。脉冲整形滤波器还包括选择器，其被配置为选择来自多个抽头的输出以限定脉冲形输出。

10. 发明申请

US20080224750A1 Digital delay architecture 审中-公开
标题翻译：数字延迟架构
公开(公告)号：US20080224750A1
公开(公告)日：2008-09-18
申请号：US11717427
申请日：2007-03-13
申请人： Ajit Kumar Reddy
发明人： Ajit Kumar Reddy
IPC分类号： H03H11/26
CPC分类号： H03H17/0027
摘要： A digital delay architecture and a digital delay method are provided. The digital delay architecture includes at least one shifter, at least one adder connected to the at least one shifter and a plurality of registers storing at least an output of the at least one adder and an original sampled signal. The plurality of registers are selectable to define a fractional delay value.
摘要翻译：提供数字延迟架构和数字延迟方法。数字延迟架构包括至少一个移位器，连接至该至少一个移位器的至少一个加法器和至少存储至少一个加法器的输出和原始采样信号的多个寄存器。多个寄存器可选择以定义分数延迟值。

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