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1. 发明授权

US09450112B2 GaN-based Schottky barrier diode with algan surface layer 有权
标题翻译：具有铝酸盐表面层的GaN基肖特基势垒二极管
公开(公告)号：US09450112B2
公开(公告)日：2016-09-20
申请号：US14479634
申请日：2014-09-08
申请人： Avogy, Inc.
发明人： Richard J. Brown , Thomas R. Prunty , David P. Bour , Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Linda Romano , Madhan Raj
IPC分类号： H01L29/47 , H01L29/872 , H01L29/66 , H01L21/02 , H01L29/205 , H01L29/20
CPC分类号： H01L29/872 , H01L21/0254 , H01L29/2003 , H01L29/205 , H01L29/475 , H01L29/66143
摘要： A Schottky diode and method of fabricating the Schottky diode using gallium nitride (GaN) materials is disclosed. The method includes providing an n-type GaN substrate having first and second opposing surfaces. The method also includes forming an ohmic metal contact electrically coupled to the first surface, forming an n-type GaN epitaxial layer coupled to the second surface, and forming an n-type aluminum gallium nitride (AlGaN) surface layer coupled to the n-type GaN epitaxial layer. The AlGaN surface layer has a thickness which is less than a critical thickness, and the critical thickness is determined based on an aluminum mole fraction of the AlGaN surface layer. The method also includes forming a Schottky contact electrically coupled to the n-type AlGaN surface layer, where, during operation, an interface between the n-type GaN epitaxial layer and the n-type AlGaN surface layer is substantially free from a two-dimensional electron gas.
摘要翻译：公开了肖特基二极管和使用氮化镓（GaN）材料制造肖特基二极管的方法。该方法包括提供具有第一和第二相对表面的n型GaN衬底。该方法还包括形成电耦合到第一表面的欧姆金属接触，形成耦合到第二表面的n型GaN外延层，以及形成与n型GaN结合的n型氮化镓铝（AlGaN）表面层 GaN外延层。 AlGaN表面层具有小于临界厚度的厚度，并且基于AlGaN表面层的铝摩尔分数来确定临界厚度。该方法还包括形成电耦合到n型AlGaN表面层的肖特基接触，其中在操作期间，n型GaN外延层和n型AlGaN表面层之间的界面基本上不含二维电子气。

2. 发明申请

US20160190276A1 METHOD AND SYSTEM FOR IN-SITU ETCH AND REGROWTH IN GALLIUM NITRIDE BASED DEVICES 审中-公开
标题翻译：基于氮化镓的设备中的现场蚀刻和再循环的方法和系统
公开(公告)号：US20160190276A1
公开(公告)日：2016-06-30
申请号：US14806173
申请日：2015-07-22
申请人： Avogy, Inc.
发明人： David P. Bour , Thomas R. Prunty , Hui Nie , Madhan M. Raj
IPC分类号： H01L29/66 , H01L29/868 , H01L21/02 , H01L21/306 , H01L21/308
CPC分类号： H01L29/66143 , H01L21/02389 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L21/02634 , H01L21/02639 , H01L21/02642 , H01L21/02647 , H01L21/30612 , H01L21/3086 , H01L29/0619 , H01L29/2003 , H01L29/66121 , H01L29/66446 , H01L29/66462 , H01L29/868 , H01L29/872
摘要： A method of regrowing material includes providing a III-nitride structure including a masking layer and patterning the masking layer to form an etch mask. The method also includes removing, using an in-situ etch, a portion of the III-nitride structure to expose a regrowth region and regrowing a III-nitride material in the regrowth region.
摘要翻译：再生材料的方法包括提供包括掩模层的III族氮化物结构，并且图案化掩模层以形成蚀刻掩模。该方法还包括使用原位蚀刻去除III族氮化物结构的一部分以暴露再生区域并在再生长区域中再生长III族氮化物材料。

3. 发明授权

US09171923B2 Method of fabricating a gallium nitride merged P-i-N Schottky (MPS) diode 有权
标题翻译：制造氮化镓合并的P-i-N肖特基（MPS）二极管的方法
公开(公告)号：US09171923B2
公开(公告)日：2015-10-27
申请号：US14299773
申请日：2014-06-09
申请人： Avogy, Inc.
发明人： Andrew P. Edwards , Hui Nie , Isik C. Kizilyalli , Linda Romano , David P. Bour , Richard J. Brown , Thomas R. Prunty
IPC分类号： H01L21/04 , H01L29/66 , H01L29/47 , H01L29/868 , H01L29/872 , H01L29/20
CPC分类号： H01L29/66143 , H01L21/046 , H01L21/0495 , H01L29/2003 , H01L29/47 , H01L29/475 , H01L29/868 , H01L29/872
摘要： A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region.
摘要翻译：半导体结构包括具有第一侧和与第一侧相对的第二侧的III族氮化物衬底。 III族氮化物衬底的特征在于第一导电类型和第一掺杂剂浓度。半导体结构还包括III族氮化物外延结构，其包括耦合到III族氮化物衬底的第一侧的第一III族氮化物外延层和多个第二导电类型的III族氮化物区域。多个III族氮化物区域在多个III族氮化物区域中的每一个之间具有至少一个第一导电类型的III族氮化物外延区域。半导体结构还包括电耦合到多个III族氮化物区域和至少一个III族氮化物外延区域中的一个或多个的第一金属结构。在第一金属结构和至少一个III族氮化物外延区之间产生肖特基接触。

4. 发明申请

US20150179733A1 SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS 有权
标题翻译：肖特基二极管与煤炭材料中的包层
公开(公告)号：US20150179733A1
公开(公告)日：2015-06-25
申请号：US14594778
申请日：2015-01-12
申请人： Avogy, Inc.
发明人： Andrew Edwards , Hui Nie , Isik C. Kizilyalli , Richard J. Brown , David P. Bour , Linda Romano , Thomas R. Prunty
IPC分类号： H01L29/06 , H01L29/66 , H01L29/20 , H01L29/872
CPC分类号： H01L29/66143 , H01L21/26546 , H01L29/0615 , H01L29/0619 , H01L29/0692 , H01L29/08 , H01L29/2003 , H01L29/404 , H01L29/66083 , H01L29/66204 , H01L29/66212 , H01L29/66416 , H01L29/66924 , H01L29/8083 , H01L29/868 , H01L29/872
摘要： A semiconductor structure includes a III-nitride substrate characterized by a first conductivity type and having a first side and a second side opposing the first side, a III-nitride epitaxial layer of the first conductivity type coupled to the first side of the III-nitride substrate, and a plurality of III-nitride epitaxial structures of a second conductivity type coupled to the III-nitride epitaxial layer. The semiconductor structure further includes a III-nitride epitaxial formation of the first conductivity type coupled to the plurality of III-nitride epitaxial structures, and a metallic structure forming a Schottky contact with the III-nitride epitaxial formation and coupled to at least one of the plurality of III-nitride epitaxial structures.
摘要翻译：半导体结构包括III族氮化物衬底，其特征在于具有第一导电类型并且具有与第一侧相对的第一侧和第二侧，第一导电类型的III族氮化物外延层耦合到III族氮化物的第一侧衬底以及耦合到III族氮化物外延层的第二导电类型的多个III族氮化物外延结构。半导体结构还包括耦合到多个III族氮化物外延结构的第一导电类型的III族氮化物外延形成，以及形成与III族氮化物外延形成肖特基接触的金属结构，并与多个III族氮化物外延结构。

5. 发明申请

US20150155372A1 METHOD AND SYSTEM FOR DOPING CONTROL IN GALLIUM NITRIDE BASED DEVICES 有权
标题翻译：基于氮化镓的器件控制的方法和系统
公开(公告)号：US20150155372A1
公开(公告)日：2015-06-04
申请号：US14611041
申请日：2015-01-30
申请人： Avogy, Inc.
发明人： Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Linda Romano , David P. Bour , Richard J. Brown , Thomas R. Prunty
IPC分类号： H01L29/66 , H01L21/02
CPC分类号： H01L29/66909 , H01L21/02538 , H01L21/0254 , H01L21/02573 , H01L21/0262 , H01L29/1066 , H01L29/2003 , H01L29/66212 , H01L29/66893 , H01L29/66924 , H01L29/8083 , H01L29/872
摘要： A method of growing a III-nitride-based epitaxial structure is disclosed. The method includes forming a GaN-based drift layer coupled to the GaN-based substrate, where forming the GaN-based drift layer comprises doping the drift layer with indium to cause the indium concentration of the drift layer to be less than about 1×1016 cm−3 and to cause the carbon concentration of the drift layer to be less than about 1×1016 cm−3. The method also includes forming an n-type channel layer coupled to the GaN-based drift layer, forming an n-contact layer coupled to the GaN-based drift layer, and forming a second electrical contact electrically coupled to the n-contact layer.
摘要翻译：公开了一种生长III族氮化物基外延结构的方法。该方法包括形成耦合到GaN基衬底的GaN基漂移层，其中形成GaN基漂移层包括用铟掺杂漂移层以使漂移层的铟浓度小于约1×1016 cm -3，并使漂移层的碳浓度小于约1×10 16 cm -3。该方法还包括形成耦合到GaN基漂移层的n型沟道层，形成耦合到GaN基漂移层的n型接触层，以及形成电耦合到n型接触层的第二电接触。

6. 发明申请

US20150132899A1 METHOD AND SYSTEM FOR A GAN VERTICAL JFET UTILIZING A REGROWN CHANNEL 有权
标题翻译：用于使用注册通道的GAN垂直JFET的方法和系统
公开(公告)号：US20150132899A1
公开(公告)日：2015-05-14
申请号：US14604600
申请日：2015-01-23
申请人： Avogy, Inc.
发明人： Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , Linda Romano , David P. Bour , Richard J. Brown , Thomas R. Prunty
IPC分类号： H01L29/66
CPC分类号： H01L29/66909 , H01L21/8252 , H01L27/0605 , H01L29/1066 , H01L29/2003 , H01L29/66446 , H01L29/66924 , H01L29/8083
摘要： A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction, and the channel region extends along at least a portion of the second surface of the gate region.
摘要翻译：垂直III族氮化物场效应晶体管包括：包含第一III族氮化物材料的漏极，与漏极电耦合的漏极接触点，以及包括耦合到漏极的第二III族氮化物材料的漂移区域。场效应晶体管还包括沟道区，该沟道区包括耦合到漏极并沿着垂直方向邻近漏极设置的第三III族氮化物材料，至少部分围绕沟道区的栅极区，具有耦合到漂移的第一表面区域和与栅极区域相对的栅极区域的一侧上的第二表面，以及电连接到栅极区域的栅极接触。场效应晶体管还包括耦合到沟道区的源极和电耦合到源极的源极接触。沟道区域沿着垂直方向设置在漏极和源极之间，使得在垂直III族氮化物场效应晶体管的操作期间的电流沿着垂直方向，并且沟道区域沿着第二表面的至少一部分延伸的门区域。

7. 发明申请

US20150123138A1 HIGH POWER GALLIUM NITRIDE ELECTRONICS USING MISCUT SUBSTRATES 有权
标题翻译：使用MISCUT基板的高功率氮化钠电子
公开(公告)号：US20150123138A1
公开(公告)日：2015-05-07
申请号：US14071032
申请日：2013-11-04
申请人： AVOGY, INC.
发明人： Isik C. Kizilyalli , David P. Bour , Thomas R. Prunty , Gangfeng Ye
IPC分类号： H01L29/20 , H01L29/66 , H01L29/861 , H01L21/02 , H01L21/76
CPC分类号： H01L29/66204 , H01L21/02389 , H01L21/0243 , H01L21/02433 , H01L21/02458 , H01L21/0254 , H01L21/02634 , H01L21/7605 , H01L29/045 , H01L29/0649 , H01L29/0657 , H01L29/2003 , H01L29/6609 , H01L29/861 , H01L29/8613
摘要： An electronic device includes a III-V substrate having a hexagonal crystal structure and a normal to a growth surface characterized by a misorientation from the direction of between 0.15° and 0.65°. The electronic device also includes a first epitaxial layer coupled to the III-V substrate and a second epitaxial layer coupled to the first epitaxial layer. The electronic device further includes a first contact in electrical contact with the substrate and a second contact in electrical contact with the second epitaxial layer.
摘要翻译：一种电子器件包括具有六方晶系结构的III-V衬底和与生长表面垂直的III-V衬底，其特征在于从<0001>方向在0.15°至0.65°之间的取向偏差。电子器件还包括耦合到III-V衬底的第一外延层和耦合到第一外延层的第二外延层。电子器件还包括与衬底电接触的第一触点和与第二外延层电接触的第二触点。

8. 发明授权

US09397186B2 Method of fabricating a gallium nitride merged P-I-N schottky (MPS) diode by regrowth and etch back 有权
标题翻译：通过再生长和回蚀刻制造氮化镓合并的P-I-N肖特基（MPS）二极管的方法
公开(公告)号：US09397186B2
公开(公告)日：2016-07-19
申请号：US14602125
申请日：2015-01-21
申请人： Avogy, Inc.
发明人： Madhan M. Raj , Brian Alvarez , David P. Bour , Andrew P. Edwards , Hui Nie , Isik C. Kizilyalli
IPC分类号： H01L21/328 , H01L21/329 , H01L29/868 , H01L29/872 , H01L29/66 , H01L29/06 , H01L29/20 , H01L21/02
CPC分类号： H01L29/66143 , H01L21/0254 , H01L21/02664 , H01L29/0619 , H01L29/2003 , H01L29/66121 , H01L29/66212 , H01L29/872
摘要： An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections.
摘要翻译： MPS二极管包括以第一导电类型和第一掺杂剂浓度为特征的III族氮化物衬底，其具有第一侧和第二侧。 MPS二极管还包括III族氮化物外延结构，其包括耦合到衬底的第一侧的第一III族氮化物外延层，其中第一III族氮化物外延层的区域包括突起阵列。 III族氮化物外延结构还包括多个第二导电类型的III族氮化物区域，每个部分设置在相邻的突起之间。第二导电类型的多个III族氮化物区域中的每一个包括横向位于相邻突起之间的第一部分和沿着垂直于衬底的第一侧的方向延伸的第二部分。 MPS二极管还包括电耦合到一个或多个突起和一个或多个第二部分的第一金属结构。

9. 发明授权

US09269793B2 Method and system for a gallium nitride self-aligned vertical MESFET 有权
标题翻译：氮化镓自对准垂直MESFET的方法和系统
公开(公告)号：US09269793B2
公开(公告)日：2016-02-23
申请号：US14489761
申请日：2014-09-18
申请人： Avogy, Inc.
发明人： Richard J. Brown , Isik C. Kizilyalli , Hui Nie , Andrew P. Edwards , David P. Bour
IPC分类号： H01L29/20 , H01L21/20 , H01L21/332 , H01L29/66 , H01L29/812 , H01L29/808 , H01L21/02 , H01L21/32 , H01L29/36 , H01L29/47 , H01L29/10 , H01L29/16
CPC分类号： H01L29/66856 , H01L21/0254 , H01L21/02647 , H01L21/32 , H01L29/1066 , H01L29/1608 , H01L29/2003 , H01L29/36 , H01L29/475 , H01L29/8083 , H01L29/812 , H01L29/8122
摘要： A semiconductor structure includes a III-nitride substrate and a drift region coupled to the III-nitride substrate along a growth direction. The semiconductor substrate also includes a channel region coupled to the drift region. The channel region is defined by a channel sidewall disposed substantially along the growth direction. The semiconductor substrate further includes a gate region disposed laterally with respect to the channel region.
摘要翻译：半导体结构包括III族氮化物衬底和沿生长方向耦合到III族氮化物衬底的漂移区域。半导体衬底还包括耦合到漂移区的沟道区。通道区域由基本沿着生长方向设置的通道侧壁限定。半导体衬底还包括相对于沟道区域侧向设置的栅极区域。

10. 发明申请

US20160043198A1 SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS 审中-公开
公开(公告)号：US20160043198A1
公开(公告)日：2016-02-11
申请号：US14923139
申请日：2015-10-26
申请人： Avogy, Inc.
发明人： Andrew Edwards , Hui Nie , Isik C. Kizilyalli , Richard J. Brown , David P. Bour , Linda Romano , Thomas R. Prunty
IPC分类号： H01L29/66 , H01L29/06 , H01L29/20
CPC分类号： H01L29/66143 , H01L21/26546 , H01L29/0615 , H01L29/0619 , H01L29/0692 , H01L29/08 , H01L29/2003 , H01L29/404 , H01L29/66083 , H01L29/66204 , H01L29/66212 , H01L29/66416 , H01L29/66924 , H01L29/8083 , H01L29/868 , H01L29/872
摘要： A semiconductor structure includes a III-nitride substrate characterized by a first conductivity type and having a first side and a second side opposing the first side, a III-nitride epitaxial layer of the first conductivity type coupled to the first side of the III-nitride substrate, and a plurality of III-nitride epitaxial structures of a second conductivity type coupled to the III-nitride epitaxial layer. The semiconductor structure further includes a III-nitride epitaxial formation of the first conductivity type coupled to the plurality of III-nitride epitaxial structures, and a metallic structure forming a Schottky contact with the III-nitride epitaxial formation and coupled to at least one of the plurality of III-nitride epitaxial structures.

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