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1. 发明授权

US11121002B2 Systems and methods for etching metals and metal derivatives 有权
公开(公告)号：US11121002B2
公开(公告)日：2021-09-14
申请号：US16169249
申请日：2018-10-24
申请人： Applied Materials, Inc.
发明人： Zhenjiang Cui , Hanshen Zhang , Siliang Chang , Daniella Holm
IPC分类号： H01L21/306 , H01L21/3065 , H01L21/311 , H01L21/3213 , H01L21/4757 , H01L21/768
摘要： Exemplary etching methods may include flowing a halogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The methods may include contacting a substrate housed in the substrate processing region with the halogen-containing precursor. The substrate may define an exposed region of a transition-metal-containing material. The methods may also include removing the transition-metal-containing material. The flowing and the contacting may be plasma-free operations.

2. 发明授权

US10861676B2 Metal recess for semiconductor structures 有权
公开(公告)号：US10861676B2
公开(公告)日：2020-12-08
申请号：US15912404
申请日：2018-03-05
申请人： Applied Materials, Inc.
发明人： Zhenjiang Cui , Nitin Ingle , Feiyue Ma , Hanshen Zhang , Siliang Chang , Daniella Holm
IPC分类号： H01J37/32 , H01L27/10 , H01L21/02 , H01L27/02 , H01L21/285 , H01L21/3213 , H01L27/11582
摘要： Exemplary methods for etching a variety of metal-containing materials may include flowing an oxygen-containing precursor into a semiconductor processing chamber. A substrate positioned within the semiconductor processing chamber may include a trench formed between two vertical columns and a metal-containing material arranged within a plurality of recesses defined by the two vertical columns. The plurality of recesses may include a first recess and a second recess adjacent to the first recess. The metal-containing material arranged within the first recess and the metal-containing material arranged within the second recess may be connected by the metal-containing material lining a portion of sidewalls of the trench. The methods may further include oxidizing the metal-containing material with the oxygen-containing precursor. The methods may also include flowing a halide precursor into the semiconductor processing chamber. The methods may further include laterally etching the oxidized metal-containing material lining the portion of the sidewalls of the trench.

3. 发明授权

US10692880B2 3D NAND high aspect ratio structure etch 有权
公开(公告)号：US10692880B2
公开(公告)日：2020-06-23
申请号：US15855465
申请日：2017-12-27
申请人： Applied Materials, Inc.
发明人： Zhenjiang Cui , Hanshen Zhang , Anchuan Wang , Zhijun Chen , Nitin K. Ingle
IPC分类号： H01L27/11582 , H01L21/311 , H01L21/3213 , H01L23/31 , H01L21/67 , H01L27/11556 , H01L23/29
摘要： Embodiments of the present disclosure provide methods for forming features in a film stack. The film stack may be utilized to form stair-like structures with accurate profiles control in manufacturing three dimensional (3D) stacking of semiconductor chips. In one example, a method includes exposing a substrate having a multi-material layer formed thereon to radicals of a remote plasma to form one or more features through the multi-material layer, the one or more features exposing a portion of a top surface of the substrate, and the multi-material layer comprising alternating layers of a first layer and a second layer, wherein the remote plasma is formed from an etching gas mixture comprising a fluorine-containing chemistry, and wherein the process chamber is maintained at a pressure of about 2 Torr to about 20 Torr and a temperature of about −100° C. to about 100° C.

4. 发明授权

US09960049B2 Two-step fluorine radical etch of hafnium oxide 有权
公开(公告)号：US09960049B2
公开(公告)日：2018-05-01
申请号：US15161783
申请日：2016-05-23
申请人： Applied Materials, Inc.
发明人： Hanshen Zhang , Jie Liu , Zhenjiang Cui
IPC分类号： H01L21/3065 , H01L21/311 , H01J37/32
CPC分类号： H01L21/3065 , H01J37/32357 , H01J37/32422 , H01L21/31122
摘要： In one implementation, a method of removing a metal-containing layer is provided. The method comprises generating a plasma from a fluorine-containing gas. The plasma comprises fluorine radicals and fluorine ions. The fluorine ions are removed from the plasma to provide a reactive gas having a higher concentration of fluorine radicals than fluorine ions. A substrate comprising a metal-containing layer is exposed to the reactive gas. The reactive gas dopes at least a portion of the metal-containing layer to form a metal-containing layer doped with fluorine radicals. The metal-containing layer doped with fluorine radicals is exposed to a nitrogen and hydrogen containing gas mixture and the reactive gas to remove at least a portion of the metal-containing layer doped with fluorine radicals.

5. 发明授权

US11682560B2 Systems and methods for hafnium-containing film removal 有权
公开(公告)号：US11682560B2
公开(公告)日：2023-06-20
申请号：US16157419
申请日：2018-10-11
申请人： Applied Materials, Inc.
发明人： Zhenjiang Cui , Hanshen Zhang , Daniella Holm
IPC分类号： C23F1/12 , H01L21/311 , H01L21/02 , H01L21/67
CPC分类号： H01L21/31116 , H01L21/0206 , H01L21/67167
摘要： Exemplary etching methods may include flowing a halogen-containing precursor into a substrate processing region of a semiconductor processing chamber. The halogen-containing precursor may be characterized by a gas density greater than or about 5 g/L. The methods may include contacting a substrate housed in the substrate processing region with the halogen-containing precursor. The substrate may define an exposed region of a hafnium-containing material. The methods may also include removing the hafnium-containing material.

6. 发明授权

US10854426B2 Metal recess for semiconductor structures 有权
公开(公告)号：US10854426B2
公开(公告)日：2020-12-01
申请号：US15864718
申请日：2018-01-08
申请人： Applied Materials, Inc.
发明人： Zhenjiang Cui , Nitin Ingle , Feiyue Ma , Hanshen Zhang , Siliang Chang , Daniella Holm
IPC分类号： H01J37/32 , H01L27/10 , H01L21/02 , H01L27/02 , H01L21/285 , H01L21/3213 , H01L27/11582
摘要： Exemplary methods for laterally etching tungsten may include flowing an oxygen-containing precursor into a semiconductor processing chamber. A substrate positioned within the semiconductor processing chamber may include a trench formed between two vertical columns and tungsten slabs arranged within a plurality of recesses defined by at least one of the two vertical columns. At least two of the tungsten slabs may be connected by tungsten lining a portion of sidewalls of the trench. The methods may further include oxidizing the tungsten connecting the at least two of the tungsten slabs with the oxygen-containing precursor. The methods may include flowing a halide precursor into the semiconductor processing chamber. The methods may also include laterally etching the oxidized tungsten from the sidewalls of the trench.

7. 发明申请

US20190214230A1 METAL RECESS FOR SEMICONDUCTOR STRUCTURES 审中-公开
公开(公告)号：US20190214230A1
公开(公告)日：2019-07-11
申请号：US15912404
申请日：2018-03-05
申请人： Applied Materials, Inc.
发明人： Zhenjiang Cui , Nitin Ingle , Feiyue Ma , Hanshen Zhang , Siliang Chang , Daniella Holm
IPC分类号： H01J37/32 , H01L27/10 , H01L27/02 , H01L21/285 , H01L21/02
CPC分类号： H01J37/32091 , H01J37/32449 , H01J37/32788 , H01J37/32972 , H01L21/02274 , H01L21/0262 , H01L21/28518 , H01L27/0203 , H01L27/10
摘要： Exemplary methods for etching a variety of metal-containing materials may include flowing an oxygen-containing precursor into a semiconductor processing chamber. A substrate positioned within the semiconductor processing chamber may include a trench formed between two vertical columns and a metal-containing material arranged within a plurality of recesses defined by the two vertical columns. The plurality of recesses may include a first recess and a second recess adjacent to the first recess. The metal-containing material arranged within the first recess and the metal-containing material arranged within the second recess may be connected by the metal-containing material lining a portion of sidewalls of the trench. The methods may further include oxidizing the metal-containing material with the oxygen-containing precursor. The methods may also include flowing a halide precursor into the semiconductor processing chamber. The methods may further include laterally etching the oxidized metal-containing material lining the portion of the sidewalls of the trench.

8. 发明授权

US09564338B1 Silicon-selective removal 有权
标题翻译：硅选择性去除
公开(公告)号：US09564338B1
公开(公告)日：2017-02-07
申请号：US14847496
申请日：2015-09-08
申请人： Applied Materials, Inc.
发明人： Jingchun Zhang , Hanshen Zhang
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/3213
CPC分类号： H01L21/3065 , H01J37/32357 , H01J37/32422 , H01J37/3244 , H01J37/32513 , H01L21/32137
摘要： A method of etching exposed silicon on patterned heterogeneous structures is described and includes a gas phase etch using plasma effluents formed in a remote plasma. The remote plasma excites a fluorine-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents combine with a hydrogen-containing precursor. The combination reacts with the patterned heterogeneous structures to remove an exposed silicon portion faster than a second exposed portion. The silicon selectivity results from the presence of an ion suppressor positioned between the remote plasma and the substrate processing region. The methods may be used to selectively remove silicon faster than silicon oxide, silicon nitride and a variety of metal-containing materials. The methods may be used to remove small etch amounts in a controlled manner and may result in an extremely smooth silicon surface.
摘要翻译：描述了在图案化的异质结构上蚀刻暴露的硅的方法，并且包括使用在远程等离子体中形成的等离子体流出物的气相蚀刻。远程等离子体激发含氟前体。远程等离子体内的等离子体流出物流入衬底处理区域，其中等离子体流出物与含氢前体结合。该组合与图案化的异质结构反应以比第二暴露部分更快地去除暴露的硅部分。硅选择性是由位于远程等离子体和基板处理区域之间的离子抑制器的存在引起的。这些方法可用于比硅氧化物，氮化硅和各种含金属的材料选择性地去除硅。这些方法可以用于以受控的方式去除小的蚀刻量，并且可能导致非常光滑的硅表面。

9. 发明授权

US09472412B2 Procedure for etch rate consistency 有权
公开(公告)号：US09472412B2
公开(公告)日：2016-10-18
申请号：US14957902
申请日：2015-12-03
申请人： Applied Materials, Inc.
发明人： Jingchun Zhang , Hanshen Zhang
IPC分类号： H01L21/302 , H01L21/461 , H01L21/3065 , H01J37/32 , H01L21/3213
CPC分类号： H01L21/3065 , H01J37/32357 , H01J37/32862 , H01L21/32137
摘要： Methods of conditioning interior processing chamber walls of an etch chamber are described. A fluorine-containing precursor may be remotely or locally excited in a plasma to treat the interior chamber walls periodically on a preventative maintenance schedule. The treated walls promote an even etch rate when used to perform gas-phase etching of silicon regions following conditioning. Alternatively, a hydrogen-containing precursor may be remotely or locally excited in a plasma to treat the interior chamber walls in embodiments. Regions of exposed silicon may then be etched with more reproducible etch rates from wafer-to-wafer. The silicon etch may be performed using plasma effluents formed from a remotely excited fluorine-containing precursor.

10. 发明授权

US09881805B2 Silicon selective removal 有权
公开(公告)号：US09881805B2
公开(公告)日：2018-01-30
申请号：US15056756
申请日：2016-02-29
申请人： APPLIED MATERIALS, INC.
发明人： Zihui Li , Ching-Mei Hsu , Hanshen Zhang , Jingchun Zhang
IPC分类号： H01L21/3065 , H01J37/32
CPC分类号： H01L21/3065 , H01J37/32357 , H01J37/32422 , H01J37/32954 , H01J2237/334
摘要： A method of etching exposed silicon on patterned heterogeneous structures is described and includes a gas phase etch using plasma effluents formed in a remote plasma. The remote plasma excites a fluorine-containing precursor. Plasma effluents within the remote plasma are flowed into a substrate processing region where the plasma effluents combine with a hydrogen-containing precursor. The combination react with the patterned heterogeneous structures to remove an exposed silicon portion faster than a second exposed portion. The silicon selectivity results from the presence of an ion suppressor positioned between the remote plasma and the substrate processing region. The methods may be used to selectively remove silicon faster than silicon oxide, silicon nitride and a variety of metal-containing materials. The methods may be used to remove small etch amounts in a controlled manner and may result in an extremely smooth silicon surface.

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