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1. 发明授权

US08928410B2 Electronic circuits including a MOSFET and a dual-gate JFET 有权
标题翻译：包括MOSFET和双栅极JFET的电子电路
公开(公告)号：US08928410B2
公开(公告)日：2015-01-06
申请号：US13803792
申请日：2013-03-14
申请人： ACCO Semiconductor, Inc.
发明人： Alexandre G. Bracale , Denis A. Masliah
IPC分类号： H03F3/16 , H01L27/088 , H01L21/82 , H01L27/06 , H03F1/22 , H03F3/195 , H03F3/24 , H03F1/02 , H03F1/56 , H03F3/193 , H01L27/095 , H01L27/098
CPC分类号： H01L27/088 , H01L21/82 , H01L27/0617 , H01L27/095 , H01L27/098 , H03F1/0266 , H03F1/223 , H03F1/56 , H03F3/1935 , H03F3/195 , H03F3/245 , H03F2200/18 , H03F2200/222 , H03F2200/387
摘要： Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above and below the channel. The top gate of the JFET is controlled by a signal that is dependent upon the signal controlling the gate of the MOSFET. The control of the bottom gate of the JFET can be dependent or independent of the control of the top gate. The MOSFET and JFET can be implemented as separate components on the same substrate with different dimensions such as gate widths.
摘要翻译：提供电子电路和方法用于各种应用，包括信号放大。示例性电子电路包括MOSFET和共栅二极管配置的双栅极JFET。双栅极JFET包括设置在通道上方和下方的顶部和底部门。 JFET的顶栅由信号控制，该信号取决于控制MOSFET栅极的信号。 JFET的底栅的控制可以取决于或不依赖于顶栅的控制。 MOSFET和JFET可以在不同尺寸（如栅极宽度）的同一衬底上实现为单独的组件。

2. 发明授权

US09627374B2 Electronic circuits including a MOSFET and a dual-gate JFET 有权
公开(公告)号：US09627374B2
公开(公告)日：2017-04-18
申请号：US14979337
申请日：2015-12-22
申请人： ACCO
发明人： Denis A. Masliah
IPC分类号： H01L21/336 , H01L21/8234 , H01L27/06 , H01L29/78 , H03F1/02 , H03F1/22 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/24 , H01L29/423 , H01L29/66 , H01L29/808 , H01L27/095 , H01L27/098
CPC分类号： H01L27/0617 , H01L27/095 , H01L27/098 , H01L29/42316 , H01L29/66484 , H01L29/78 , H01L29/7832 , H01L29/808 , H03F1/0266 , H03F1/223 , H03F1/56 , H03F3/1935 , H03F3/195 , H03F3/245 , H03F2200/18 , H03F2200/222 , H03F2200/387
摘要： Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above and below the channel. The top gate of the JFET is controlled by a signal that is dependent upon the signal controlling the gate of the MOSFET. The control of the bottom gate of the JFET can be dependent or independent of the control of the top gate. The MOSFET and JFET can be implemented as separate components on the same substrate with different dimensions such as gate widths.

3. 发明授权

US09621110B1 Capacitive cross-coupling and harmonic rejection 有权
公开(公告)号：US09621110B1
公开(公告)日：2017-04-11
申请号：US14930185
申请日：2015-11-02
申请人： ACCO
发明人： Christophe Boyavalle , Denis A. Masliah , Francis C. Huin
IPC分类号： H03F3/16 , H03F1/22 , H03F1/02 , H03F3/193 , H03F3/21
CPC分类号： H03F3/21 , H03F1/3211 , H03F3/1935 , H03F3/45385 , H03F2200/267 , H03F2200/451 , H03F2203/45318 , H03F2203/45332 , H03F2203/45481
摘要： A power amplifier of the present invention comprises a first cascode including a MOSFET and a JFET and a first capacitor electrically connected between the source and the drain of the JFET. Two such power amplifiers in parallel form a differential power amplifier. In the differential amplifier a second capacitor can be electrically connected between the source and the drain of the second JFET. Another differential power amplifier comprises a first capacitor electrically connected between the gate of the first MOSFET and the source of the second MOSFET, and a second capacitor electrically connected between the gate of the second MOSFET and the source of the first MOSFET. Some of these differential power amplifiers also include capacitors electrically connected between the sources and the drains of the JFETs.

4. 发明授权

US09240402B2 Electronic circuits including a MOSFET and a dual-gate JFET 有权
公开(公告)号：US09240402B2
公开(公告)日：2016-01-19
申请号：US14531754
申请日：2014-11-03
申请人： ACCO Semiconductor, Inc.
发明人： Denis A. Masliah , Alexandre G. Bracale
IPC分类号： H01L29/66 , H01L27/06 , H01L29/78 , H01L29/808 , H03F1/02 , H03F1/22 , H03F1/56 , H03F3/193 , H03F3/195 , H03F3/24 , H01L27/095 , H01L27/098
CPC分类号： H01L27/0617 , H01L27/095 , H01L27/098 , H01L29/42316 , H01L29/66484 , H01L29/78 , H01L29/7832 , H01L29/808 , H03F1/0266 , H03F1/223 , H03F1/56 , H03F3/1935 , H03F3/195 , H03F3/245 , H03F2200/18 , H03F2200/222 , H03F2200/387
摘要： Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above and below the channel. The top gate of the JFET is controlled by a signal that is dependent upon the signal controlling the gate of the MOSFET. The control of the bottom gate of the JFET can be dependent or independent of the control of the top gate. The MOSFET and JFET can be implemented as separate components on the same substrate with different dimensions such as gate widths.

5. 发明授权

US08731485B2 RF switches 有权
标题翻译：射频开关
公开(公告)号：US08731485B2
公开(公告)日：2014-05-20
申请号：US13946892
申请日：2013-07-19
申请人： ACCO Semiconductor, Inc.
发明人： Denis A. Masliah
IPC分类号： H04B1/44
CPC分类号： H01Q1/50 , H01P1/127 , H01P1/15 , H04B1/44
摘要： RF switching devices are provided that alternatively couple an antenna to either a transmitter amplifier or a receiver amplifier. An exemplary RF switching device comprises two valves, one for a receiver transmission line between the antenna and the receiver amplifier, the other for a transmitter transmission line between the antenna and the power amplifier. Each valve is switchably coupled between ground and its transmission line. When coupled to ground, current flowing through the valve increases the impedance of the transmission line thereby attenuating signals on the transmission line. When decoupled from ground, the impedance of the transmission line is essentially unaffected. The pair of valves is controlled such that when one valve is on the other valve is off, and vice versa, so that the antenna is either receiving signals from the power amplifier or the receiver amplifier is receiving signals from the antenna.
摘要翻译：提供RF切换装置，其交替地将天线耦合到发射机放大器或接收机放大器。示例性RF开关装置包括两个阀，一个用于天线和接收器放大器之间的接收器传输线，另一个用于天线和功率放大器之间的发射机传输线。每个阀可切换地连接在地和其传输线之间。当耦合到地面时，流过阀门的电流增加了传输线路的阻抗，从而衰减了传输线路上的信号。当与地耦合时，传输线的阻抗基本上不受影响。所述一对阀被控制成使得当另一个阀上的一个阀处于关闭状态时，反之亦然，使得天线或者接收来自功率放大器的信号或接收机放大器正在从天线接收信号。

6. 发明申请

US20160111417A1 ELECTRONIC CIRCUITS INCLUDING A MOSFET AND A DUAL-GATE JFET 有权
标题翻译：包括MOSFET和双栅极JFET的电子电路
公开(公告)号：US20160111417A1
公开(公告)日：2016-04-21
申请号：US14979337
申请日：2015-12-22
申请人： ACCO
发明人： Denis A. Masliah
IPC分类号： H01L27/06 , H01L29/808 , H01L29/423 , H01L29/78
CPC分类号： H01L27/0617 , H01L27/095 , H01L27/098 , H01L29/42316 , H01L29/66484 , H01L29/78 , H01L29/7832 , H01L29/808 , H03F1/0266 , H03F1/223 , H03F1/56 , H03F3/1935 , H03F3/195 , H03F3/245 , H03F2200/18 , H03F2200/222 , H03F2200/387
摘要： Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above and below the channel. The top gate of the JFET is controlled by a signal that is dependent upon the signal controlling the gate of the MOSFET. The control of the bottom gate of the JFET can be dependent or independent of the control of the top gate. The MOSFET and JFET can be implemented as separate components on the same substrate with different dimensions such as gate widths.
摘要翻译：提供电子电路和方法用于各种应用，包括信号放大。示例性电子电路包括MOSFET和共栅二极管配置的双栅极JFET。双栅极JFET包括设置在通道上方和下方的顶部和底部门。 JFET的顶栅由信号控制，该信号取决于控制MOSFET栅极的信号。 JFET的底栅的控制可以取决于或不依赖于顶栅的控制。 MOSFET和JFET可以在不同尺寸（如栅极宽度）的同一衬底上实现为单独的组件。

7. 发明申请

US20130248945A1 Electronic Circuits including a MOSFET and a Dual-Gate JFET 有权
公开(公告)号：US20130248945A1
公开(公告)日：2013-09-26
申请号：US13803792
申请日：2013-03-14
申请人： ACCO Semiconductor, Inc.
发明人： Alexandre G. Bracale , Denis A. Masliah
IPC分类号： H01L27/088 , H01L21/82
CPC分类号： H01L27/088 , H01L21/82 , H01L27/0617 , H01L27/095 , H01L27/098 , H03F1/0266 , H03F1/223 , H03F1/56 , H03F3/1935 , H03F3/195 , H03F3/245 , H03F2200/18 , H03F2200/222 , H03F2200/387
摘要： Electronic circuits and methods are provided for various applications including signal amplification. An exemplary electronic circuit comprises a MOSFET and a dual-gate JFET in a cascode configuration. The dual-gate JFET includes top and bottom gates disposed above and below the channel. The top gate of the JFET is controlled by a signal that is dependent upon the signal controlling the gate of the MOSFET. The control of the bottom gate of the JFET can be dependent or independent of the control of the top gate. The MOSFET and JFET can be implemented as separate components on the same substrate with different dimensions such as gate widths.

8. 发明申请

US20170187340A1 Capacitive Cross-Coupling and Harmonic Rejection 审中-公开
公开(公告)号：US20170187340A1
公开(公告)日：2017-06-29
申请号：US15458281
申请日：2017-03-14
申请人： ACCO
发明人： Christophe Boyavalle , Denis A. Masliah , Francis C. Huin
IPC分类号： H03F3/21 , H03F3/193
CPC分类号： H03F3/21 , H03F1/3211 , H03F3/1935 , H03F3/45385 , H03F2200/267 , H03F2200/451 , H03F2203/45318 , H03F2203/45332 , H03F2203/45481
摘要： A power amplifier of the present invention comprises a first cascode including a MOSFET and a JFET and a first capacitor electrically connected between the source and the drain of the JFET. Two such power amplifiers in parallel form a differential power amplifier. In the differential amplifier a second capacitor can be electrically connected between the source and the drain of the second JFET. Another differential power amplifier comprises a first capacitor electrically connected between the gate of the first MOSFET and the source of the second MOSFET, and a second capacitor electrically connected between the gate of the second MOSFET and the source of the first MOSFET. Some of these differential power amplifiers also include capacitors electrically connected between the sources and the drains of the JFETs.

9. 发明申请

US20130303093A1 RF Switches 有权
标题翻译：射频开关
公开(公告)号：US20130303093A1
公开(公告)日：2013-11-14
申请号：US13946892
申请日：2013-07-19
申请人： ACCO Semiconductor, Inc.
发明人： Denis A. Masliah
IPC分类号： H01Q1/50 , H04B1/44
CPC分类号： H01Q1/50 , H01P1/127 , H01P1/15 , H04B1/44
摘要： RF switching devices are provided that alternatively couple an antenna to either a transmitter amplifier or a receiver amplifier. An exemplary RF switching device comprises two valves, one for a receiver transmission line between the antenna and the receiver amplifier, the other for a transmitter transmission line between the antenna and the power amplifier. Each valve is switchably coupled between ground and its transmission line. When coupled to ground, current flowing through the valve increases the impedance of the transmission line thereby attenuating signals on the transmission line. When decoupled from ground, the impedance of the transmission line is essentially unaffected. The pair of valves is controlled such that when one valve is on the other valve is off, and vice versa, so that the antenna is either receiving signals from the power amplifier or the receiver amplifier is receiving signals from the antenna.
摘要翻译：提供RF切换装置，其交替地将天线耦合到发射机放大器或接收机放大器。示例性RF开关装置包括两个阀，一个用于天线和接收器放大器之间的接收器传输线，另一个用于天线和功率放大器之间的发射机传输线。每个阀可切换地连接在地和其传输线之间。当耦合到地面时，流过阀门的电流增加了传输线路的阻抗，从而衰减了传输线路上的信号。当与地耦合时，传输线的阻抗基本上不受影响。所述一对阀被控制成使得当另一个阀上的一个阀处于关闭状态时，反之亦然，使得天线或者接收来自功率放大器的信号或接收机放大器正在从天线接收信号。

10. 发明申请

US20170126179A1 Capacitive Cross-Coupling and Harmonic Rejection 有权
公开(公告)号：US20170126179A1
公开(公告)日：2017-05-04
申请号：US14930185
申请日：2015-11-02
申请人： ACCO
发明人： Christophe Boyavalle , Denis A. Masliah , Francis C. Huin
IPC分类号： H03F1/02 , H03F3/21 , H03F3/193
CPC分类号： H03F3/21 , H03F1/3211 , H03F3/1935 , H03F3/45385 , H03F2200/267 , H03F2200/451 , H03F2203/45318 , H03F2203/45332 , H03F2203/45481
摘要： A power amplifier of the present invention comprises a first cascode including a MOSFET and a JFET and a first capacitor electrically connected between the source and the drain of the JFET. Two such power amplifiers in parallel form a differential power amplifier. In the differential amplifier a second capacitor can be electrically connected between the source and the drain of the second JFET. Another differential power amplifier comprises a first capacitor electrically connected between the gate of the first MOSFET and the source of the second MOSFET, and a second capacitor electrically connected between the gate of the second MOSFET and the source of the first MOSFET. Some of these differential power amplifiers also include capacitors electrically connected between the sources and the drains of the JFETs.

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