会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 4. 发明申请
    • MEMORY SYSTEM
    • 记忆系统
    • US20120106254A1
    • 2012-05-03
    • US13235390
    • 2011-09-18
    • Yuuta SANOToshifumi Watanabe
    • Yuuta SANOToshifumi Watanabe
    • G11C16/06
    • G11C16/08G11C16/0483G11C16/26G11C16/32
    • According to one embodiment, a memory system includes a NAND flash memory, a first unit, and an second unit. Memory cells capable of holding data and management data as a first control signal. Memory cells are arranged in a matrix in the NAND flash memory. The first unit holds a second and a third signal. The second signal is made variable in accordance with an output frequency. The third signal is made variable. The second unit outputs the data to an outside in accordance with the first to third signals. The second unit includes a buffer unit including first to third transistors. The output frequency includes a first frequency and a second frequency. If the first to third transistors output the data to the outside in synchronization with the second frequency, the first to third transistors may be turned on regardless of a value of the first control signal.
    • 根据一个实施例,存储器系统包括NAND快闪存储器,第一单元和第二单元。 能够将数据和管理数据保存为第一控制信号的存储单元。 存储器单元被布置在NAND闪存中的矩阵中。 第一单元保持第二和第三信号。 第二信号根据输出频率变化。 第三个信号是可变的。 第二单元根据第一至第三信号将数据输出到外部。 第二单元包括包括第一至第三晶体管的缓冲单元。 输出频率包括第一频率和第二频率。 如果第一至第三晶体管与第二频率同步地将数据输出到外部,则不管第一控制信号的值如何,第一至第三晶体管可以导通。