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1. 发明授权

US5949118A Etching method for silicon substrates and semiconductor sensor 失效
标题翻译：硅衬底和半导体传感器的蚀刻方法
公开(公告)号：US5949118A
公开(公告)日：1999-09-07
申请号：US637128
申请日：1996-04-24
申请人： Minekazu Sakai , Tsuyoshi Fukada , Koki Mizuno , Yasutoshi Suzuki , Yoshitsugu Abe , Hiroshi Tanaka , Motoki Ito , Kazuhisa Ikeda , Hiroshi Okada
发明人： Minekazu Sakai , Tsuyoshi Fukada , Koki Mizuno , Yasutoshi Suzuki , Yoshitsugu Abe , Hiroshi Tanaka , Motoki Ito , Kazuhisa Ikeda , Hiroshi Okada
IPC分类号： G01L9/00 , H01L29/84 , H01L29/82
CPC分类号： G01L9/0042 , H01L29/84 , Y10S438/977
摘要： An etching method for a silicon substrate, which can easily smooth the etching surface of the (110)-oriented silicon, is disclosed. A container is filled with KOH solution. In the KOH solution is immersed a (110)-oriented silicon wafer having a PN junction and is also disposed a platinum electrode plate to face the silicon wafer. To between a platinum electrode of the silicon wafer and the platinum electrode plate are connected a constant voltage power source, an ammeter and a contact in series. A controller starts etching from one surface on which the PN junction is formed, and terminates voltage application when the specified time lapses after the formation of an anodic oxide film is equilibrated with the etching of the anodic oxide film on the etching surface on the PN junction part. In this case, the controller detects flowing current through the ammeter, and the point of time when the equilibrium state is obtained is the point of inflection of the detected current to the constant current after the peak thereof.
摘要翻译：公开了一种可以容易地平滑（110）取向的硅的蚀刻表面的硅衬底的蚀刻方法。容器中充满KOH溶液。在KOH溶液中浸渍具有PN结的（110）取向的硅晶片，并且还设置有与铂晶片相对的铂电极板。在硅晶片的铂电极和铂电极板之间连接恒压电源，电流表和触点串联。控制器从其上形成PN结的一个表面开始蚀刻，并且在阳极氧化膜形成之后指定的时间经过平衡后，在PN结的蚀刻表面上蚀刻阳极氧化膜来终止电压施加部分。在这种情况下，控制器检测通过电流表的流动电流，并且获得平衡状态的时间点是检测电流在其峰值之后的恒定电流的拐点。

2. 发明授权

US06284670B1 Method of etching silicon wafer and silicon wafer 失效
标题翻译：蚀刻硅晶片和硅晶片的方法
公开(公告)号：US06284670B1
公开(公告)日：2001-09-04
申请号：US09120803
申请日：1998-07-23
申请人： Yoshitsugu Abe , Hiroshi Tanaka , Atsushi Sakaida , Toshihisa Taniguchi , Tsuyoshi Fukada
发明人： Yoshitsugu Abe , Hiroshi Tanaka , Atsushi Sakaida , Toshihisa Taniguchi , Tsuyoshi Fukada
IPC分类号： H01L213063
CPC分类号： B81C1/00158 , B81B2201/0235 , B81B2201/0264 , B81B2203/0127 , B81C2201/0114 , B81C2201/0133 , H01L21/3063
摘要： After an Si wafer is anisotropically etched through an etching mask having an opening in an anisotropically etching solution, an etching face of the Si wafer emerged by the anisotropic etching is subjected to anodic oxidation by applying a positive voltage for anodic oxidation on the Si wafer. As a result, the etching face of the Si wafer is isotropically etched due to the anodic oxidation in the anisotropic etching solution. By the isotropic etching thus performed, a sharp corner formed at an end portion of a recess portion formed in the Si wafer by the anisotropic etching, is rounded. Because the isotropic etching reaction progresses very slowly in comparison with the anisotropic etching, control of the etching can be made easy and accurately. As a result, the thickness of the diaphragm can be prevented from being dispersed.
摘要翻译：在通过各向异性蚀刻溶液中具有开口的蚀刻掩模对Si晶片进行各向异性蚀刻之后，通过在Si晶片上施加阳极氧化的正电压，通过各向异性蚀刻出现的Si晶片的蚀刻面进行阳极氧化。结果，由于各向异性蚀刻溶液中的阳极氧化，Si晶片的蚀刻面被各向同性地蚀刻。通过如此进行的各向同性蚀刻，通过各向异性蚀刻形成在形成在Si晶片中的凹部的端部处形成的尖角变圆。由于与各向异性蚀刻相比，各向同性蚀刻反应进行得非常缓慢，因此可以容易且精确地控制蚀刻。结果，可以防止隔膜的厚度分散。

3. 发明授权

US06194236B1 Electrochemical etching method for silicon substrate having PN junction 有权
标题翻译：具有PN结的硅衬底的电化学蚀刻方法
公开(公告)号：US06194236B1
公开(公告)日：2001-02-27
申请号：US09247908
申请日：1999-02-11
申请人： Minekazu Sakai , Tsuyoshi Fukada , Yukihiko Tanizawa , Koki Mizuno , Yasutoshi Suzuki , Yoshitsugu Abe , Hiroshi Tanaka , Motoki Ito , Kazuhisa Ikeda , Hiroshi Okada
发明人： Minekazu Sakai , Tsuyoshi Fukada , Yukihiko Tanizawa , Koki Mizuno , Yasutoshi Suzuki , Yoshitsugu Abe , Hiroshi Tanaka , Motoki Ito , Kazuhisa Ikeda , Hiroshi Okada
IPC分类号： H01L2166
CPC分类号： G01L9/0042 , H01L29/84 , Y10S438/977
摘要： An etching method for a silicon substrate, which can easily smooth the etching surface of the (110)-oriented silicon, is disclosed. A container is filled with KOH solution. In the KOH solution is immersed a (110)-oriented silicon wafer having a PN junction and is also disposed a platinum electrode plate to face the silicon wafer. To between a platinum electrode of the silicon wafer and the platinum electrode plate are connected a constant voltage power source, an ammeter and a contact in series. A controller starts etching from one surface on which the PN junction is formed, and terminates voltage application when the specified time lapses after the formation of an anodic oxide film is equilibrated with the etching of the anodic oxide film on the etching surface on the PN junction part. In this case, the controller detects flowing current through the ammeter, and the point of time when the equilibrium state is obtained is the point of inflection of the detected current to the constant current after the peak thereof.
摘要翻译：公开了一种可以容易地平滑（110）取向的硅的蚀刻表面的硅衬底的蚀刻方法。容器中充满KOH溶液。在KOH溶液中浸渍具有PN结的（110）取向的硅晶片，并且还设置有与铂晶片相对的铂电极板。在硅晶片的铂电极和铂电极板之间连接恒压电源，电流表和触点串联。控制器从其上形成PN结的一个表面开始蚀刻，并且在阳极氧化膜形成之后指定的时间经过平衡后，在PN结的蚀刻表面上蚀刻阳极氧化膜来终止电压施加部分。在这种情况下，控制器检测通过电流表的流动电流，并且获得平衡状态的时间点是检测电流在其峰值之后的恒定电流的拐点。

4. 发明授权

US5972236A Etchant, etching method using the same, and related etching apparatus 失效
标题翻译：蚀刻剂，使用其的蚀刻方法以及相关的蚀刻装置
公开(公告)号：US5972236A
公开(公告)日：1999-10-26
申请号：US907907
申请日：1997-08-11
申请人： Hiroshi Tanaka , Yoshitsugu Abe , Motoki Ito , Kazuyuki Inoue , Satoru Kosaka
发明人： Hiroshi Tanaka , Yoshitsugu Abe , Motoki Ito , Kazuyuki Inoue , Satoru Kosaka
IPC分类号： H01L21/306 , B44C1/22
CPC分类号： H01L21/30617
摘要： A silicon substance is etched by using alkaline etchant containing additive (Cu, Pb, Mg). The content of the additive is controlled intentionally to provide desired etching quality during an etching operation.
摘要翻译：通过使用含碱性蚀刻剂的添加剂（Cu，Pb，Mg）蚀刻硅物质。有意地控制添加剂的含量以在蚀刻操作期间提供期望的蚀刻质量。

5. 发明授权

US5912903A Method and system for quickly transferring data in a network having computers connected therewith 失效
标题翻译：在具有与其连接的计算机的网络中快速传送数据的方法和系统
公开(公告)号：US5912903A
公开(公告)日：1999-06-15
申请号：US728550
申请日：1996-10-09
申请人： Susumu Nakayashiki , Yoshitsugu Abe , Mitsugu Kohatsu , Kiyoyuki Takemi , Osamu Kinoshita
发明人： Susumu Nakayashiki , Yoshitsugu Abe , Mitsugu Kohatsu , Kiyoyuki Takemi , Osamu Kinoshita
IPC分类号： G06F13/00 , H04L1/00 , H04L1/18 , H04L12/28 , H04L12/66 , H04L29/08
CPC分类号： H04L47/10 , H04L1/187 , H04L2001/0092
摘要： A communication method applied to a communication system is provided for enhancing communication performance such as a throughput and a turn around time in the so-called intra-computer communication. In the communication procedure, when a source end system (SES) like a host computer transfers data to a destination end system (DES) such as a LAN or a WAN through a communication control system (CCS), the CCS served as a virtual destination receives the data and transmits an acknowledge (+Cresp) to the SES. In response to the acknowledge (+Crest), the SES performs the next transfer of the data. In response to the last acknowledge, the SES operates to output an indication about completion of the data transmission (End TX-C). The CCS continues to transfer the data temporarily received from the SES to the DES unless the CCS receives the acknowledge from the DES. The acknowledge +Cresp contains information about an amount of data transferred from the CCS to the DES. The SES operates to calculate an amount of data to be transferred on the basis of the amount of transferred data contained in the information, a window size and the amount of data so far transferred to the CCS.
摘要翻译：提供了一种应用于通信系统的通信方法，用于在所谓的计算机内通信中增强通信性能，例如吞吐量和转向时间。在通信过程中，当诸如主机的源端系统（SES）通过通信控制系统（CCS）将数据传送到诸如LAN或WAN的目的地终端系统（DES）时，CCS用作虚拟目的地接收数据并向SES发送确认（+ Cresp）。响应确认（+ Crest），SES执行下一次数据传输。响应于最后一个确认，SES用于输出关于数据传输完成的指示（结束TX-C）。 CCS继续将从SES临时接收的数据传送到DES，除非CCS收到DES的确认。确认+ Cresp包含有关从CCS传输到DES的数据量的信息。 SES根据信息中包含的传输数据的数量，窗口大小和迄今为止传输给CCS的数据量，计算要传输的数据量。

6. 发明授权

US5899750A Fine processing method 失效
标题翻译：精细加工方法
公开(公告)号：US5899750A
公开(公告)日：1999-05-04
申请号：US814936
申请日：1997-03-12
申请人： Hiroshi Tanaka , Yoshitsugu Abe , Koji Matsumoto , Kazuyuki Inoue
发明人： Hiroshi Tanaka , Yoshitsugu Abe , Koji Matsumoto , Kazuyuki Inoue
IPC分类号： G01L1/18 , H01L21/306 , H01L21/308 , H01L29/84 , H01L21/302
CPC分类号： H01L21/3081 , Y10S438/942
摘要： In a fine processing method for forming a silicon substrate, first, an oxynitride layer is formed on the silicon substrate. Thereafter, a silicon nitride layer is formed on the oxynitride layer and patterned into a predetermined shape to cause it to function as an etching mask. The silicon substrate is etched through the etching mask. In this case, because of the oxynitride layer formed between the silicon substrate and the silicon nitride layer, an interface between the silicon substrate and the silicon nitride layer is not easily eroded in the etching process. As a result, processing accuracy of the substrate is improved.
摘要翻译：在用于形成硅衬底的精细加工方法中，首先在硅衬底上形成氧氮化物层。此后，在氧氮化物层上形成氮化硅层，并将其图案化成预定的形状，使其作为蚀刻掩模。通过蚀刻掩模蚀刻硅衬底。在这种情况下，由于在硅衬底和氮化硅层之间形成氧氮化物层，所以在蚀刻工艺中硅衬底和氮化硅层之间的界面不容易被侵蚀。结果，提高了基板的加工精度。

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