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1. 发明授权

US4257056A Electrically erasable read only memory 失效
标题翻译：电可擦除只读存储器
公开(公告)号：US4257056A
公开(公告)日：1981-03-17
申请号：US52595
申请日：1979-06-27
申请人： Ying K. Shum
发明人： Ying K. Shum
IPC分类号： H01L29/788 , H01L29/78 , G11C11/34 , H01L29/04 , H01L29/34
CPC分类号： H01L29/7885 , H01L29/7883
摘要： An electrically erasable floating gate storage cell (EPROM) is disclosed which comprises a body of single crystal silicon semiconductor material having a substrate of one conductivity type, a source region and a drain region each of a second conductivity type, a channel region of the first conductivity type connecting the source region and drain region, a polycrystalline silicon layer conductively connected to either the source region or the drain region, a conductive insulated floating gate which partially overlies and is separated from the polycrystalline silicon layer by a layer of silicon dioxide and a control gate which overlies and is separated from the floating gate by a layer of silicon dioxide. Fowler-Nordheim tunneling current occurs between the polycrystalline layer and the floating gate during programming and erasing of the EPROM. The floating gate influences the conductivity of the channel region in accordance with the charge stored thereon during programming. The control gate is oriented over the entire channel region to control the conductivity of the channel region in accordance with voltages applied thereto during operation of the EPROM.
摘要翻译：公开了一种电可擦除浮动存储单元（EPROM），其包括具有一种导电类型的衬底的单晶硅半导体材料体，第二导电类型的源极区和漏极区，第一导电类型的沟道区连接源极区域和漏极区域的导电类型，与源极区域或漏极区域导电连接的多晶硅层，部分覆盖并通过二氧化硅层和多晶硅层与多晶硅层分离的导电绝缘浮栅，以及控制栅极覆盖并通过一层二氧化硅与浮动栅极分离。在EPROM的编程和擦除期间，Fowler-Nordheim隧穿电流发生在多晶层和浮栅之间。浮动栅极根据编程期间存储的电荷影响沟道区的导电性。控制栅极定向在整个通道区域上，以在EPROM的操作期间根据施加到其上的电压来控制沟道区的导电性。

2. 发明授权

US5188972A Method for making bipolar transistor by self-aligning the emitter to the base contact diffusion 失效
标题翻译：通过将发射极自对准到基极接触扩散来制造双极晶体管的方法
公开(公告)号：US5188972A
公开(公告)日：1993-02-23
申请号：US875239
申请日：1992-04-28
申请人： Ying K. Shum , Sik K. Lui
发明人： Ying K. Shum , Sik K. Lui
IPC分类号： H01L21/02 , H01L21/331 , H01L27/06
CPC分类号： H01L28/40 , H01L27/0688 , H01L29/66272
摘要： A semiconductor structure having a high precision analog polysilicon capacitor with a self-aligned extrinsic base region of a bipolar transistor is disclosed. The structure is formed by simultaneously forming the dielectric layer of the capacitor with the formation of the base region of the bipolar transistor. A final oxidation step in the formation of the capacitor causes the base region to diffuse to form a self-aligned extrinsic base diffusion region.
摘要翻译：公开了具有双极晶体管的自对准非本征基极区域的具有高精度模拟多晶硅电容器的半导体结构。该结构通过同时形成电容器的介电层而形成，形成双极晶体管的基极区。形成电容器的最终氧化步骤使得基极区域扩散以形成自对准的外部基极扩散区域。

3. 发明授权

US4477825A Electrically programmable and erasable memory cell 失效
标题翻译：电可编程和可擦除存储单元
公开(公告)号：US4477825A
公开(公告)日：1984-10-16
申请号：US334700
申请日：1981-12-28
申请人： Giora Yaron , Ying K. Shum , Ury Priel , Jayasimha S. Prasad , Mark S. Ebel
发明人： Giora Yaron , Ying K. Shum , Ury Priel , Jayasimha S. Prasad , Mark S. Ebel
IPC分类号： H01L21/8247 , H01L21/8246 , H01L27/112 , H01L27/115 , H01L29/788 , H01L29/792 , H01L29/78 , H01L27/02 , H01L29/04 , H01L29/06
CPC分类号： H01L29/7883
摘要： An electrically programmable and eraseable memory cell in which charge carriers are tunnelled between a floating gate and a drain region in the substrate through a thin oxide tunnel region, the borders of said tunnel region being confined to a small area well inside the borders of both the drain region and the floating gate. Dual paths are utilized to connect the tunnel region of the gate to the memory cell region of the gate.
摘要翻译：一种电可编程和可擦除的存储单元，其中电荷载体通过薄氧化物隧道区在衬底中的浮置栅极和漏极区域之间被隧穿，所述隧道区域的边界被限制在两个漏极区域和浮动栅极。使用双路径将栅极的隧道区域连接到栅极的存储单元区域。

4. 发明授权

US4780750A Electrically alterable non-volatile memory device 失效
标题翻译：电可变非易失性存储器件
公开(公告)号：US4780750A
公开(公告)日：1988-10-25
申请号：US815869
申请日：1986-01-03
申请人： Joseph G. Nolan , Michael A. Van Buskirk , Te-Long Chiu , Ying K. Shum
发明人： Joseph G. Nolan , Michael A. Van Buskirk , Te-Long Chiu , Ying K. Shum
IPC分类号： H01L21/8247 , H01L21/8246 , H01L27/10 , H01L27/112 , H01L29/788 , H01L29/792 , H01L29/78
CPC分类号： H01L29/7883
摘要： In this invention, an Electrically Alterable Non-Volatile Memory (EANOM) cell is disclosed. The EANOM ceil comprises an MOS transistor, having a source, a gate and a drain. The EANOM cell also has a two-terminal tunnel device, one end of which is connected to the gate of the MOS transistor. The other terminal being labelled "T". The tunnel device causes charges to be stored or removed from the gate of the MOS transistor. In a preferred embodiment, a four-terminal EANOM cell is disclosed. The four terminals of the EANOM cell are terminals T, S (source of the MOS transistor), D (drain of the MOS transistor) and a terminal C which is capacitively coupled to the gate of the MOS transistor. The EANOM cell can be used in a memory circuit to increase the reliability thereof. Two or more EANOM cells are connected in tandem and operate simultaneously. Catastrophic failure of one EANOM cell results in an open circuit with the other EANOM cell continuing to function.
摘要翻译：在本发明中，公开了电可变非易失性存储器（EANOM）单元。 EANOM ceil包括具有源极，栅极和漏极的MOS晶体管。 EANOM单元还具有两端隧道器件，其一端连接到MOS晶体管的栅极。另一个终端标记为“T”。隧道装置使电荷从MOS晶体管的栅极存储或去除。在优选实施例中，公开了四端子EANOM单元。 EANOM单元的四个端子是端子T，S（MOS晶体管的源极），D（MOS晶体管的漏极）和与MOS晶体管的栅极电容耦合的端子C. EANOM单元可用于存储器电路中以提高其可靠性。两个或多个EANOM单元串联连接并同时操作。一个EANOM细胞的灾难性故障导致另一个EANOM细胞继续发挥功能的开路。

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