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1. 发明申请

US20060157773A1 Non-volatile electrically alterable memory cell for storing multiple data and manufacturing thereof 审中-公开
标题翻译：用于存储多个数据及其制造的非易失性电可变存储单元
公开(公告)号：US20060157773A1
公开(公告)日：2006-07-20
申请号：US11036911
申请日：2005-01-14
申请人： Andy Yu , Ying Go
发明人： Andy Yu , Ying Go
IPC分类号： H01L29/76
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/7887 , H01L29/7923
摘要： A memory cell that includes two control gates disposed laterally between two floating gates where each floating gate is capable of holding data. The memory cell is formed by placing a first polysilicon on a substrate of semiconductor material, on which a well is placed. The control gates are preferably formed by a Damascene process, in which a first polysilicon is removed after forming two floating gates, and a second polysilicon is placed between these two floating gates. An anisotropic etching is later done on the second polysilicon to form two control gates.
摘要翻译：一种存储单元，包括两个控制门，横向设置在两个浮动栅极之间，每个浮动栅极能够保存数据。存储单元通过将第一多晶硅放置在其上放置有阱的半导体材料的衬底上而形成。控制栅极优选地通过镶嵌工艺形成，其中在形成两个浮置栅极之后去除第一多晶硅，并且在这两个浮置栅极之间放置第二多晶硅。稍后在第二多晶硅上进行各向异性蚀刻以形成两个控制栅极。

2. 发明申请

US20060081910A1 Non-volatile electrically alterable memory cell for storing multiple data and an array thereof 审中-公开
标题翻译：用于存储多个数据的非易失性电可变存储器单元及其阵列
公开(公告)号：US20060081910A1
公开(公告)日：2006-04-20
申请号：US11292922
申请日：2005-12-02
申请人： Andy Yu , Ying Go
发明人： Andy Yu , Ying Go
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/40114 , H01L29/7887
摘要： A memory cell that includes a control gate disposed laterally between two floating gates where each floating gate is capable of holding data. Each floating gate in a memory cell may be erased and programmed by applying a combination of voltages to diffusion regions, the control gate, and a well. A plurality of memory cells creates a memory string, and a memory array is formed from a plurality of memory strings arranged in rows and columns.
摘要翻译：一种存储单元，包括一个横向设置在两个浮动栅极之间的控制栅极，每个浮动栅极能够保存数据。存储器单元中的每个浮置栅极可以通过将电压组合施加到扩散区域，控制栅极和阱来被擦除和编程。多个存储器单元产生存储器串，并且存储器阵列由以行和列排列的多个存储器串形成。

3. 发明授权

US5592016A Antifuse with improved antifuse material 失效
标题翻译：具有改进的反熔丝材料的防腐剂
公开(公告)号：US5592016A
公开(公告)日：1997-01-07
申请号：US423518
申请日：1995-04-14
申请人： Ying Go , John L. McCollum , Abdelshafy A. Eltoukhy
发明人： Ying Go , John L. McCollum , Abdelshafy A. Eltoukhy
IPC分类号： H01L23/525 , H01L29/04 , H01L27/10 , H01L29/00
CPC分类号： H01L23/5252 , H01L2924/0002 , H01L2924/3011
摘要： An antifuse comprises first and second electrodes separated by an antifuse material having a thickness selected to impart a desired target programming voltage to the antifuse. The antifuse material comprises a solid material stable at temperatures below about 600.degree. C., having a defect density less than about 100 defects/cm.sup.2, a breakdown field less than about 10 megavolts/cm, a dielectric constant lower than about 4.0, a resistivity of greater than about 10.sup.4 ohm-cm. The antifuse material may comprise organic materials such as polyimides compatible with high-temperature processes including cured polyamic acids, pre-imidazed polymers, photo-sensitive polyimides, and other polimides such as pyralin, probimide, PIQ, etc. The antifuse materials of the present invention also include fluorinated polymers having very low dielectric constants, such as teflon, paralines, polyphenylquinoxaline, benzocyclobutene polymers, and perfluoropolymers.
摘要翻译：反熔丝包括由反熔丝材料隔开的第一和第二电极，其具有被选择为向反熔丝施加期望的目标编程电压的厚度。反熔丝材料包括在低于约600℃的温度下稳定的固体材料，其缺陷密度小于约100个缺陷/ cm 2，击穿场小于约10兆伏/ cm，介电常数低于约4.0，电阻率大于约104欧姆 - 厘米。反熔丝材料可以包括有机材料，例如与高温工艺相容的聚酰亚胺，包括固化的聚酰胺酸，预咪唑化聚合物，光敏聚酰亚胺和其它的聚酰亚胺，例如嘧啶，吡啶酰亚胺，PIQ等。本发明的反熔丝材料本发明还包括具有非常低的介电常数的氟化聚合物，例如聚四氟乙烯，共拉耳碱，聚苯基喹喔啉，苯并环丁烯聚合物和全氟聚合物。

4. 发明申请

US20070297246A1 NON-VOLATILE ELECTRICALLY ALTERABLE SEMICONDUCTOR MEMORY WITH CONTROL AND FLOATING GATES AND SIDE-WALL COUPLING 审中-公开
标题翻译：具有控制和浮动门和侧壁耦合的非易失性电气可更换半导体存储器
公开(公告)号：US20070297246A1
公开(公告)日：2007-12-27
申请号：US11851913
申请日：2007-09-07
申请人： Andy Yu , Ying Go
发明人： Andy Yu , Ying Go
IPC分类号： G11C16/04 , H01L29/788
CPC分类号： H01L29/7885 , H01L27/115 , H01L27/11519
摘要： In a memory cell array, each memory cell includes a control gate disposed laterally adjacent a floating gate. The memory cells in each memory column are disposed inside a single well. The control gate and the floating gate are disposed between two diffusion regions. Each memory cell may be erased and programmed by applying a combination of voltages to the diffusion regions, the control gate, and the well.
摘要翻译：在存储单元阵列中，每个存储单元包括一个横向设置在浮动栅极附近的控制栅极。每个存储器列中的存储单元设置在单个阱内。控制栅极和浮置栅极设置在两个扩散区域之间。可以通过将电压组合施加到扩散区域，控制栅极和阱来擦除和编程每个存储器单元。

5. 发明申请

US20070200163A1 NON-VOLATILE ELECTRICALLY ALTERABLE MEMORY CELL FOR STORING MULTIPLE DATA AND MANUFACTURING THEREOF 有权
标题翻译：用于存储多个数据的非易失性电气可变存储器单元及其制造
公开(公告)号：US20070200163A1
公开(公告)日：2007-08-30
申请号：US11744730
申请日：2007-05-04
申请人： Andy Yu , Ying Go
发明人： Andy Yu , Ying Go
IPC分类号： H01L29/76
CPC分类号： H01L27/11521 , H01L27/115 , H01L29/7887 , H01L29/7923
摘要： A memory cell that includes two control gates disposed laterally between two floating gates where each floating gate is capable of holding data. The memory cell is formed by placing a first polysilicon on a substrate of semiconductor material, on which a well is placed. The control gates are preferably formed by a Damascene process, in which a first polysilicon is removed after forming two floating gates, and a second polysilicon is placed between these two floating gates. An anisotropic etching is later done on the second polysilicon to form two control gates.
摘要翻译：一种存储单元，包括两个控制门，横向设置在两个浮动栅极之间，每个浮动栅极能够保存数据。存储单元通过将第一多晶硅放置在其上放置有阱的半导体材料的衬底上而形成。控制栅极优选地通过镶嵌工艺形成，其中在形成两个浮置栅极之后去除第一多晶硅，并且在这两个浮置栅极之间放置第二多晶硅。稍后在第二多晶硅上进行各向异性蚀刻以形成两个控制栅极。

6. 发明授权

US5804500A Fabrication process for raised tungsten plug antifuse 失效
标题翻译：高钨钨丝反熔丝的制造工艺
公开(公告)号：US5804500A
公开(公告)日：1998-09-08
申请号：US657971
申请日：1996-06-04
申请人： Frank W. Hawley , John L. McCollum , Ying Go , Abdelshafy Eltoukhy
发明人： Frank W. Hawley , John L. McCollum , Ying Go , Abdelshafy Eltoukhy
IPC分类号： H01L21/82 , H01L23/522 , H01L23/525 , H01L21/44
CPC分类号： H01L23/5252 , H01L23/5226 , H01L2924/0002
摘要： An antifuse comprises a lower electrode formed from a metal layer in a microcircuit. A interlayer dielectric layer is disposed over the lower electrode and has an aperture formed therein. A conductive plug, formed from a material such as tungsten, is formed in the aperture. The upper surface of the interlayer dielectric is etched back to create a raised portion of the plug. The upper edges of the plug are rounded. An antifuse layer, preferably comprising a silicon nitride, amorphous silicon, silicon nitride sandwich incorporating a thin silicon dioxide layer above or below the amorphous silicon layer or such a sandwich structure covered by a titanium nitride layer, is disposed above the plug. An upper electrode, preferably comprising a metal layer is disposed over the antifuse layer.
摘要翻译：反熔丝包括由微电路中的金属层形成的下电极。层间电介质层设置在下电极上并且具有形成在其中的孔。在孔中形成由诸如钨的材料形成的导电插塞。蚀刻层间电介质的上表面以形成插头的凸起部分。插头的上边缘是圆形的。优选地，包括氮化硅，非晶硅，在非晶硅层上方或下方包含薄二氧化硅层的氮化硅夹层或由氮化钛层覆盖的夹层结构的反熔丝层。优选地包括金属层的上电极设置在反熔丝层上。

7. 发明申请

US20080074924A1 NON-VOLATILE ELECTRICALLY ALTERABLE MEMORY CELLS FOR STORING MULTIPLE DATA 审中-公开
标题翻译：用于存储多个数据的非易失性电气可变存储器单元
公开(公告)号：US20080074924A1
公开(公告)日：2008-03-27
申请号：US11946686
申请日：2007-11-28
申请人： Andy Yu , Ying Go
发明人： Andy Yu , Ying Go
IPC分类号： G11C11/34
CPC分类号： H01L27/11521 , G11C16/0408 , H01L27/115 , H01L27/11524 , H01L29/40114 , H01L29/7887
摘要： A memory cell that includes a control gate disposed laterally between two floating gates where each floating gate is capable of holding data. Each floating gate in a memory cell may be erased and programmed by applying a combination of voltages to diffusion regions, the control gate, and a well. A plurality of memory cells creates a memory string, and a memory array is formed from a plurality of memory strings arranged in rows and columns.
摘要翻译：一种存储单元，包括一个横向设置在两个浮动栅极之间的控制栅极，每个浮动栅极能够保存数据。存储器单元中的每个浮置栅极可以通过将电压组合施加到扩散区域，控制栅极和阱来被擦除和编程。多个存储器单元产生存储器串，并且存储器阵列由以行和列排列的多个存储器串形成。

8. 发明申请

US20060131640A1 Memory array of non-volatile electrically alterable memory cells for storing multiple data 有权
标题翻译：用于存储多个数据的非易失性电可变存储器单元的存储器阵列
公开(公告)号：US20060131640A1
公开(公告)日：2006-06-22
申请号：US11348556
申请日：2006-02-06
申请人： Andy Yu , Ying Go
发明人： Andy Yu , Ying Go
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , G11C16/0408 , H01L21/28273 , H01L27/115 , H01L27/11524 , H01L29/7887
摘要： A memory cell that includes a control gate disposed laterally between two floating gates where each floating gate is capable of holding data. Each floating gate in a memory cell may be erased and programmed by applying a combination of voltages to diffusion regions, the control gate, and a well. A plurality of memory cells creates a memory string, and a memory array is formed from a plurality of memory strings arranged in rows and columns.
摘要翻译：一种存储单元，包括一个横向设置在两个浮动栅极之间的控制栅极，每个浮动栅极能够保存数据。存储器单元中的每个浮置栅极可以通过将电压组合施加到扩散区域，控制栅极和阱来被擦除和编程。多个存储器单元产生存储器串，并且存储器阵列由以行和列排列的多个存储器串形成。

9. 发明申请

US20060113585A1 Non-volatile electrically alterable memory cells for storing multiple data 审中-公开
标题翻译：用于存储多个数据的非易失性电可变存储器单元
公开(公告)号：US20060113585A1
公开(公告)日：2006-06-01
申请号：US11330887
申请日：2006-01-12
申请人： Andy Yu , Ying Go
发明人： Andy Yu , Ying Go
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , G11C16/0408 , H01L27/115 , H01L27/11524 , H01L29/40114 , H01L29/7887
摘要： A memory cell that includes a control gate disposed laterally between two floating gates where each floating gate is capable of holding data. Each floating gate in a memory cell may be erased and programmed by applying a combination of voltages to diffusion regions, the control gate, and a well. A plurality of memory cells creates a memory string, and a memory array is formed from a plurality of memory strings arranged in rows and columns.
摘要翻译：一种存储单元，包括一个横向设置在两个浮动栅极之间的控制栅极，每个浮动栅极能够保存数据。存储器单元中的每个浮置栅极可以通过将电压组合施加到扩散区域，控制栅极和阱来被擦除和编程。多个存储器单元产生存储器串，并且存储器阵列由以行和列排列的多个存储器串形成。

10. 发明授权

US06437365B1 Raised tungsten plug antifuse and fabrication processes 有权
标题翻译：提升钨丝塞反熔丝及制造工艺
公开(公告)号：US06437365B1
公开(公告)日：2002-08-20
申请号：US09669035
申请日：2000-09-25
申请人： Frank W. Hawley , John L. McCollum , Ying Go , Abdelshafy Eltoukhy
发明人： Frank W. Hawley , John L. McCollum , Ying Go , Abdelshafy Eltoukhy
IPC分类号： H01L2904
CPC分类号： H01L23/5252 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： An antifuse comprises a lower electrode formed from a metal layer in a microcircuit. A interlayer dielectric layer is disposed over the lower electrode and has an aperture formed therein. A conductive plug, formed from a material such as tungsten, is formed in the aperture. The upper surface of the interlayer dielectric is etched back to create a raised portion of the plug. The upper edges of the plug are rounded. An antifuse layer, preferably comprising a silicon nitride, amorphous silicon, silicon nitride sandwich incorporating a thin silicon dioxide layer above or below the amorphous silicon layer or such a sandwich structure covered by a titanium nitride layer, is disposed above the plug. An upper electrode, preferably comprising a metal layer is disposed over the antifuse layer.
摘要翻译：反熔丝包括由微电路中的金属层形成的下电极。层间电介质层设置在下电极上并且具有形成在其中的孔。在孔中形成由诸如钨的材料形成的导电插塞。蚀刻层间电介质的上表面以形成插头的凸起部分。插头的上边缘是圆形的。优选地，包括氮化硅，非晶硅，在非晶硅层上方或下方包含薄二氧化硅层的氮化硅夹层或由氮化钛层覆盖的夹层结构的反熔丝层。优选地包括金属层的上电极设置在反熔丝层上。

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