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1. 发明授权

US08206508B2 Wet surface treatment by usage of a liquid bath containing energy limited bubbles 失效
标题翻译：通过使用含有能量限制气泡的液体浴进行湿表面处理
公开(公告)号：US08206508B2
公开(公告)日：2012-06-26
申请号：US12027724
申请日：2008-02-07
申请人： Yehiel Gotkis
发明人： Yehiel Gotkis
IPC分类号： B08B3/00
CPC分类号： B08B3/102 , H01L21/02057
摘要： A method controllably and sustainably creates an upwardly directed gradient of dropping temperatures in a wet treatment tank between a cooled and face down workpiece (e.g., an in-process semiconductor wafer) and a lower down heat source. A thermal fluid upwell containing thermally collapsible bubbles is then directed from the heat source to the face down workpiece. In one class of embodiments, bubble collapse energy release and/or bubble collapse locations are controlled so as to avoid exposing delicate features of the to-be-treated surface to damaging forces. In one class of embodiments the wet treatment includes ultra-cleaning of the work face. Cleaning fluids that are essentially free of predefined contaminates are upwelled to the to-be-cleaned surface and potentially contaminated after-flows are convectively directed away from the workpiece so as to prevent recontamination of the workpiece.
摘要翻译：方法可控地和可持续地产生在冷处理槽中的向上倾斜的温度梯度，所述湿处理槽在冷却和向下工件（例如，在工艺中的半导体晶片）和较低的下热源之间。然后将含有热可收缩气泡的热流体上部井从热源引导到工件的正面。在一类实施例中，控制气泡塌陷能量释放和/或气泡塌陷位置，以避免将被处理表面的微妙特征暴露于破坏力。在一类实施例中，湿处理包括工作面的超清洁。基本上没有预定污染物的清洁液体被上浮到待清洁的表面，并且可能被污染的后流动物被对流地远离工件，以防止工件的再污染。

2. 发明授权

US07581875B2 Method and apparatus for thin metal film thickness measurement 有权
标题翻译：薄金属薄膜厚度测量方法和设备
公开(公告)号：US07581875B2
公开(公告)日：2009-09-01
申请号：US11713233
申请日：2007-02-28
申请人： Yehiel Gotkis , Mikhail Korolik
发明人： Yehiel Gotkis , Mikhail Korolik
IPC分类号： G01N25/00 , G01K1/00
CPC分类号： G01B21/085
摘要： A method for measuring a metal film thickness is provided. The method initiates with heating a region of interest of a metal film with a defined amount of heat energy. Then, a temperature of the metal film is measured. Next, a thickness of the metal film is calculated based upon the temperature and the defined amount of heat energy. A chemical mechanical planarization system capable of detecting a thin metal film through the detection of heat transfer dynamics is also provided.
摘要翻译：提供了一种用于测量金属膜厚度的方法。该方法通过以限定量的热能加热金属膜的感兴趣区域来开始。然后，测量金属膜的温度。接下来，基于温度和限定的热能量计算金属膜的厚度。还提供了能够通过检测传热动力学来检测薄金属膜的化学机械平面化系统。

3. 发明申请

US20090114837A1 Dynamic pattern generator with cup-shaped structure 有权
标题翻译：具有杯形结构的动态图案发生器
公开(公告)号：US20090114837A1
公开(公告)日：2009-05-07
申请号：US11983069
申请日：2007-11-07
申请人： LUCA GRELLA , LEONID BARANOV , YEHIEL GOTKIS
发明人： LUCA GRELLA , LEONID BARANOV , YEHIEL GOTKIS
IPC分类号： G21K1/02
CPC分类号： H01J37/3174 , B82Y10/00 , B82Y40/00 , H01J2237/0435 , H01J2237/0453
摘要： One embodiment relates to a dynamic pattern generator for reflection electron beam lithography which includes conductive pixel pads, an insulative border surrounding each conductive pixel pad so as to electrically isolate the conductive pixel pads from each other, and conductive elements coupled to the conductive pixel pads for controllably applying voltages to the conductive pixel pads. The conductive pixel pads are advantageously cup shaped with a bottom portion, a sidewall portion, and an open cavity. Another embodiment relates to a pattern generating apparatus which includes a well structure with sidewalls and a cavity configured above each conductive pixel pad. The sidewalls may include alternating layers of conductive and insulative materials. Other embodiments, aspects and feature are also disclosed.
摘要翻译：一个实施例涉及用于反射电子束光刻的动态图案发生器，其包括导电像素焊盘，围绕每个导电像素焊盘的绝缘，以将导电像素焊盘彼此电隔离，以及耦合到导电像素焊盘的导电元件，可控制地将电压施加到导电像素焊盘。导电像素焊盘有利地为杯形，其具有底部，侧壁部分和开放空腔。另一个实施例涉及一种图案生成装置，其包括具有侧壁的阱结构和在每个导电像素垫之上配置的空腔。侧壁可以包括交替的导电和绝缘材料层。还公开了其它实施例，方面和特征。

4. 发明授权

US07309618B2 Method and apparatus for real time metal film thickness measurement 有权
标题翻译：用于实时金属膜厚度测量的方法和装置
公开(公告)号：US07309618B2
公开(公告)日：2007-12-18
申请号：US10463525
申请日：2003-06-18
申请人： Yehiel Gotkis , Rodney Kistler , Aleksander Owczarz , David Hemker , Nicolas J. Bright
发明人： Yehiel Gotkis , Rodney Kistler , Aleksander Owczarz , David Hemker , Nicolas J. Bright
IPC分类号： H01L21/00
CPC分类号： B24B37/013 , B24B1/005 , B24B49/105 , B24B57/02 , H01L21/67253
摘要： A semiconductor processing system is provided. The semiconductor processing system includes a first sensor configured to isolate and measure a film thickness signal portion for a wafer having a film disposed over a substrate. A second sensor is configured to detect a film thickness dependent signal in situ during processing, i.e. under real process conditions and in real time. A controller configured to receive a signal from the first sensor and a signal from the second sensor. The controller is capable of determining a calibration coefficient from data represented by the signal from the first sensor. The controller is capable of applying the calibration coefficient to the data associated with the second sensor, wherein the calibration coefficient substantially eliminates inaccuracies introduced to the film thickness dependent signal from the substrate. A method for calibrating an eddy current sensor is also provided.
摘要翻译：提供半导体处理系统。半导体处理系统包括：第一传感器，被配置为隔离和测量具有设置在基板上的膜的晶片的膜厚度信号部分。第二传感器被配置为在处理期间，即在实际工艺条件下和实时地在原位检测膜厚依赖信号。控制器，被配置为从第一传感器接收信号和来自第二传感器的信号。控制器能够根据来自第一传感器的信号表示的数据确定校准系数。控制器能够将校准系数应用于与第二传感器相关联的数据，其中校准系数基本上消除了从衬底引入与膜厚度相关的信号的不准确性。还提供了用于校准涡流传感器的方法。

5. 发明申请

US20060043596A1 Semiconductor structure implementing sacrificial material and methods for making and implementing the same 有权
标题翻译：实施牺牲材料的半导体结构及其制造和实施方法
公开(公告)号：US20060043596A1
公开(公告)日：2006-03-02
申请号：US11259561
申请日：2005-10-25
申请人： Yehiel Gotkis , David Wei , Rodney Kistler
发明人： Yehiel Gotkis , David Wei , Rodney Kistler
IPC分类号： H01L23/52
CPC分类号： H01L23/5222 , H01L21/7682 , H01L23/53228 , H01L23/5329 , H01L2221/1047 , H01L2924/0002 , H01L2924/00
摘要： A method for making a semiconductor device is provided. The method includes forming transistor structures on a substrate and forming interconnect metallization structures in a plurality of levels through depositing a sacrificial layer. A dual damascene process is performed to etch trenches and vias, and filling and planarizing the trenches and vias. The sacrificial layer is etched throughout the plurality of levels of the interconnect metallization structures, thus leaving a voided interconnect metallization structure. The voided interconnect metallization structure is filled with low K dielectric material, thus defining a low K dielectric interconnect metallization structure.
摘要翻译：提供一种制造半导体器件的方法。该方法包括在衬底上形成晶体管结构，并通过沉积牺牲层来形成多层次的互连金属化结构。执行双镶嵌工艺以蚀刻沟槽和通孔，以及填充和平坦化沟槽和通孔。牺牲层在互连金属化结构的多个层次上被蚀刻，从而留下空隙的互连金属化结构。空隙互连金属化结构填充有低K电介质材料，因此限定了低K电介质互连金属化结构。

6. 发明申请

US20050211667A1 Method and apparatus for measurement of thin films and residues on semiconductor substrates 审中-公开
标题翻译：用于测量半导体衬底上的薄膜和残留物的方法和装置
公开(公告)号：US20050211667A1
公开(公告)日：2005-09-29
申请号：US10810209
申请日：2004-03-26
申请人： Yehiel Gotkis
发明人： Yehiel Gotkis
IPC分类号： G01N21/55 , G01N21/95 , G01L21/30 , H01B13/00
CPC分类号： G01N21/55 , G01N21/9501 , G01N21/9503
摘要： A method of sensing properties of materials on a substrate is provided. The method includes scanning along a path defined over a surface of a substrate that can have a film. The substrate is configured to spin when present. The method includes sensing properties of the film at a plurality of points along the path and generating a map of the film using information from the plurality of points along the path. An apparatus for sensing properties of materials on a substrate is also provided.
摘要翻译：提供了一种感测基板上材料性质的方法。该方法包括沿着可以具有膜的衬底的表面上限定的路径进行扫描。衬底配置为当存在时旋转。该方法包括在沿着路径的多个点处感测胶片的属性，并使用来自沿着路径的多个点的信息生成胶片的地图。还提供了用于感测基板上的材料的性质的装置。

7. 发明授权

US06935938B1 Multiple-conditioning member device for chemical mechanical planarization conditioning 有权
标题翻译：用于化学机械平面化调理的多调节构件装置
公开(公告)号：US06935938B1
公开(公告)日：2005-08-30
申请号：US10816444
申请日：2004-03-31
申请人： Yehiel Gotkis , Robert Charatan
发明人： Yehiel Gotkis , Robert Charatan
IPC分类号： B24B21/04 , B24B37/04 , B24B53/007 , B24B21/18
CPC分类号： B24B53/017 , B24B21/04
摘要： A multiple-conditioning member device for chemical mechanical planarization conditioning is described. The multiple conditioning members may be used in a chemical mechanical planarization apparatus which further includes a movably mounted polishing member, a wafer holder, and a slurry dispenser. The multiple conditioning members may be independently movable with respect to one another and configured to contact the polishing member. Specifically, a conditioning member may be independently movable with respect to another conditioning member based on x-axis control, y-axis control, z-axis control, alignment, speed of rotation, direction of rotation, amount of pressure of conditioning member on polishing member.
摘要翻译：描述了用于化学机械平面化调节的多重调节构件装置。多个调理构件可以用在化学机械平面化装置中，其还包括可移动安装的抛光构件，晶片保持器和浆料分配器。多个调节构件可以相对于彼此独立地移动并且构造成接触抛光构件。具体地说，调节构件可以基于x轴控制，y轴控制，z轴控制，对准，旋转速度，旋转方向，调节构件在抛光时的压力量独立地相对于另一个调节构件移动会员。

8. 发明申请

US20050066739A1 Method and apparatus for wafer mechanical stress monitoring and wafer thermal stress monitoring 审中-公开
标题翻译：用于晶片机械应力监测和晶片热应力监测的方法和装置
公开(公告)号：US20050066739A1
公开(公告)日：2005-03-31
申请号：US10671978
申请日：2003-09-26
申请人： Yehiel Gotkis , Rodney Kistler , Aleksander Owczarz , David Hemker , Nicolas Bright
发明人： Yehiel Gotkis , Rodney Kistler , Aleksander Owczarz , David Hemker , Nicolas Bright
IPC分类号： B24B37/04 , B24B49/14 , B24B49/16 , G01L1/00
CPC分类号： B24B37/015 , B24B49/16
摘要： A chemical mechanical planarization (CMP) system is provided. The CMP system includes a wafer carrier configured to support a wafer during a planarization process, the wafer carrier including a sensor configured to detect a signal indicating a stress being experienced by the wafer during planarization. A computing device in communication with the sensor is included. The computing device is configured to translate the signal to generate a stress map for analysis. A stress relief device responsive to a signal received from the computing device is included. The stress relief device is configured to relieve the stress being experienced by the wafer.
摘要翻译：提供化学机械平面化（CMP）系统。 CMP系统包括被配置为在平坦化处理期间支撑晶片的晶片载体，晶片载体包括被配置成在平坦化期间检测指示由晶片经历的应力的信号的传感器。包括与传感器通信的计算设备。计算设备被配置为平移信号以产生用于分析的应力图。包括响应于从计算设备接收的信号的应力消除装置。应力释放装置被构造成减轻晶片经历的应力。

9. 发明授权

US06869337B2 System and method for polishing and planarizing semiconductor wafers using reduced surface area polishing pads and variable partial pad-wafer overlapping techniques 失效
标题翻译：使用减小的表面积抛光垫和可变部分焊盘 - 晶片重叠技术来研磨和平坦化半导体晶片的系统和方法
公开(公告)号：US06869337B2
公开(公告)日：2005-03-22
申请号：US10770599
申请日：2004-02-03
申请人： John M. Boyd , Yehiel Gotkis , Rod Kistler
发明人： John M. Boyd , Yehiel Gotkis , Rod Kistler
IPC分类号： B24B37/04 , B24B37/26 , B24B49/04 , B24B51/00 , B24B53/007 , B24B53/017 , H01L21/304 , B24B1/00
CPC分类号： B24B53/017 , B24B37/042 , B24B37/26 , B24B49/04 , B24B51/00
摘要： A system and method for polishing semiconductor wafers includes a variable partial pad-wafer overlap polisher having a reduced surface area, fixed-abrasive polishing pad and a polisher having a non-abrasive polishing pad for use with an abrasive slurry. The method includes first polishing a wafer with the variable partial pad-wafer overlap polisher and the fixed-abrasive polishing pad and then polishing the wafer in a dispersed-abrasive process until a desired wafer thickness is achieved.
摘要翻译：用于抛光半导体晶片的系统和方法包括具有减小的表面积的可变部分焊盘 - 晶片重叠抛光机，固定研磨抛光垫和具有用于磨料浆料的非磨料抛光垫的抛光机。该方法包括首先用可变部分焊盘 - 晶片重叠抛光机和固定磨料抛光垫抛光晶片，然后以分散研磨工艺抛光晶片，直到达到所需的晶片厚度。

10. 发明申请

US20050007107A1 Complementary sensors metrological process and method and apparatus for implementing the same 失效
标题翻译：互补传感器计量过程及其实现方法和装置
公开(公告)号：US20050007107A1
公开(公告)日：2005-01-13
申请号：US10914017
申请日：2004-08-05
申请人： Yehiel Gotkis , Rodney Kistler , Aleksander Owczarz , David Hemker , Nicolas Bright
发明人： Yehiel Gotkis , Rodney Kistler , Aleksander Owczarz , David Hemker , Nicolas Bright
IPC分类号： H01L21/66 , G01B7/06
CPC分类号： H01L22/26
摘要： A method for detecting a thickness of a layer of a wafer to be processed is provided. The method includes defining a plurality of sensors configured to create a set of complementary sensors proximate the wafer. Further included in the method is distributing the plurality of sensors along a particular radius of the wafer such that each sensor of the plurality of sensors is out of phase with an adjacent sensor by a same angle. The method also includes measuring signals generated by the plurality of sensors. Further included is averaging the signals generated by the plurality of sensors so as to generate a combination signal. The averaging is configured to remove noise from the combination signal such that the combination signal is capable of being correlated to identify the thickness of the layer.
摘要翻译：提供了一种用于检测待处理晶片层的厚度的方法。该方法包括限定配置成在晶片附近产生一组互补传感器的多个传感器。该方法中还包括沿着晶片的特定半径分布多个传感器，使得多个传感器中的每个传感器与相邻的传感器相异相同角度。该方法还包括测量由多个传感器产生的信号。还包括对由多个传感器产生的信号进行平均以产生组合信号。平均化被配置为从组合信号去除噪声，使得组合信号能够被相关联以识别层的厚度。

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