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1. 发明授权

US07353077B2 Methods for optimizing die placement 有权
标题翻译：优化模具放置的方法
公开(公告)号：US07353077B2
公开(公告)日：2008-04-01
申请号：US11222374
申请日：2005-09-08
申请人： Chih-Wei Lin , Hong-Hsing Chou , Yeh-Jye Wang , Chen-Fu Chien , Jen-Hsin Wang , Chih-Wei Hsiao
发明人： Chih-Wei Lin , Hong-Hsing Chou , Yeh-Jye Wang , Chen-Fu Chien , Jen-Hsin Wang , Chih-Wei Hsiao
IPC分类号： G06F19/00
CPC分类号： G03F7/70433 , H01L22/20 , H01L2924/0002 , H01L2924/00
摘要： A method of optimizing die placement on a wafer having an alignment mark with a computing system includes arranging a plurality of fields on the wafer in a first position. Dummies are inserted between at least one arranged field and the alignment mark and inserted adjacent to the wafer edge. The total number of dies manufacturable on the wafer at the first position is determined. The wafer position is shifted to a second position relative to the position of the plurality of fields, and the total number of dies manufacturable on the wafer at the second position is determined. The total number of manufacturable dies from each of the first and the second positions is compared, and the positions having the higher number of manufacturable die are candidates of optimal die placement position. Then the total number of fields, the total number of dummies, and the total number of shared dummies are evaluated to decide the optimal die placement position.
摘要翻译：在具有计算系统的对准标记的晶片上优化管芯放置的方法包括在第一位置上在晶片上布置多个场。傻瓜插入在至少一个布置的场和对准标记之间并且相邻于晶片边缘插入。确定在第一位置在晶片上可制造的模具的总数。晶片位置相对于多个场的位置移动到第二位置，并且确定在第二位置处在晶片上可制造的模具的总数。比较了从第一和第二位置中的每一个的可制造模具的总数，并且具有较高数量的可制造模具的位置是最佳模具放置位置的候选者。然后评估总场数，虚拟人总数以及共享虚拟人总数，以确定最佳管桩位置。

2. 发明申请

US20070027567A1 Methods for optimizing die placement 有权
标题翻译：优化模具放置的方法
公开(公告)号：US20070027567A1
公开(公告)日：2007-02-01
申请号：US11222374
申请日：2005-09-08
申请人： Chih-Wei Lin , Hong-Hsing Chou , Yeh-Jye Wang , Chen-Fu Chien , Jen-Hsin Wang , Chih-Wei Hsiao
发明人： Chih-Wei Lin , Hong-Hsing Chou , Yeh-Jye Wang , Chen-Fu Chien , Jen-Hsin Wang , Chih-Wei Hsiao
IPC分类号： G06F19/00 , G06F17/50
CPC分类号： G03F7/70433 , H01L22/20 , H01L2924/0002 , H01L2924/00
摘要： A method of optimizing die placement on a wafer having an alignment mark with a computing system includes arranging a plurality of fields on the wafer in a first position. Dummies are inserted between at least one arranged field and the alignment mark and inserted adjacent to the wafer edge. The total number of dies manufacturable on the wafer at the first position is determined. The wafer position is shifted to a second position relative to the position of the plurality of fields, and the total number of dies manufacturable on the wafer at the second position is determined. The total number of manufacturable dies from each of the first and the second positions is compared, and the positions having the higher number of manufacturable die are candidates of optimal die placement position. Then the total number of fields, the total number of dummies, and the total number of shared dummies are evaluated to decide the optimal die placement position.
摘要翻译：在具有计算系统的对准标记的晶片上优化管芯放置的方法包括在第一位置上在晶片上布置多个场。傻瓜插入在至少一个布置的场和对准标记之间并且相邻于晶片边缘插入。确定在第一位置在晶片上可制造的模具的总数。晶片位置相对于多个场的位置移动到第二位置，并且确定在第二位置处在晶片上可制造的模具的总数。比较了从第一和第二位置中的每一个的可制造模具的总数，并且具有较高数量的可制造模具的位置是最佳模具放置位置的候选者。然后评估总场数，虚拟人总数以及共享虚拟人总数，以确定最佳管桩位置。

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