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1. 发明授权

US5818789A Device and method for memory access 失效
标题翻译：存储器访问的设备和方法
公开(公告)号：US5818789A
公开(公告)日：1998-10-06
申请号：US541808
申请日：1995-10-10
申请人： Wu Chi Yung , Kuo Chen Yu
发明人： Wu Chi Yung , Kuo Chen Yu
IPC分类号： G11C5/06 , G11C7/10 , G11C8/00 , G11C17/00
CPC分类号： G11C5/066 , G11C7/1018 , G11C8/00
摘要： The present invention is related to an interface circuit for transmitting data corresponding to a specific address from/to a decoding memory unit, includes a bit-selection circuit pre-set therein a transmission mode, and a processing circuit electrically connected to the bit-selection circuit for transmitting the data according to the transmission mode. The present invention also relates to methods for reading out and writing in data corresponding to a specific address from/to a decoding memory unit.
摘要翻译：本发明涉及一种用于从解码存储单元发送对应于特定地址的数据的接口电路，包括在其中预先设定了传输模式的比特选择电路，以及电连接到比特选择的处理电路根据传输模式发送数据的电路。本发明还涉及用于从与解码存储单元对应的特定地址读出数据的方法。

2. 发明授权

US5777919A Select gate enhanced high density read-only-memory device 失效
标题翻译：选择门增强型高密度只读存储器件
公开(公告)号：US5777919A
公开(公告)日：1998-07-07
申请号：US713741
申请日：1996-09-13
申请人： Wu Chi-Yung , Ling Chen , Tony Peng
发明人： Wu Chi-Yung , Ling Chen , Tony Peng
IPC分类号： G11C7/18 , G11C17/12 , H01L27/115 , G11C17/00
CPC分类号： H01L27/115 , G11C17/126 , G11C7/18
摘要： The present invention is related to an enhanced high density Read-Only-Memory (ROM) device with select gate. A thin oxide layer is deposited on the ROM cell matrix and it is extended to the select lines which is on the top and bottom side of the ROM cell matrix to form the select gate. The ROM cell matrix can be organized more flexible by using the buried layers to pick out the unwanted gates. The metal contact can be directly made in this extended region too. Thereafter it reduces the manufacturing cost and achieves a high speed and density and simple process device.
摘要翻译：本发明涉及具有选择门的增强型高密度只读存储器（ROM）器件。在ROM单元矩阵上沉积薄的氧化物层，并将其延伸到位于ROM单元矩阵的顶部和底部的选择线以形成选择栅极。通过使用埋层挑出不想要的栅极，ROM单元矩阵可以更灵活地组织起来。金属接触可以直接在这个扩展区域制造。此后，它降低了制造成本，并实现了高速度和密度以及简单的工艺装置。

3. 发明授权

US5895480A Method of and means for accessing an address by respectively substracting base addresses of memory integrated circuits from an access address 失效
标题翻译：通过分别从存取地址减去存储器集成电路的基址来访问地址的方法和装置
公开(公告)号：US5895480A
公开(公告)日：1999-04-20
申请号：US541600
申请日：1995-10-10
申请人： Wu Chi Yung , Kuo Cheng Yu
发明人： Wu Chi Yung , Kuo Cheng Yu
IPC分类号： G06F12/06
CPC分类号： G06F12/0661 , G11C8/12
摘要： The present invention provides a method for accessing a memory device and a memory accessing device. The method includes a) providing the memory device having a plurality of memory sub-spaces respectively having a plurality of address ranges; b) respectively assigning a plurality of base addresses to the plurality of memory sub-spaces; c) inputting an access address; d) respectively operating the base addresses with the access address to obtain a plurality of operated results; and e) accessing one of the memory sub-spaces if a specific one of the operated results falls within one of the address ranges corresponding to the one memory sub-space. The memory accessing device includes an access address end, a data access end, an access selection end, a memory device having a plurality of memory sub-spaces, and a plurality of access devices respectively electrically connected to the memory sub-spaces, and each of which includes a base address storing device for storing therein a base address, an operating and comparing device for operating the access address with the base address to obtain an operated result and generating a data access enabling signal when the operated result falls within an address range, and a data buffer for accessing the respective memory sub-space in response to the data access enabling signal and the access selection signal.
摘要翻译：本发明提供一种用于存取存储设备和存储器访问设备的方法。该方法包括：a）提供具有分别具有多个地址范围的多个存储器子空间的存储器件; b）分别向多个存储器子空间分配多个基地址; c）输入访问地址; d）分别操作具有访问地址的基地址以获得多个操作结果; 以及e）如果所述操作结果中的特定一个落在与所述一个存储器子空间相对应的地址范围之一内，则访问所述存储器子空间中的一个。存储器访问设备包括访问地址端，数据访问端，访问选择端，具有多个存储器子空间的存储设备和分别电连接到存储器子空间的多个访问设备，以及每个其中包括用于在其中存储基地址的基地址存储装置，用于将访问地址与基地址进行操作以获得操作结果的操作和比较装置，并且当操作结果落在地址范围内时产生数据访问使能信号以及用于响应于数据访问使能信号和访问选择信号而访问相应存储器子空间的数据缓冲器。

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