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1. 发明申请

US20080311485A1 Photomasks Used to Fabricate Integrated Circuitry, Finished-Construction Binary Photomasks Used to Fabricate Integrated Circuitry, Methods of Forming Photomasks, and Methods of Photolithographically Patterning Substrates 审中-公开
标题翻译：用于制造集成电路的光掩模，用于制造集成电路的成品二次光掩模，形成光掩模的方法和光刻图案基板的方法
公开(公告)号：US20080311485A1
公开(公告)日：2008-12-18
申请号：US11761549
申请日：2007-06-12
申请人： William Stanton , Fei Wang
发明人： William Stanton , Fei Wang
IPC分类号： G03F7/20 , G03F1/00
CPC分类号： G03F1/58 , G03F1/32 , G03F1/48
摘要： A finished-construction binary photomask used to fabricated integrated circuitry includes a substrate having a device region and a non-device region. The device region has a transparent substrate having a pair of spaced adjacent binary features formed thereover. The spaced adjacent binary features have an opaque material and a phase-shifting material. The phase-shifting material is received between the transparent substrate and the opaque material. Sidewalls of the spaced adjacent binary features may include a coating layer. Other embodiments, including methods, are contemplated.
摘要翻译：用于制造集成电路的完成构造二进制光掩模包括具有器件区域和非器件区域的衬底。器件区域具有透明衬底，其具有在其上形成的一对间隔开的相邻二进制特征。间隔的相邻二进制特征具有不透明材料和相移材料。相移材料被接收在透明基板和不透明材料之间。间隔的相邻二进制特征的侧壁可以包括涂层。考虑了其他实施例，包括方法。

2. 发明申请

US20080043214A1 OPTIMIZED OPTICAL LITHOGRAPHY ILLUMINATION SOURCE FOR USE DURING THE MANUFACTURE OF A SEMICONDUCTOR DEVICE 有权
标题翻译：在半导体器件制造期间使用的优化光学光刻照明源
公开(公告)号：US20080043214A1
公开(公告)日：2008-02-21
申请号：US11858419
申请日：2007-09-20
申请人： Jeffrey Mackey , William Stanton
发明人： Jeffrey Mackey , William Stanton
IPC分类号： G03B27/72 , G03B27/54
CPC分类号： G03F7/70158 , G03F7/701
摘要： A method and structure for optimizing an optical lithography illumination source may include a shaped diffractive optical element (DOE) interposed between the illuminator and a lens during the exposure of a photoresist layer over a semiconductor wafer. The DOE may, in some instances, increase depth of focus, improve the normalized image log-slope, and improve pattern fidelity. The DOE is customized for the particular pattern to be exposed. Description and depiction of a specific DOE for a specific pattern is provided. Additionally, a pupilgram having a particular pattern, and methods for providing a light output which forms the pupilgram, are disclosed.
摘要翻译：用于优化光学光刻照明源的方法和结构可以包括在半导体晶片上的光致抗蚀剂层的曝光期间插入在照明器和透镜之间的成形衍射光学元件（DOE）。在某些情况下，DOE可以增加焦点深度，提高标准化图像对数斜率，并提高图案保真度。 DOE根据要暴露的特定图案进行定制。提供了特定模式的特定DOE的描述和描述。此外，公开了具有特定图案的光瞳图，以及提供形成瞳孔图的光输出的方法。

3. 发明申请

US20070178711A1 Semiconductor constructions, methods of patterning photoresist, and methods of forming semiconductor constructions 有权
标题翻译：半导体结构，图案化光刻胶的方法以及形成半导体结构的方法
公开(公告)号：US20070178711A1
公开(公告)日：2007-08-02
申请号：US11341201
申请日：2006-01-27
申请人： Lucien Bissey , William Stanton
发明人： Lucien Bissey , William Stanton
IPC分类号： H01L21/31
CPC分类号： G03F7/0035 , H01L21/31144 , H01L21/312 , H01L21/76897
摘要： The invention includes semiconductor constructions containing optically saturable absorption layers. An optically saturable absorption layer can be between photoresist and a topography, with the topography having two or more surfaces of differing reflectivity relative to one another. The invention also includes methods of patterning photoresist in which a saturable absorption layer is provided between the photoresist and a topography with surfaces of differing reflectivity, and in which the differences in reflectivity are utilized to enhance the accuracy with which an image is photolithographically formed in the photoresist.
摘要翻译：本发明包括含光学可饱和吸收层的半导体结构。光可饱和吸收层可以在光致抗蚀剂和形貌之间，其中形貌具有两个或更多个相对于彼此具有不同反射率的表面。本发明还包括图案化光刻胶的方法，其中在光致抗蚀剂和具有不同反射率的表面之间设置饱和吸收层的光刻胶，并且其中反射率的差异被用于增强图像在光刻胶中形成的精度光刻胶。

4. 发明申请

US20060158633A1 Optimized optical lithography illumination source for use during the manufacture of a semiconductor device 有权
标题翻译：在制造半导体器件期间使用的优化的光学光刻照明源
公开(公告)号：US20060158633A1
公开(公告)日：2006-07-20
申请号：US11038673
申请日：2005-01-19
申请人： Jeffrey Mackey , William Stanton
发明人： Jeffrey Mackey , William Stanton
IPC分类号： G03B27/54
CPC分类号： G03F7/70158 , G03F7/701
摘要： A method and structure for optimizing an optical lithography illumination source comprises a shaped diffractive optical element (DOE) interposed between the illuminator and a lens during the exposure of a photoresist layer over a semiconductor wafer. The DOE may, in some instances, increase depth of focus, improve the normalized image log-slope, and improve pattern fidelity. The DOE is customized for the particular pattern to be exposed. Description and depiction of a specific DOE for a specific pattern is provided. Additionally, a pupilgram having a particular pattern, and methods for providing a light output which forms the pupilgram, are disclosed.
摘要翻译：用于优化光学光刻照明源的方法和结构包括在半导体晶片上的光致抗蚀剂层曝光期间插入在照明器和透镜之间的成形衍射光学元件（DOE）。在某些情况下，DOE可以增加焦点深度，提高标准化图像对数斜率，并提高图案保真度。 DOE根据要暴露的特定图案进行定制。提供了特定模式的特定DOE的描述和描述。此外，公开了具有特定图案的光瞳图，以及提供形成瞳孔图的光输出的方法。

5. 发明申请

US20050195379A1 Optimized optical lithography illumination source for use during the manufacture of a semiconductor device 失效
标题翻译：在制造半导体器件期间使用的优化的光学光刻照明源
公开(公告)号：US20050195379A1
公开(公告)日：2005-09-08
申请号：US10794339
申请日：2004-03-05
申请人： William Stanton , Jeffrey Mackey
发明人： William Stanton , Jeffrey Mackey
IPC分类号： G03B27/54 , G03F7/20
CPC分类号： G03F7/70091 , G03F7/701 , G03F7/70108 , G03F7/70158
摘要： A method and structure for optimizing an optical lithography illumination source comprises a shaped diffractive optical element (DOE) interposed between the illuminator and a lens during the exposure of a photoresist layer over a semiconductor wafer. The DOE may, in some instances, increase depth of focus, improve the normalized image log-slope, and improve pattern fidelity. The DOE is customized for the particular pattern to be exposed. Descriptions and depictions of specific DOE's are provided. Additionally, a pupilgram having a particular pattern, and methods for forming the pupilgram, are discussed.
摘要翻译：用于优化光学光刻照明源的方法和结构包括在半导体晶片上的光致抗蚀剂层曝光期间插入在照明器和透镜之间的成形衍射光学元件（DOE）。在某些情况下，DOE可以增加焦点深度，提高标准化图像对数斜率，并提高图案保真度。 DOE根据要暴露的特定图案进行定制。提供具体DOE的描述和描述。另外，讨论了具有特定图案的光瞳图，以及用于形成瞳孔图的方法。

6. 发明授权

US06844118B2 Method and layout for high density reticle 失效
标题翻译：高密度掩模版的方法和布局
公开(公告)号：US06844118B2
公开(公告)日：2005-01-18
申请号：US10175832
申请日：2002-06-21
申请人： William Stanton
发明人： William Stanton
IPC分类号： G03F1/00 , G03F1/14 , G03F9/00 , G03C5/00
CPC分类号： G03F1/32 , G03F1/36
摘要： A method for making a reticle for use in a photolithography process is disclosed. The method includes forming at least two printable features and at least one sub-resolution connecting structure within the same layer of a reticle substrate, where the sub-resolution connecting structure connects at least two of the printable reticle features. The reticles themselves formed according to such methods as well as photolithographic processes using such a reticle are also disclosed. The reticle may be a binary mask, a phase shift mask, or an attenuated phase shift mask.
摘要翻译：公开了一种用于制造光刻工艺中使用的掩模版的方法。该方法包括在掩模版基板的相同层内形成至少两个可打印特征和至少一个子分辨率连接结构，其中子分辨率连接结构连接可打印的标线片特征中的至少两个。还公开了根据这样的方法形成的标线本身以及使用这种掩模版的光刻工艺。掩模版可以是二进制掩模，相移掩模或衰减相移掩模。

7. 发明申请

US20050008950A1 Methods of forming patterned reticles 有权
公开(公告)号：US20050008950A1
公开(公告)日：2005-01-13
申请号：US10912030
申请日：2004-08-04
申请人： H. Dulman , William Stanton , John Futrell
发明人： H. Dulman , William Stanton , John Futrell
IPC分类号： G03C5/00 , G03F1/00 , G03F1/36 , G03F9/00 , G06F17/50
CPC分类号： G03F1/36
摘要： The invention includes methods of forming patterned reticles. Design features can be introduced into a layout for a reticle prior to optical proximity correction, and then removed prior to taping a pattern onto the reticle. Design features can alternatively, or additionally, be introduced after optical proximity correction and asymmetrically relative to one or more parts of a reticle pattern. The introduced features can subsequently be taped to the reticle as part of the formation of the patterned reticle.

8. 发明授权

US06376130B1 Chromeless alternating reticle for producing semiconductor device features 失效
标题翻译：用于生产半导体器件特征的无色交替掩模版
公开(公告)号：US06376130B1
公开(公告)日：2002-04-23
申请号：US09510359
申请日：2000-02-22
申请人： William Stanton
发明人： William Stanton
IPC分类号： G03F900
CPC分类号： G03F1/34
摘要： An alternating phase shift reticle for a capacitor layout scheme for a memory device and a method for its fabrication is disclosed. The alternating phase shift mask has regions of 0 and 180 degree phase shifts arranged in a way such that all sides of each region corresponding to a given phase shift value are bounded by areas corresponding to an opposite phase shift value. The reticle can be used to produce densely packed capacitor features, in which the variance between the actual exposure pattern and the desired exposure pattern is reduced.
摘要翻译：公开了一种用于存储器件的电容器布局方案的交替相移掩模版及其制造方法。交变相移掩模具有0和180度相移的区域，其方式使得对应于给定相移值的每个区域的所有侧面由对应于相反相移值的区域界定。掩模版可用于产生紧密堆叠的电容器特征，其中实际曝光图案和期望曝光图案之间的差异减小。

9. 发明授权

US06319644B2 Methods of reducing proximity effects in lithographic processes 有权
公开(公告)号：US06319644B2
公开(公告)日：2001-11-20
申请号：US09780407
申请日：2001-02-12
申请人： Christophe Pierrat , James E. Burdorf , William Baggenstoss , William Stanton
发明人： Christophe Pierrat , James E. Burdorf , William Baggenstoss , William Stanton
IPC分类号： G03F900
CPC分类号： G03F1/36 , G03F7/70441
摘要： Methods of reducing proximity effects in lithographic processes wherein an integrated circuitry pattern is transferred from a mask onto a semiconductor substrate are described. In one embodiment, a desired spacing is defined between a main feature which is to reside on a mask and which is to be transferred onto the substrate, and an adjacent proximity effects-correcting feature. After the spacing definition, the dimensions of the main feature are adjusted relative to the proximity effects-correcting feature to achieve a desired transferred main feature dimension. In another embodiment, a desired spacing is defined between a main feature having an edge and an adjacent sub-resolution feature. The edge of the main feature is moved relative to the sub-resolution feature to achieve a desired transferred main feature dimension.

10. 发明授权

US5818137A Integrated magnetic levitation and rotation system 失效
公开(公告)号：US5818137A
公开(公告)日：1998-10-06
申请号：US548692
申请日：1995-10-26
申请人： Stephen B. Nichols , Shankar Jagannathan , Kevin Leary , David Eisenhaure , William Stanton , Richard Hockney , James Downer , Vijay Gondhalekar
发明人： Stephen B. Nichols , Shankar Jagannathan , Kevin Leary , David Eisenhaure , William Stanton , Richard Hockney , James Downer , Vijay Gondhalekar
IPC分类号： H02K17/08 , F16C39/06 , H01L21/687 , H02K7/09 , H02K17/12 , H02K17/30 , H02K19/10 , H02K21/38
CPC分类号： H01L21/68792 , F16C32/0448 , F16C32/047 , F16C32/0493 , H02K21/44 , H02K7/09 , H02K17/12
摘要： A rotary motor and a rotary magnetic bearing are integrated in a compact assembly that is contact-less. A stator assembly surrounds a ferromagnetic rotor with an annular air gap which can accommodate a cylindrical wall, e.g. of a chamber for semiconductor wafer processing. The stator assembly has a permanent magnet or magnets sandwiched between vertically spaced magnetic stator plates with plural pole segments. The rotor is preferably a ring of a magnetic stainless steel with complementary pole teeth. The stator assembly (i) levitates and passively centers the rotor along a vertical axis and against tilt about either horizontal axis, (ii) provides a radial position bias for the rotor, and (iii) establishes a motor flux field at the rotor poles. Polyphase coils wound on the stator plates produce a rotating flux field that drives the rotor as a synchronous homopolar motor. A rotor without pole teeth allows operation with an asynchronous inductive drive. A controller energizes control coils wound on each stator pole segment in response to a sensed physical position of the rotor. The control coils provide active radial position control and can actively damp tip and tilt oscillations that may overcome the passive centering.

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