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1. 发明授权

US07274231B1 Low jitter frequency synthesizer 有权
标题翻译：低抖动频率合成器
公开(公告)号：US07274231B1
公开(公告)日：2007-09-25
申请号：US11229472
申请日：2005-09-15
申请人： Timothy Gillespie , William G. Baker
发明人： Timothy Gillespie , William G. Baker
IPC分类号： H03L7/06
CPC分类号： H03L7/06
摘要： A frequency synthesizer IC is disclosed that includes a variable delay circuit, a fractional-N phase locked loop circuit, and a feedback loop. The variable delay circuit is electrically coupled to the input of the fractional-N phase locked loop circuit. The feedback loop couples a first control signal from the fractional-N phase locked loop to the variable delay circuit. The variable delay circuit generates a reference signal that has a phase delay that varies in accordance with a second control signal and a first control signal. The fractional-N phase locked loop circuit is operable upon receiving the reference signal to generate the first control signal, the second control signal, and an output signal having a frequency that is a non-integer product of the reference signal.
摘要翻译：公开了一种频率合成器IC，其包括可变延迟电路，分数N锁相环电路和反馈回路。可变延迟电路电耦合到分数N锁相环电路的输入端。反馈回路将来自分数N锁相环的第一控制信号耦合到可变延迟电路。可变延迟电路产生具有根据第二控制信号和第一控制信号而变化的相位延迟的参考信号。分数N锁相环电路在接收到参考信号以产生第一控制信号，第二控制信号和具有作为参考信号的非整数乘积的频率的输出信号时可操作。

2. 发明授权

US06353336B1 Electrical ID method for output driver 有权
标题翻译：输出驱动器的电气ID方法
公开(公告)号：US06353336B1
公开(公告)日：2002-03-05
申请号：US09534663
申请日：2000-03-24
申请人： David R. Lindley , William G. Baker , Jeffery Scott Hunt
发明人： David R. Lindley , William G. Baker , Jeffery Scott Hunt
IPC分类号： H03K190175
CPC分类号： G06F11/006
摘要： An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate a first output signal in response to one or more first input signals. The second circuit may be configured to generate a second output signal in response to one or more second input signals. The first and second output signals may be presented to a bond pad.
摘要翻译：一种包括第一电路和第二电路的装置。第一电路可以被配置为响应于一个或多个第一输入信号而产生第一输出信号。第二电路可以被配置为响应于一个或多个第二输入信号而产生第二输出信号。第一和第二输出信号可以被呈现给接合焊盘。

3. 发明授权

US06246263B1 MOS output driver, and circuit and method of controlling same 有权
标题翻译： MOS输出驱动器，电路及其控制方法
公开(公告)号：US06246263B1
公开(公告)日：2001-06-12
申请号：US09451958
申请日：1999-11-30
申请人： William G. Baker
发明人： William G. Baker
IPC分类号： H03K190175
CPC分类号： H03K19/01721
摘要： A circuit and method for providing a fast transitioning output buffer that may be configured to operate using either a 3 volt or 5 volt supply voltage. The pullup behaves similarly to a MOS diode, but the circuit lowers the gate voltage on a pullup while the output is being pulled up. The circuit does not affect the final pullup voltage. As a result, a single PMOS device may be used as a pullup device that does not generally require an increased size to support a high operating voltage.
摘要翻译：一种用于提供快速转换输出缓冲器的电路和方法，其可被配置为使用3伏或5伏电源电压进行操作。上拉电路的作用与MOS二极管类似，但是当输出被拉高时，该电路会在上拉电路中降低栅极电压。该电路不影响最终的上拉电压。结果，单个PMOS器件可以用作上拉器件，其通常不需要增加的尺寸来支持高工作电压。

4. 发明授权

US6066963A MOS output driver, and circuit and method of controlling same 失效
公开(公告)号：US6066963A
公开(公告)日：2000-05-23
申请号：US939196
申请日：1997-09-29
申请人： William G. Baker
发明人： William G. Baker
IPC分类号： H03K19/017 , H03K19/0175
CPC分类号： H03K19/01721
摘要： A circuit and method for providing a fast transitioning output buffer that may be configured to operate using either a 3 volt or 5 volt supply voltage. The pullup behaves similarly to a MOS diode, but the circuit lowers the gate voltage on a pullup while the output is being pulled up. The circuit does not affect the final pullup voltage. As a result, a single PMOS device may be used as a pullup device that does not generally require an increased size to support a high operating voltage.

5. 发明授权

US06243303B1 Method and circuitry for writing data 有权
标题翻译：用于写入数据的方法和电路
公开(公告)号：US06243303B1
公开(公告)日：2001-06-05
申请号：US09626986
申请日：2000-07-27
申请人： Sanjay K. Sancheti , George M. Ansel , William G. Baker , James E. Kelly
发明人： Sanjay K. Sancheti , George M. Ansel , William G. Baker , James E. Kelly
IPC分类号： G11C11407
CPC分类号： G11C7/1078
摘要： A method of generating write control signals insensitive to glitches on a data input signal comprising the steps of (A) enabling a write of a first or second value in response to a data input transition, (B) holding in a ready state until the data input is stable and (C) writing stable data into a memory array.
摘要翻译：一种产生对数据输入信号上的毛刺不敏感的写入控制信号的方法，包括以下步骤：（A）响应于数据输入转换使第一或第二值写入，（B）保持就绪状态直到数据输入稳定，（C）将稳定数据写入存储器阵列。

6. 发明授权

US6101134A Method and circuitry for writing data 有权
标题翻译：用于写入数据的方法和电路
公开(公告)号：US6101134A
公开(公告)日：2000-08-08
申请号：US344514
申请日：1999-06-25
申请人： Sanjay K. Sancheti , George M. Ansel , William G. Baker , James E. Kelly
发明人： Sanjay K. Sancheti , George M. Ansel , William G. Baker , James E. Kelly
IPC分类号： G11C7/10 , G11C11/407
CPC分类号： G11C7/1078
摘要： An apparatus comprising a first circuit, a reset circuit and an output circuit. The first circuit may be configured to generate one or more state signals in response to (i) a first and a second write control signals and (ii) one or more control signals. The reset circuit may be configured to generate the one or more control signals in response to (i) a global write signal and (ii) the first and second state signals. The output circuit may be configured to generate a third and fourth write control signal in response to (i) the global write signal (ii) a data input signal and (iii) the first and second state signals. In one example, the third and fourth write control signals may generate a pulse on either the third or the fourth write control signals in response to a transition of the data input signal.
摘要翻译：一种包括第一电路，复位电路和输出电路的装置。第一电路可以被配置为响应于（i）第一和第二写控制信号和（ii）一个或多个控制信号而产生一个或多个状态信号。复位电路可以被配置为响应于（i）全局写信号和（ii）第一和第二状态信号而产生一个或多个控制信号。输出电路可以被配置为响应于（i）全局写入信号（ii）数据输入信号和（iii）第一和第二状态信号而产生第三和第四写入控制信号。在一个示例中，响应于数据输入信号的转变，第三和第四写入控制信号可以在第三或第四写入控制信号上产生脉冲。

7. 发明授权

US4187001A View expanding apparatus 失效
标题翻译：查看扩展设备
公开(公告)号：US4187001A
公开(公告)日：1980-02-05
申请号：US848833
申请日：1977-11-07
申请人： Robert F. Redwitz , William G. Baker
发明人： Robert F. Redwitz , William G. Baker
IPC分类号： B60R1/10 , G02B27/02 , G02B17/00
CPC分类号： B60R1/10 , G02B27/02 , Y10T16/522
摘要： A view expanding apparatus mounted on the inside lower right hand corner of an automobile windshield for eliminating the blind spot in the rear view of a motorist. A mirror is pivotally coupled to a negative lens, which may be a Fresnel lens, and the mirror lens construction is secured to the inside of the windshield. The negative lens expands the field of view and the angle between the lens and the mirror is adjustable so that the mirror reflects the expanded field of view for observation by the driver.
摘要翻译：一种安装在汽车挡风玻璃的右下角的视图扩展装置，用于消除驾驶者后视图中的盲点。镜子可枢转地联接到负透镜，该透镜可以是菲涅尔透镜，并且镜透镜结构固定在挡风玻璃的内部。负透镜扩大视野，并且透镜和反射镜之间的角度是可调节的，使得反射镜反映扩大的视场以供驾驶员观察。

8. 发明授权

US5793238A RC delay with feedback 失效
标题翻译： RC延迟与反馈
公开(公告)号：US5793238A
公开(公告)日：1998-08-11
申请号：US743005
申请日：1996-11-01
申请人： William G. Baker
发明人： William G. Baker
IPC分类号： H03K5/13
CPC分类号： H03K5/133
摘要： The present invention concerns a delay circuit that provides a fixed amount of delay that is generally independent of process variations. An input resistance is provided that may be presented to a threshold device, such as an inverter, that may then be presented as an output. The output of the threshold device may also be presented through a feedback path comprising a capacitive device to the input of the threshold device. The feedback through the capacitive load actively resists the movement of the load. As a result, the delay provided by the circuit is generally resistant to process variations.
摘要翻译：本发明涉及延迟电路，其提供通常与过程变化无关的固定量的延迟。提供了可以呈现给阈值装置（例如逆变器）的输入电阻，其然后可以被呈现为输出。阈值装置的输出也可以通过包括电容性装置的反馈路径呈现给阈值装置的输入端。通过电容性负载的反馈主动抵抗负载的移动。结果，由电路提供的延迟通常抵抗工艺变化。

9. 发明授权

US4615363A Filling and weighing machine 失效
标题翻译：灌装称重机
公开(公告)号：US4615363A
公开(公告)日：1986-10-07
申请号：US676057
申请日：1984-11-29
申请人： William G. Baker
发明人： William G. Baker
IPC分类号： G01G13/00 , B65B1/06 , G01G13/34
CPC分类号： G01G13/34
摘要： An apparatus for dispensing predetermined weights of material into containers. The apparatus includes a pair of pivotable support members, a feeding chute, and two flexible lines. In operation, when one of the containers is filled, the feeding chute is pivotably directed to another container.
摘要翻译：用于将预定重量的材料分配到容器中的装置。该装置包括一对可枢转的支撑构件，馈送滑槽和两条柔性线。在操作中，当其中一个容器被填充时，供料槽可枢转地定向到另一个容器。

10. 发明授权

US06426653B1 MOS output driver, and circuit and method of controlling same 有权
标题翻译： MOS输出驱动器，电路及其控制方法
公开(公告)号：US06426653B1
公开(公告)日：2002-07-30
申请号：US09867132
申请日：2001-05-29
申请人： William G. Baker
发明人： William G. Baker
IPC分类号： H03K190175
CPC分类号： H03K19/01721
摘要： A circuit and method for providing a fast transitioning output buffer that may be configured to operate using either a 3 volt or 5 volt supply voltage. The pullup behaves similarly to a MOS diode, but the circuit lowers the gate voltage on a pullup while the output is being pulled up. The circuit does not affect the final pullup voltage. As a result, a single PMOS device may be used as a pullup device that does not generally require an increased size to support a high operating voltage.
摘要翻译：一种用于提供快速转换输出缓冲器的电路和方法，其可被配置为使用3伏或5伏电源电压进行操作。上拉电路的作用与MOS二极管类似，但是当输出被拉高时，该电路会在上拉电路中降低栅极电压。该电路不影响最终的上拉电压。结果，单个PMOS器件可以用作上拉器件，其通常不需要增加的尺寸来支持高工作电压。

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