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2. 发明授权

US5721857A Method and apparatus for saving the effective address of floating point memory operations in an out-of-order microprocessor 失效
标题翻译：用于将浮点存储器操作的有效地址保存在无序微处理器中的方法和装置
公开(公告)号：US5721857A
公开(公告)日：1998-02-24
申请号：US651506
申请日：1996-05-22
申请人： Andrew F. Glew , Jeffrey M. Abramson , Kris G. Konigsfeld , Atiq Bajwa , Warren R. Morrow , William C. Alexander, III
发明人： Andrew F. Glew , Jeffrey M. Abramson , Kris G. Konigsfeld , Atiq Bajwa , Warren R. Morrow , William C. Alexander, III
IPC分类号： G06F9/38 , G06F9/26 , G06F12/00 , G06F12/10
CPC分类号： G06F9/3861 , G06F9/3834
摘要： A method is provided for recovering the effective address of memory instructions in an out-of-order microprocessor for use by an exception handler upon the occurrence of one of an exception and a systems management interrupt. The microprocessor comprises at least one execution unit for executing a plurality of instructions out-of-order and a re-order buffer having storage locations for buffering result data produced from the execution of the plurality of instructions. Each instruction is associated with a location designator to identify a unique storage location within the re-order buffer in which the result data for an executed instruction is written. The microprocessor further comprises a memory order buffer having storage locations for buffering memory instructions waiting for access to memory for execution, these storage locations also being identified by corresponding location designators. According to this embodiment of the microprocessor, the effective address of memory instructions can be reconstructed by utilizing the location designators of the ROB (Reorder Buffer) to find the corresponding storage location in the MOB (Memory Order Buffer) at which place the linear address for the instruction may be found. By associating both the retirement and exception information of the memory instructions stored within the storage locations of the re-order buffer with the corresponding memory instructions and information stored within the memory order buffer, the linear address of either the youngest, valid, retiring memory uop or the oldest, valid, excepted memory uop can be selected, written to memory and subsequently used to reconstruct the effective address of the memory instruction for use by an exception handler.
摘要翻译：提供了一种用于在异常处理器发生异常和系统管理中断之一时由异常处理器恢复无序微处理器中的存储器指令的有效地址的方法。微处理器包括用于执行无序的多个指令的至少一个执行单元和具有用于缓冲从多个指令的执行产生的结果数据的存储位置的重新排序缓冲器。每个指令与位置指示符相关联，以识别在其中写入执行指令的结果数据的重新排序缓冲器内的唯一存储位置。微处理器还包括具有用于缓冲等待存储器进行执行的存储器指令的存储位置的存储器顺序缓冲器，这些存储位置也由对应的位置指示符标识。根据微处理器的这个实施例，存储器指令的有效地址可以通过使用ROB（重排序缓冲器）的位置指示符来重建，以在MOB（存储器顺序缓冲器）中找到相应的存储位置，可能会发现该指令。通过将存储在重新排序缓冲器的存储位置中的存储器指令的退出和异常信息与存储在存储器顺序缓冲器中的相应存储器指令和信息相关联，最小的，有效的退出存储器存储器的线性地址或者可以选择最旧的，有效的，例外的存储器，写入存储器，随后用于重建由异常处理程序使用的存储器指令的有效地址。

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