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    • 1. 发明授权
      US5474956A Method of fabricating metallized substrates using an organic etch block layer 失效
    • Method of fabricating metallized substrates using an organic etch block layer
    • 使用有机蚀刻阻挡层制造金属化基板的方法
    • US5474956A
    • 1995-12-12
    • US403610
    • 1995-03-14
    • Philip A. Trask , Vincent A. Pillai
    • Philip A. Trask , Vincent A. Pillai
    • C23F1/02 , H01L21/3213 , H01L21/48 , H01L23/538 , H05K3/00 , H05K3/06 , H05K3/28 , H01L21/268 , H01L21/312
    • C23F1/02 , H01L21/32139 , H01L21/4846 , H01L23/538 , H05K3/061 , H05K3/28 , H01L2924/0002 , H05K2201/0195 , H05K2203/0571 , H05K2203/0597 , H05K3/0032 , H05K3/064 , Y10S148/043
    • A method of patterning a metallized substrate using a thin partially cured etch block layer. In accordance with the method, a substrate is provided and a layer of metal, such as aluminum, is deposited on the substrate. A thin layer of organic dielectric material, such as polyimide, is deposited over the layer of metal. The thin layer of organic dielectric material is deposited to a thickness on the order one micron, for example, which is thin enough to have etch resistance when acting as an etch block layer for subsequent wet etch patterning of the layer of metal, and thick enough to have no pinhole defects. The deposited thin organic dielectric layer is then partially cured. The underlying layer of metal is then patterned and wet etched using the partially cured thin organic dielectric material as the blocking layer. An additional thick layer of organic dielectric material is then deposited or coated over the patterned layer of metal and partially cured organic dielectric layer. The partially cured organic dielectric layer and the additional thick organic dielectric material are then simultaneously full cured. Upon curing, the partially cured organic dielectric layer conforms to the etched underlying layer of metal.
    • 使用薄的部分固化的蚀刻阻挡层图案化金属化衬底的方法。 根据该方法，提供衬底，并且在衬底上沉积诸如铝的金属层。 诸如聚酰亚胺的有机介电材料的薄层沉积在金属层上。 有机电介质材料的薄层被沉积到一微米级的厚度上，例如，当作为用于金属层的后续湿法蚀刻图案的蚀刻阻挡层时足够薄以具有耐蚀刻性，并且足够厚 没有针孔缺陷。 然后将沉积的薄有机介电层部分固化。 然后使用部分固化的有机介电材料作为阻挡层对金属底层进行图案化和湿蚀刻。 然后，在图案化的金属层和部分固化的有机介电层上沉积或涂覆另外厚的有机介电材料层。 然后将部分固化的有机介电层和附加的有机介电材料同时完全固化。 固化后，部分固化的有机介电层符合蚀刻的金属底层。
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
    • 4. 发明授权
      US5840622A Phase mask laser fabrication of fine pattern electronic interconnect structures 失效
    • Phase mask laser fabrication of fine pattern electronic interconnect structures
    • US5840622A
    • 1998-11-24
    • US703854
    • 1996-08-27
    • Robert S. Miles , Philip A. Trask , Vincent A. Pillai
    • Robert S. Miles , Philip A. Trask , Vincent A. Pillai
    • G03F7/20 , G03F1/00 , H01L21/027 , H01L21/033 , H01L21/302 , H01L21/3065 , H01L21/3213 , H01L21/768 , H01L21/28
    • H01L21/76894 , H01L21/0338 , H01L21/32139 , H01L21/76885 , Y10S438/949
    • Phase mask laser machining procedures for fabricating high density fine pattern feature electrical interconnection structures. Conductor patterns are fabricated using a phase mask laser patterned dielectric layer as a conductor wet etch masking layer, or by subtractively removing metal using holographic phase mask laser micromachining. In accordance with the present invention, a substrate is provided, a first layer of dielectric material is formed on the substrate, a metal layer is formed on the first layer of dielectric material, and a second layer of dielectric material is then formed on the metal layer. A phase mask is disposed above the second layer of dielectric material that has a predefined phase pattern therein defining a metal conductor pattern that corresponds to an interconnect structure. The second layer of dielectric material is then processed using the phase mask to form the interconnect structure. In a first procedure, the second layer of dielectric material is irradiated through the phase mask using laser energy to remove portions of the second layer of dielectric material and expose the metal layer to define the metal conductor pattern and to provide a dielectric etch mask. Then, the exposed metal layer is wet etched using the dielectric etch mask to form the interconnect structure. A second procedure provides for irradiating the second layer of dielectric material with laser energy through the phase mask to remove portions of the second layer of dielectric material to define a metal conductor pattern. Then, a second metal layer is electrolessly plated, or chemical vapor deposited, in the metal conductor pattern on the exposed surface of the second layer of dielectric material to form the interconnect structure. In a third procedure, the first layer of dielectric material is formed on the substrate, the metal layer is formed thereon, and the phase mask is disposed above the metal layer. The conductor pattern is then directly etched in the metal layer using a laser and the phase mask.
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
    • 5. 发明授权
      US5827775A Phase mask laser fabrication of fine pattern electronic interconnect structures 失效
    • Phase mask laser fabrication of fine pattern electronic interconnect structures
    • US5827775A
    • 1998-10-27
    • US968378
    • 1997-11-12
    • Robert S. Miles , Philip A. Trask , Vincent A. Pillai
    • Robert S. Miles , Philip A. Trask , Vincent A. Pillai
    • G03F7/20 , G03F1/00 , H01L21/027 , H01L21/033 , H01L21/302 , H01L21/3065 , H01L21/3213 , H01L21/768 , H01L21/28
    • H01L21/76894 , H01L21/0338 , H01L21/32139 , H01L21/76885 , Y10S438/949
    • Phase mask laser machining procedures for fabricating high density fine pattern feature electrical interconnection structures. Conductor patterns are fabricated using a phase mask laser patterned dielectric layer as a conductor wet etch masking layer, or by subtractively removing metal using holographic phase mask laser micromachining. In accordance with the present invention, a substrate is provided, a first layer of dielectric material is formed on the substrate, a metal layer is formed on the first layer of dielectric material, and a second layer of dielectric material is then formed on the metal layer. A phase mask is disposed above the second layer of dielectric material that has a predefined phase pattern therein defining a metal conductor pattern that corresponds to an interconnect structure. The second layer of dielectric material is then processed using the phase mask to form the interconnect structure. In a first procedure, the second layer of dielectric material is irradiated through the phase mask using laser energy to remove portions of the second layer of dielectric material and expose the metal layer to define the metal conductor pattern and to provide a dielectric etch mask. Then, the exposed metal layer is wet etched using the dielectric etch mask to form the interconnect structure. A second procedure provides for irradiating the second layer of dielectric material with laser energy through the phase mask to remove portions of the second layer of dielectric material to define a metal conductor pattern. Then, a second metal layer is electrolessly plated, or chemical vapor deposited, in the metal conductor pattern on the exposed surface of the second layer of dielectric material to form the interconnect structure. In a third procedure, the first layer of dielectric material is formed on the substrate, the metal layer is formed thereon, and the phase mask is disposed above the metal layer. The conductor pattern is then directly etched in the metal layer using a laser and the phase mask.
    • 基本信息 添加关注 加入工作空间 PDF全文 PDF下载 全文下载 相似专利 双屏查看 权利要求书 说明书全文 Global Dossier Espacenet 法律信息 同族专利 专利引用
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