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1. 发明申请

US20110278590A1 Semiconductor Devices Having Gates Including Oxidized Nickel and Related Methods of Fabricating the Same 有权
标题翻译：具有包含氧化镍的门的半导体器件及其制造方法
公开(公告)号：US20110278590A1
公开(公告)日：2011-11-17
申请号：US12778334
申请日：2010-05-12
申请人： Van Mieczkowski , Helmut Hagleitner , Kevin Haberern
发明人： Van Mieczkowski , Helmut Hagleitner , Kevin Haberern
IPC分类号： H01L29/778 , H01L29/80 , H01L21/335 , H01L21/338 , H01L29/24 , H01L29/20
CPC分类号： H01L29/66068 , H01L29/1608 , H01L29/2003 , H01L29/47 , H01L29/475 , H01L29/66871 , H01L29/7786 , H01L29/812 , H01L29/872
摘要： Schottky barrier semiconductor devices are provided including a wide bandgap semiconductor layer and a gate on the wide bandgap semiconductor layer. The gate includes a metal layer on the wide bandgap semiconductor layer including a nickel oxide (NiO) layer. Related methods of fabricating devices are also provided herein.
摘要翻译：提供肖特基势垒半导体器件，其包括宽带隙半导体层和宽带隙半导体层上的栅极。栅极包括在包括氧化镍（NiO）层的宽带隙半导体层上的金属层。本文还提供了相关制造装置的方法。

2. 发明申请

US20110227089A1 MULTILAYER DIFFUSION BARRIERS FOR WIDE BANDGAP SCHOTTKY BARRIER DEVICES 有权
标题翻译：用于宽带贴片屏障设备的多层扩展障碍
公开(公告)号：US20110227089A1
公开(公告)日：2011-09-22
申请号：US12725812
申请日：2010-03-17
申请人： Van Mieczkowski , Helmut Hagleitner , Zoltan Ring
发明人： Van Mieczkowski , Helmut Hagleitner , Zoltan Ring
IPC分类号： H01L27/095
CPC分类号： H01L29/475 , H01L29/2003 , H01L29/42316 , H01L29/7787
摘要： Semiconductor Schottky barrier devices include a wide bandgap semiconductor layer, a Schottky barrier metal layer on the wide bandgap semiconductor layer and forming a Schottky junction, a current spreading layer on the Schottky barrier metal layer remote from the wide bandgap semiconductor layer and two or more diffusion barrier layers between the current spreading layer and the Schottky barrier metal layer. The first diffusion barrier layer reduces mixing of the current spreading layer and the second diffusion barrier layer at temperatures of the Schottky junction above about 300° C. and the second diffusion barrier layer reduces mixing of the first diffusion barrier layer and the Schottky barrier metal layer at the temperatures of the Schottky junction above about 300° C.
摘要翻译：半导体肖特基势垒器件包括宽带隙半导体层，宽带隙半导体层上的肖特基势垒金属层和形成肖特基结，在远离宽带隙半导体层的肖特基势垒金属层上的电流扩散层和两个或更多个扩散电流扩散层和肖特基势垒金属层之间的阻挡层。第一扩散阻挡层在约300℃以上的肖特基结温度下降低了电流扩散层和第二扩散阻挡层的混合，第二扩散阻挡层减少了第一扩散阻挡层和肖特基势垒金属层的混合在高于约300℃的肖特基结的温度下

3. 发明授权

US08570140B2 Thin film resistor 有权
标题翻译：薄膜电阻
公开(公告)号：US08570140B2
公开(公告)日：2013-10-29
申请号：US13153041
申请日：2011-06-03
申请人： Van Mieczkowski , Jason Gurganus
发明人： Van Mieczkowski , Jason Gurganus
IPC分类号： H01C1/012
CPC分类号： H01C1/02 , H01C1/034 , H01C7/006 , H01C17/075
摘要： The present disclosure relates to a thin film resistor that is formed on a substrate along with other semiconductor devices to form all or part of an electronic circuit. The thin film resistor includes a resistor segment that is formed over the substrate and a protective cap that is formed over the resistor segment. The protective cap is provided to keep at least a portion of the resistor segment from oxidizing during fabrication of the thin film resistor and other components that are provided on the semiconductor substrate. As such, no oxide layer is formed between the resistor segment and the protective cap. Contacts for the thin film resistor may be provided at various locations on the protective cap, and as such, are not provided solely over a portion of the resistor segment that is covered with an oxide layer.
摘要翻译：本公开涉及一种薄膜电阻器，其与其它半导体器件一起形成在衬底上以形成电子电路的全部或部分。薄膜电阻器包括形成在衬底上的电阻器段和形成在电阻器段上的保护帽。提供保护盖以在薄膜电阻器和设置在半导体衬底上的其它部件的制造期间保持电阻器段的至少一部分不被氧化。因此，在电阻器段和保护帽之间不形成氧化物层。可以在保护盖上的各个位置设置用于薄膜电阻器的触点，因此，不仅仅在覆盖有氧化物层的电阻器段的一部分上提供。

4. 发明申请

US20130256841A1 VIA PLUGS 有权
标题翻译：威盛系列
公开(公告)号：US20130256841A1
公开(公告)日：2013-10-03
申请号：US13431583
申请日：2012-03-27
申请人： Van Mieczkowski , Helmut Hagleitner , William T. Pulz
发明人： Van Mieczkowski , Helmut Hagleitner , William T. Pulz
IPC分类号： H01L23/48 , H01L21/768
CPC分类号： H01L23/481 , H01L24/05 , H01L24/29 , H01L24/32 , H01L2224/04026 , H01L2224/05644 , H01L2224/05655 , H01L2224/05666 , H01L2224/05669 , H01L2224/05671 , H01L2224/05684 , H01L2224/29144 , H01L2924/0132 , H01L2924/10158 , H01L2924/10253 , H01L2924/10272 , H01L2924/10329 , H01L2924/1033 , H01L2924/13064 , H01L2924/00 , H01L2924/0105 , H01L2924/01079 , H01L2924/01032 , H01L2924/01014
摘要： The present disclosure relates to providing via plugs in vias of a semiconductor material. The via plugs may be formed of a polymer, such as a polyimide, that can withstand subsequent soldering and operating temperatures. The via plugs effectively fill the vias to prevent the vias from being filled substantially with solder during a subsequent soldering processes.
摘要翻译：本公开涉及在半导体材料的通孔中提供通孔塞。通孔插塞可以由可以承受随后的焊接和操作温度的聚合物（例如聚酰亚胺）形成。通孔塞有效地填充通孔，以防止在随后的焊接过程中通孔基本上被焊料填充。

5. 发明申请

US20120115319A1 CONTACT PAD 有权
标题翻译：接触垫
公开(公告)号：US20120115319A1
公开(公告)日：2012-05-10
申请号：US12943517
申请日：2010-11-10
申请人： Van Mieczkowski , Zoltan Ring , Jason Gurganus , Helmut Hagleitner
发明人： Van Mieczkowski , Zoltan Ring , Jason Gurganus , Helmut Hagleitner
IPC分类号： H01L21/329
CPC分类号： H01L24/03 , H01L24/05 , H01L24/48 , H01L2224/02166 , H01L2224/04026 , H01L2224/04042 , H01L2224/05124 , H01L2224/05155 , H01L2224/05166 , H01L2224/05169 , H01L2224/05624 , H01L2224/05644 , H01L2224/05647 , H01L2224/05687 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01023 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01059 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/04941 , H01L2924/10272 , H01L2924/10329 , H01L2924/1033 , H01L2924/12032 , H01L2924/1301 , H01L2924/1306 , H01L2224/45099 , H01L2924/00
摘要： The present disclosure relates to forming multi-layered contact pads for a semiconductor device, wherein the various layers of the contact pad are formed using one or more thin-film deposition processes, such as an evaporation process. Each contact pad includes an adhesion layer, which is formed over the device structure for the semiconductor device; a titanium nitride (TiN) barrier layer, which is formed over the adhesion layer; and an overlay layer, which is formed over the barrier layer. At least the titanium nitride (TiN) barrier layer is formed using an evaporation process.
摘要翻译：本公开涉及形成用于半导体器件的多层接触焊盘，其中使用一个或多个薄膜沉积工艺（诸如蒸发工艺）形成接触焊盘的各个层。每个接触焊盘包括形成在用于半导体器件的器件结构上的粘合层; 在粘合层上形成的氮化钛（TiN）阻挡层; 以及覆盖层，其形成在阻挡层上。至少使用蒸镀法形成氮化钛（TiN）阻挡层。

6. 发明申请

US20090250716A1 LIGHT EMITTING DEVICES HAVING ROUGHENED/REFLECTIVE CONTACTS AND METHODS OF FABRICATING SAME 有权
标题翻译：具有粗糙/反射性接触的发光装置及其制造方法
公开(公告)号：US20090250716A1
公开(公告)日：2009-10-08
申请号：US12476519
申请日：2009-06-02
申请人： Kevin Haberern , Michael John Bergmann , Van Mieczkowski , David Todd Emerson
发明人： Kevin Haberern , Michael John Bergmann , Van Mieczkowski , David Todd Emerson
IPC分类号： H01L33/00 , H01L21/00
CPC分类号： H01L33/42 , H01L24/05 , H01L33/405 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/00
摘要： Light emitting devices include an active region of semiconductor material and a first contact on the active region. The first contact is configured such that photons emitted by the active region pass through the first contact. A photon absorbing wire bond pad is provided on the first contact. The wire bond pad has an area less than the area of the first contact. A reflective structure is disposed between the first contact and the wire bond pad such that the reflective structure has substantially the same area as the wire bond pad. A second contact is provided opposite the active region from the first contact. The reflective structure may be disposed only between the first contact and the wire bond pad. Methods of fabricating such devices are also provided.
摘要翻译：发光器件包括半导体材料的有源区和有源区上的第一接触。第一触点配置成使得由有源区域发射的光子通过第一触点。在第一触点上设置光子吸收引线键合焊盘。接线焊盘的面积小于第一接触面积。反射结构设置在第一触点和引线接合焊盘之间，使得反射结构具有与引线接合焊盘基本上相同的面积。与第一触点相对的有源区域提供第二触点。反射结构可以仅设置在第一触点和引线接合焊盘之间。还提供了制造这种装置的方法。

7. 发明申请

US20060022209A1 Light emitting devices having a reflective bond pad and methods of fabricating light emitting devices having reflective bond pads 有权
公开(公告)号：US20060022209A1
公开(公告)日：2006-02-02
申请号：US10899793
申请日：2004-07-27
申请人： Kevin Haberern , Michael Bergmann , Van Mieczkowski , David Emerson
发明人： Kevin Haberern , Michael Bergmann , Van Mieczkowski , David Emerson
IPC分类号： H01L33/00 , H01L21/00
CPC分类号： H01L33/42 , H01L24/05 , H01L33/405 , H01L2924/12036 , H01L2924/12041 , H01L2924/12042 , H01L2924/00
摘要： Light emitting devices include an active region of semiconductor material and a first contact on the active region. The first contact is configured such that photons emitted by the active region pass through the first contact. A photon absorbing wire bond pad is provided on the first contact. The wire bond pad has an area less than the area of the first contact. A reflective structure is disposed between the first contact and the wire bond pad such that the reflective structure has substantially the same area as the wire bond pad. A second contact is provided opposite the active region from the first contact. The reflective structure may be disposed only between the first contact and the wire bond pad. Methods of fabricating such devices are also provided.

8. 发明授权

US08907350B2 Semiconductor devices having improved adhesion and methods of fabricating the same 有权
标题翻译：具有改进的附着力的半导体器件及其制造方法
公开(公告)号：US08907350B2
公开(公告)日：2014-12-09
申请号：US12769307
申请日：2010-04-28
申请人： Van Mieczkowski , Helmut Hagleitner
发明人： Van Mieczkowski , Helmut Hagleitner
IPC分类号： H01L29/15 , H01L29/778 , H01L29/423 , H01L29/66 , H01L29/06 , H01L29/20
CPC分类号： H01L29/7787 , H01L29/0649 , H01L29/2003 , H01L29/42316 , H01L29/66462
摘要： Wide bandgap semiconductor devices are fabricated by providing a wide bandgap semiconductor layer, providing a plurality of recesses in the wide bandgap semiconductor layer, and providing a metal gate contact in the plurality of recesses. A protective layer may be provided on the wide bandgap semiconductor layer, the protective layer having a first opening extending therethrough, a dielectric layer may be provided on the protective layer, the dielectric layer having a second opening extending therethrough that is narrower than the first opening, and a gate contact may be provided in the first and second openings. The metal gate contact may be provided to include a barrier metal layer in the plurality of recesses, and a current spreading layer on the barrier metal layer remote from the wide bandgap semiconductor layer. Related devices and fabrication methods are also discussed.
摘要翻译：宽带隙半导体器件通过提供宽带隙半导体层制造，在宽带隙半导体层中提供多个凹槽，并在多个凹槽中提供金属栅极接触。可以在宽带隙半导体层上设置保护层，保护层具有延伸穿过其的第一开口，电介质层可以设置在保护层上，电介质层具有延伸穿过的第二开口，该第二开口窄于第一开口并且可以在第一和第二开口中设置栅极接触。可以提供金属栅极接触以在多个凹部中包括阻挡金属层，以及在远离宽带隙半导体层的阻挡金属层上的电流扩散层。还讨论了相关设备和制造方法。

9. 发明授权

US08896122B2 Semiconductor devices having gates including oxidized nickel 有权
标题翻译：具有包括氧化镍的栅极的半导体器件
公开(公告)号：US08896122B2
公开(公告)日：2014-11-25
申请号：US12778334
申请日：2010-05-12
申请人： Van Mieczkowski , Helmut Hagleitner , Kevin Haberern
发明人： Van Mieczkowski , Helmut Hagleitner , Kevin Haberern
IPC分类号： H01L21/335 , H01L29/778 , H01L29/24 , H01L29/80 , H01L29/66 , H01L29/47 , H01L29/812 , H01L29/872 , H01L29/16 , H01L29/20
CPC分类号： H01L29/66068 , H01L29/1608 , H01L29/2003 , H01L29/47 , H01L29/475 , H01L29/66871 , H01L29/7786 , H01L29/812 , H01L29/872
摘要： Schottky barrier semiconductor devices are provided including a wide bandgap semiconductor layer and a gate on the wide bandgap semiconductor layer. The gate includes a metal layer on the wide bandgap semiconductor layer including a nickel oxide (NiO) layer. Related methods of fabricating devices are also provided herein.
摘要翻译：提供肖特基势垒半导体器件，其包括宽带隙半导体层和宽带隙半导体层上的栅极。栅极包括在包括氧化镍（NiO）层的宽带隙半导体层上的金属层。本文还提供了相关制造装置的方法。

10. 发明申请

US20130228796A1 HIGH VOLTAGE SEMICONDUCTOR DEVICES INCLUDING ELECTRIC ARC SUPPRESSION MATERIAL AND METHODS OF FORMING THE SAME 有权
标题翻译：包括电弧抑制材料的高电压半导体器件及其形成方法
公开(公告)号：US20130228796A1
公开(公告)日：2013-09-05
申请号：US13410788
申请日：2012-03-02
申请人： Van Mieczkowski
发明人： Van Mieczkowski
IPC分类号： H01L29/161 , H01L21/50 , H01L23/552
CPC分类号： H01L23/047 , H01L23/20 , H01L23/22 , H01L23/60 , H01L24/32 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/10253 , H01L2924/10272 , H01L2924/10329 , H01L2924/1033 , H01L2924/10338 , H01L2924/12032 , H01L2924/1305 , H01L2924/13051 , H01L2924/13063 , H01L2924/13064 , H01L2924/13091 , H01L2924/15153 , H01L2924/157 , H01L2924/15787 , H01L2924/1579 , H01L2924/16195 , H01L2224/45099 , H01L2924/00012 , H01L2924/00
摘要： A high voltage semiconductor device can include a high voltage semiconductor device package that includes a wall defining a recess within the high voltage semiconductor device package. A high voltage semiconductor chip can be in the recess and a high voltage electric arc suppression material can be in the recess.
摘要翻译：高电压半导体器件可以包括高压半导体器件封装，其包括限定高压半导体器件封装内的凹部的壁。高压半导体芯片可以在凹槽中，并且高压电弧抑制材料可以在凹部中。

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