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1. 发明授权

US08151012B2 Virtual row buffers for use with random access memory 有权
标题翻译：用于随机存取存储器的虚拟行缓冲区
公开(公告)号：US08151012B2
公开(公告)日：2012-04-03
申请号：US12567638
申请日：2009-09-25
申请人： Changkyu Kim , Albert Lin , Christopher J. Hughes , Anthony-Trung D. Nguyen , Yen-Kuang Chen , Zeshan A. Chishti , Bryan K. Casper
发明人： Changkyu Kim , Albert Lin , Christopher J. Hughes , Anthony-Trung D. Nguyen , Yen-Kuang Chen , Zeshan A. Chishti , Bryan K. Casper
IPC分类号： G06F3/00
CPC分类号： G11C11/4082 , G06F1/3275 , G11C11/4085 , Y02D10/13 , Y02D10/14
摘要： Methods, apparatuses and systems to decrease the energy consumption of a memory chip while increasing its effect bandwidth during the execution of any workload. Methods, apparatuses and systems may allow a memory chip utilize a plurality of virtual row buffers to respond to requests for data included in a memory array block. Methods, apparatuses and systems may further eliminate or reduce the cost associated with transferring unnecessary data from a memory array block to row buffers by altering the data transfer size between a memory array block and a row buffer.
摘要翻译：降低存储芯片能量消耗的方法，装置和系统，同时在执行任何工作负载的同时增加其效果带宽。方法，设备和系统可以允许存储器芯片利用多个虚拟行缓冲器来响应包含在存储器阵列块中的数据的请求。方法，装置和系统可以通过改变存储器阵列块和行缓冲器之间的数据传输大小来进一步消除或减少与将不需要的数据从存储器阵列块传送到行缓冲器相关联的成本。

2. 发明申请

US20110066806A1 System and method for memory bandwidth friendly sorting on multi-core architectures 有权
标题翻译：多核架构内存带宽友好排序的系统和方法
公开(公告)号：US20110066806A1
公开(公告)日：2011-03-17
申请号：US12454883
申请日：2009-05-26
申请人： Jatin Chhugani , Sanjeev Kumar , Anthony-Trung D. Nguyen , Yen-Kuang Chen , Victor W. Lee , William Macy
发明人： Jatin Chhugani , Sanjeev Kumar , Anthony-Trung D. Nguyen , Yen-Kuang Chen , Victor W. Lee , William Macy
IPC分类号： G06F12/08
CPC分类号： G06F7/36 , G06F12/0802
摘要： In some embodiments, the invention involves utilizing a tree merge sort in a platform to minimize cache reads/writes when sorting large amounts of data. An embodiment uses blocks of pre-sorted data residing in “leaf nodes” residing in memory storage. A pre-sorted block of data from each leaf node is read from memory and stored in faster cache memory. A tree merge sort is performed on the nodes that are cache resident until a block of data migrates to a root node. Sorted blocks reaching the root node are written to memory storage in an output list until all pre-sorted data blocks have been moved to cache and merged upward to the root. The completed output list in memory storage is a list of the fully sorted data. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，本发明涉及在平台中利用树合并排序以在排序大量数据时最小化高速缓存读/写。实施例使用驻留在存储器存储器中的“叶节点”中驻留的预排序数据块。来自每个叶节点的预先排序的数据块从存储器读取并存储在更快的高速缓冲存储器中。在缓存驻留的节点上执行树合并排序，直到数据块迁移到根节点。到达根节点的排序块被写入到输出列表中的存储器存储器中，直到所有预排序的数据块已被移动到高速缓存并向上合并到根。内存存储器中完成的输出列表是完整排序数据的列表。描述和要求保护其他实施例。

3. 发明申请

US20140337580A1 GATHER AND SCATTER OPERATIONS IN MULTI-LEVEL MEMORY HIERARCHY 审中-公开
标题翻译：多级记忆层级中的数学和散射运算
公开(公告)号：US20140337580A1
公开(公告)日：2014-11-13
申请号：US14337174
申请日：2014-07-21
申请人： CHRISTOPHER J. HUGHES , YEN-KUANG CHEN , CHANGKYU KIM , DAEHYUN KIM , VICTOR W. LEE , ANTHONY-TRUNG D. NGUYEN , NADATHUR RAJAGOPALAN SATISH
发明人： CHRISTOPHER J. HUGHES , YEN-KUANG CHEN , CHANGKYU KIM , DAEHYUN KIM , VICTOR W. LEE , ANTHONY-TRUNG D. NGUYEN , NADATHUR RAJAGOPALAN SATISH
IPC分类号： G06F12/08
CPC分类号： G06F12/0811 , G06F9/30043 , G06F12/0802 , G06F12/0897 , G06F2212/62 , Y02D10/13
摘要： Methods and apparatus relating to gather or scatter operations in a multi-level cache are described. In some embodiments, a logic may determine whether to perform gather or scatter operations at a first memory or a second memory, based in part on a relative performance of performing the gather or scatter operations at the first memory and the second memory. Other embodiments are also described and claimed.
摘要翻译：描述与多级缓存中的收集或散布操作有关的方法和装置。在一些实施例中，逻辑可以部分地基于在第一存储器和第二存储器执行收集或散布操作的相对性能来确定是否在第一存储器或第二存储器执行收集或散布操作。还描述和要求保护其他实施例。

4. 发明申请

US20110078340A1 VIRTUAL ROW BUFFERS FOR USE WITH RANDOM ACCESS MEMORY 有权
标题翻译：使用随机存取存储器的虚拟缓存
公开(公告)号：US20110078340A1
公开(公告)日：2011-03-31
申请号：US12567638
申请日：2009-09-25
申请人： CHANGKYU KIM , Albert Lin , Christopher J. Hughes , Anthony-Trung D. Nguyen , Yen-Kuang Chen , Zeshan A. Chishti , Bryan K. Casper
发明人： CHANGKYU KIM , Albert Lin , Christopher J. Hughes , Anthony-Trung D. Nguyen , Yen-Kuang Chen , Zeshan A. Chishti , Bryan K. Casper
IPC分类号： G06F12/00 , G06F3/00 , G06F13/00
CPC分类号： G11C11/4082 , G06F1/3275 , G11C11/4085 , Y02D10/13 , Y02D10/14
摘要： Methods, apparatuses and systems to decrease the energy consumption of a memory chip while increasing its effect bandwidth during the execution of any workload. Methods, apparatuses and systems may allow a memory chip utilize a plurality of virtual row buffers to respond to requests for data included in a memory array block. Methods, apparatuses and systems may further eliminate or reduce the cost associated with transferring unnecessary data from a memory array block to row buffers by altering the data transfer size between a memory array block and a row buffer.
摘要翻译：降低存储芯片能量消耗的方法，装置和系统，同时在执行任何工作负载的同时增加其效果带宽。方法，设备和系统可以允许存储器芯片利用多个虚拟行缓冲器来响应包含在存储器阵列块中的数据的请求。方法，装置和系统可以通过改变存储器阵列块和行缓冲器之间的数据传输大小来进一步消除或减少与将不需要的数据从存储器阵列块传送到行缓冲器相关联的成本。

5. 发明授权

US08463820B2 System and method for memory bandwidth friendly sorting on multi-core architectures 有权
标题翻译：多核架构内存带宽友好排序的系统和方法
公开(公告)号：US08463820B2
公开(公告)日：2013-06-11
申请号：US12454883
申请日：2009-05-26
申请人： Jatin Chhugani , Sanjeev Kumar , Anthony-Trung D. Nguyen , Yen-Kuang Chen , Victor W. Lee , William Macy
发明人： Jatin Chhugani , Sanjeev Kumar , Anthony-Trung D. Nguyen , Yen-Kuang Chen , Victor W. Lee , William Macy
IPC分类号： G06F7/00 , G06F17/30 , G06F13/00 , G06F13/28 , G06F12/00
CPC分类号： G06F7/36 , G06F12/0802
摘要： In some embodiments, the invention involves utilizing a tree merge sort in a platform to minimize cache reads/writes when sorting large amounts of data. An embodiment uses blocks of pre-sorted data residing in “leaf nodes” residing in memory storage. A pre-sorted block of data from each leaf node is read from memory and stored in faster cache memory. A tree merge sort is performed on the nodes that are cache resident until a block of data migrates to a root node. Sorted blocks reaching the root node are written to memory storage in an output list until all pre-sorted data blocks have been moved to cache and merged upward to the root. The completed output list in memory storage is a list of the fully sorted data. Other embodiments are described and claimed.
摘要翻译：在一些实施例中，本发明涉及在平台中利用树合并排序以在排序大量数据时最小化高速缓存读/写。实施例使用驻留在存储器存储器中的“叶节点”中驻留的预排序数据块。来自每个叶节点的预先排序的数据块从存储器读取并存储在更快的高速缓冲存储器中。在缓存驻留的节点上执行树合并排序，直到数据块迁移到根节点。到达根节点的排序块被写入到输出列表中的存储器存储器中，直到所有预排序的数据块已被移动到高速缓存并向上合并到根。内存存储器中完成的输出列表是完整排序数据的列表。描述和要求保护其他实施例。

6. 发明授权

US5995956A Questionless cased-based knowledge and a method for constructing the same 失效
标题翻译：基于无套管的知识及其构建方法
公开(公告)号：US5995956A
公开(公告)日：1999-11-30
申请号：US921218
申请日：1997-08-27
申请人： Trung D. Nguyen
发明人： Trung D. Nguyen
IPC分类号： G06N5/02 , G06F15/18
CPC分类号： G06N5/022
摘要： A questionless case-based knowledge base suitable for access by an intelligent search engine and an associated method for constructing the same from pre-existing on-line documentation. A case structure for questionless cases is determined. The determined case structure includes a first field for containing a title for a case, a second field for containing a description of the case and a third field for containing a solution for the case. On-line documentation having information directed to a plurality of topics, each of which includes a title portion and a contents portion, is then provided. The information directed to each of the plurality of topics is then reconfigured into the determined case structure such that the title portion of each topic is configured as a first field of a corresponding case and the contents portion of each topic is configured as a second field of the corresponding case. A solution comprised of a path from the third field of the case to the second field of the case is then appended to each of the cases. The information reconfigured into questionless case structures are then combined to form a questionless case-based knowledge base.
摘要翻译：一个适用于智能搜索引擎访问的无问题的基于案例的知识库以及从现有在线文档构建相关方法。确定无问题案件的案件结构。所确定的案例结构包括用于包含案件的标题的第一字段，用于包含案件的描述的第二字段和用于容纳该案件的解决方案的第三字段。然后提供具有针对多个主题的信息的在线文档，每个主题包括标题部分和内容部分。然后将针对多个主题中的每一个的信息重新配置为所确定的案例结构，使得每个主题的标题部分被配置为对应案例的第一字段，并且每个主题的内容部分被配置为相应的情况。然后将包括从壳体的第三场的路径到壳体的第二场的解决方案附加到每个情况。然后将重新配置为无问题的案例结构的信息组合成一个无疑的基于案例的知识库。

7. 发明授权

US08478941B2 Gather and scatter operations in multi-level memory hierarchy 有权
公开(公告)号：US08478941B2
公开(公告)日：2013-07-02
申请号：US13557164
申请日：2012-07-24
申请人： Christopher J. Hughes , Yen-Kuang Chen , Changkyu Kim , Daehyun Kim , Victor W. Lee , Anthony-Trung D. Nguyen , Nadathur Rajagopalan Satish
发明人： Christopher J. Hughes , Yen-Kuang Chen , Changkyu Kim , Daehyun Kim , Victor W. Lee , Anthony-Trung D. Nguyen , Nadathur Rajagopalan Satish
IPC分类号： G06F12/00
CPC分类号： G06F12/0811 , G06F9/30043 , G06F12/0802 , G06F12/0897 , G06F2212/62 , Y02D10/13
摘要： Methods and apparatus relating to gather or scatter operations in a multi-level cache are described. In some embodiments, a logic may determine whether to perform gather or scatter operations at a first memory or a second memory, based in part on a relative performance of performing the gather or scatter operations at the first memory and the second memory. Other embodiments are also described and claimed.

8. 发明申请

US20120290799A1 GATHER AND SCATTER OPERATIONS IN MULTI-LEVEL MEMORY HIERARCHY 有权
标题翻译：多级记忆层级中的数学和散射运算
公开(公告)号：US20120290799A1
公开(公告)日：2012-11-15
申请号：US13557164
申请日：2012-07-24
申请人： Christopher J. Hughes , Yen-Kuang Chen , Changkyu Kim , Daehyun Kim , Victor W. Lee , Anthony-Trung D. Nguyen , Nadathur Rajagopalan Satish
发明人： Christopher J. Hughes , Yen-Kuang Chen , Changkyu Kim , Daehyun Kim , Victor W. Lee , Anthony-Trung D. Nguyen , Nadathur Rajagopalan Satish
IPC分类号： G06F12/00
CPC分类号： G06F12/0811 , G06F9/30043 , G06F12/0802 , G06F12/0897 , G06F2212/62 , Y02D10/13
摘要： Methods and apparatus relating to gather or scatter operations in a multi-level cache are described. In some embodiments, a logic may determine whether to perform gather or scatter operations at a first memory or a second memory, based in part on a relative performance of performing the gather or scatter operations at the first memory and the second memory. Other embodiments are also described and claimed.
摘要翻译：描述与多级缓存中的收集或散布操作有关的方法和装置。在一些实施例中，逻辑可以部分地基于在第一存储器和第二存储器执行收集或散布操作的相对性能来确定是否在第一存储器或第二存储器执行收集或散布操作。还描述和要求保护其他实施例。

9. 发明申请

US20110161060A1 Optimization-Based exact formulation and solution of crowd simulation in virtual worlds 审中-公开
标题翻译：基于优化的虚拟世界中人群模拟的精确配方和解决方案
公开(公告)号：US20110161060A1
公开(公告)日：2011-06-30
申请号：US12655362
申请日：2009-12-29
申请人： Changkyu Kim , Stephen J. Guy , Anthony-Trung D. Nguyen , Daehyun Kim , Jatin Chhugani
发明人： Changkyu Kim , Stephen J. Guy , Anthony-Trung D. Nguyen , Daehyun Kim , Jatin Chhugani
IPC分类号： G06F17/11 , G06G7/60
CPC分类号： G06T13/40 , G06T19/00 , G06T2210/21
摘要： A method of computing a collision-free velocity (117, 217) for an agent (110) in a crowd simulation environment (100) comprises identifying a quadratic optimization problem that corresponds to the collision-free velocity, and finding an exact solution for the quadratic optimization problem by using a geometric approach.
摘要翻译：在人群模拟环境（100）中计算用于代理（110）的无碰撞速度（117,217）的方法包括识别对应于无碰撞速度的二次优化问题，并且为通过使用几何方法的二次优化问题。

10. 发明申请

US20110138122A1 GATHER AND SCATTER OPERATIONS IN MULTI-LEVEL MEMORY HIERARCHY 有权
标题翻译：多级记忆层级中的数学和散射运算
公开(公告)号：US20110138122A1
公开(公告)日：2011-06-09
申请号：US12630826
申请日：2009-12-03
申请人： Christopher J. Hughes , Yen-Kuang Chen , Changkyu Kim , Daehyun Kim , Victor W. Lee , Anthony-Trung D. Nguyen , Nadathur Rajagopalan Satish
发明人： Christopher J. Hughes , Yen-Kuang Chen , Changkyu Kim , Daehyun Kim , Victor W. Lee , Anthony-Trung D. Nguyen , Nadathur Rajagopalan Satish
IPC分类号： G06F12/08
CPC分类号： G06F12/0811 , G06F9/30043 , G06F12/0802 , G06F12/0897 , G06F2212/62 , Y02D10/13
摘要： Methods and apparatus relating to gather or scatter operations in a multi-level cache are described. In some embodiments, a logic may determine whether to perform gather or scatter operations at a first memory or a second memory, based in part on a relative performance of performing the gather or scatter operations at the first memory and the second memory. Other embodiments are also described and claimed.
摘要翻译：描述与多级缓存中的收集或散布操作有关的方法和装置。在一些实施例中，逻辑可以部分地基于在第一存储器和第二存储器执行收集或散布操作的相对性能来确定是否在第一存储器或第二存储器执行收集或散布操作。还描述和要求保护其他实施例。

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