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1. 发明授权

US07723138B2 Method of fabricating a semiconductor optical device 有权
标题翻译：制造半导体光学器件的方法
公开(公告)号：US07723138B2
公开(公告)日：2010-05-25
申请号：US11902781
申请日：2007-09-25
申请人： Tomokazu Katsuyama
发明人： Tomokazu Katsuyama
IPC分类号： H01L21/00
CPC分类号： H01S5/0265 , B82Y20/00 , G02F1/015 , G02F1/01708 , H01S5/12 , H01S5/2224 , H01S5/2275 , H01S5/34306
摘要： A method of fabricating a semiconductor optical device is disclosed. This semiconductor optical device includes first and second optical semiconductor elements. This method comprises the steps of: growing, in a metal-organic vapor phase deposition reactor, plural semiconductor layers for the first semiconductor optical element on a primary surface of a substrate which has first and second areas for the first semiconductor optical element and the second optical semiconductor element, respectively; forming an insulating mask on the plural semiconductor layers and the first area; etching the plural semiconductor layers by use of the insulating mask to form a semiconductor portion having an end face; growing a layer of a first semiconductor on the second area and deposit of the first semiconductor on the end face in the reactor by use of the insulating mask; supplying etchant for etching the first semiconductor to remove at least a part of the deposit of the first semiconductor on the end face by use of the insulating mask; and after removing the deposit of the first semiconductor, growing a layer of a second semiconductor for the second optical element on the second area in the reactor by use of the insulating mask.
摘要翻译：公开了制造半导体光学器件的方法。该半导体光学器件包括第一和第二光学半导体元件。该方法包括以下步骤：在金属 - 有机气相沉积反应器中生长用于第一半导体光学元件的第一半导体光学元件的第一和第二区域的第一半导体光学元件的主表面上的多个半导体层，光半导体元件; 在所述多个半导体层和所述第一区域上形成绝缘掩模; 通过使用绝缘掩模蚀刻多个半导体层以形成具有端面的半导体部分; 在第二区域上生长第一半导体层，并且通过使用绝缘掩模将第一半导体沉积在反应器的端面上; 提供用于蚀刻第一半导体的蚀刻剂，以通过使用绝缘掩模去除端面上的第一半导体的沉积物的至少一部分; 并且在去除第一半导体的沉积物之后，通过使用绝缘掩模在反应器的第二区域上生长用于第二光学元件的第二半导体层。

2. 发明申请

US20100190283A1 METHOD TO FORM SEMICONDUCTOR LASER DIODE WITH MESA STRUCTURE BURIED BY CURRENT BLOCKING LAYER 有权
标题翻译：形成半导体激光二极管的方法与MESA结构由电流阻挡层
公开(公告)号：US20100190283A1
公开(公告)日：2010-07-29
申请号：US12692177
申请日：2010-01-22
申请人： Tomokazu KATSUYAMA
发明人： Tomokazu KATSUYAMA
IPC分类号： H01L21/20
CPC分类号： H01S5/227 , B82Y20/00 , H01L21/02543 , H01L21/02609 , H01S5/12 , H01S5/2086 , H01S5/2201 , H01S5/2206 , H01S5/2223 , H01S5/2275 , H01S5/305 , H01S5/3054 , H01S5/3211 , H01S5/34306 , H01S2304/04
摘要： A method to form a an LD with the buried mesa type is disclosed, in which the n-type current blocking layer is stably kept with a distance to the active layer in the buried mesa. The method of the invention includes a step to form the mesa by iterating the RIE and the ashing to obtain in a mesa side a steep edge with the (110) surface. A wet-etching process subsequent to the iterative etching and ashing removes residuals left on the mesa side. Then, the growth of the current blocking layer shows two modes of the horizontal growth of the (110) surface and the vertical growth of the (001) surface comparably.
摘要翻译：公开了一种形成具有埋地台面型的LD的方法，其中n型电流阻挡层在埋入台面中稳定地保持与活性层的距离。本发明的方法包括通过迭代RIE和灰化以在台面中获得具有（110）表面的陡峭边缘来形成台面的步骤。在迭代蚀刻和灰化之后的湿蚀刻工艺去除留在台面侧的残留物。然后，电流阻挡层的生长显示（110）表面的水平生长和（001）表面的垂直生长的两种模式相当。

3. 发明授权

US08021985B2 Method to form semiconductor laser diode 有权
标题翻译：形成半导体激光二极管的方法
公开(公告)号：US08021985B2
公开(公告)日：2011-09-20
申请号：US12971689
申请日：2010-12-17
申请人： Tomokazu Katsuyama
发明人： Tomokazu Katsuyama
IPC分类号： H01L21/302
CPC分类号： H01S5/2275 , B82Y20/00 , H01L21/02392 , H01L21/02543 , H01L21/02546 , H01L21/02576 , H01L21/02579 , H01L21/02581 , H01L21/0262 , H01S5/2222 , H01S5/2224 , H01S5/3213 , H01S5/3406 , H01S5/34306
摘要： The process of the present invention to form a mask made of inorganic material containing silicon reduces the plasma damage induced in the semiconductor layers due to the plasma-ashing. The semiconductor material is heat-treated at a high temperature after the growth thereof to form an oxide layer positively in the surface of the semiconductor material before it is covered by the silicon inorganic film. This inorganic film is dry-etched by an etchant containing fluorine to get a mask for forming a mesa and for growing burying layer selectively.
摘要翻译：本发明形成由含硅的无机材料制成的掩模的方法减少了由于等离子体灰化而在半导体层中引起的等离子体损伤。半导体材料在其生长之后在高温下进行热处理，以在其被硅无机膜覆盖之前在半导体材料的表面中积极地形成氧化物层。通过含氟的蚀刻剂对该无机膜进行干法蚀刻，得到用于形成台面的掩模和选择性地生长掩埋层。

4. 发明授权

US07998770B2 Method for forming a semiconductor light-emitting device 有权
标题翻译：半导体发光元件的形成方法
公开(公告)号：US07998770B2
公开(公告)日：2011-08-16
申请号：US12153372
申请日：2008-05-16
申请人： Atsushi Matsumura , Tomokazu Katsuyama
发明人： Atsushi Matsumura , Tomokazu Katsuyama
IPC分类号： H01L21/00
CPC分类号： H01S5/227 , B82Y20/00 , H01S5/2224 , H01S5/2226 , H01S5/2275 , H01S5/3434
摘要： A semiconductor light-emitting device with a new layer structure is disclosed, where the current leaking path is not caused to enhance the current injection efficiency within the active layer. The device provides a mesa structure containing active layer and a p-type lower cladding layer on a p-type substrate and a burying layer doped with iron (Fe) to bury the mesa structure, where the burying layer shows a semi-insulating characteristic. The device also provides an n-type blocking layer arranged so as to cover at least a portion of the p-type buffer lower within the mesa structure. The n-type blocking layer prevents the current leaking from the burying layer to the p-type buffer layer, and the semi-insulating burying layer that covers the rest portion of the mesa structure not covered by the n-type blocking layer prevents the current leaking from the n-type blocking layer to the n-type cladding layer within the mesa structure.
摘要翻译：公开了一种具有新层结构的半导体发光器件，其中不引起电流泄漏路径增强有源层内的电流注入效率。该器件提供了在p型衬底上包含有源层和p型下包层的台面结构，以及掺杂有铁（Fe）的掩埋层以埋藏台面结构，其中掩埋层显示半绝缘特性。该装置还提供了一种n型阻挡层，其布置成覆盖在台面结构内部的p型缓冲器的至少一部分。 n型阻挡层防止电流从掩埋层泄漏到p型缓冲层，并且覆盖未被n型阻挡层覆盖的台面结构的其余部分的半绝缘掩埋层防止电流在台面结构内从n型阻挡层泄漏到n型包覆层。

5. 发明申请

US20090001408A1 Method for forming a semiconductor light-emitting device and a semiconductor light-emitting device 有权
标题翻译：用于形成半导体发光器件和半导体发光器件的方法
公开(公告)号：US20090001408A1
公开(公告)日：2009-01-01
申请号：US12153372
申请日：2008-05-16
申请人： Atsushi Matsumura , Tomokazu Katsuyama
发明人： Atsushi Matsumura , Tomokazu Katsuyama
IPC分类号： H01L33/00 , H01L21/00
CPC分类号： H01S5/227 , B82Y20/00 , H01S5/2224 , H01S5/2226 , H01S5/2275 , H01S5/3434
摘要： A semiconductor light-emitting device with a new layer structure is disclosed, where the current leaking path is not caused to enhance the current injection efficiency within the active layer. The device provides a mesa structure containing active layer and a p-type lower cladding layer on a p-type substrate and a burying layer doped with iron (Fe) to bury the mesa structure, where the burying layer shows a semi-insulating characteristic. The device also provides an n-type blocking layer arranged so as to cover at least a portion of the p-type buffer lower within the mesa structure. The n-type blocking layer prevents the current leaking from the burying layer to the p-type buffer layer, and the semi-insulating burying layer that covers the rest portion of the mesa structure not covered by the n-type blocking layer prevents the current leaking from the n-type blocking layer to the n-type cladding layer within the mesa structure.
摘要翻译：公开了一种具有新层结构的半导体发光器件，其中不引起电流泄漏路径增强有源层内的电流注入效率。该器件提供了在p型衬底上包含有源层和p型下包层的台面结构，以及掺杂有铁（Fe）的掩埋层以埋藏台面结构，其中掩埋层显示半绝缘特性。该装置还提供了一种n型阻挡层，其布置成覆盖在台面结构内部的p型缓冲器的至少一部分。 n型阻挡层防止电流从掩埋层泄漏到p型缓冲层，并且覆盖未被n型阻挡层覆盖的台面结构的其余部分的半绝缘掩埋层防止电流在台面结构内从n型阻挡层泄漏到n型包覆层。

6. 发明授权

US07196909B2 AC coupling circuit having a large capacitance and a good frequency response 有权
标题翻译： AC耦合电路具有大电容和良好的频率响应
公开(公告)号：US07196909B2
公开(公告)日：2007-03-27
申请号：US10771166
申请日：2004-02-04
申请人： Tomokazu Katsuyama
发明人： Tomokazu Katsuyama
IPC分类号： H05K7/02 , H05K7/06 , H05K7/08 , H05K7/10
CPC分类号： H01P1/047 , H01L23/66 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2223/6627 , H01L2223/665 , H01L2224/45144 , H01L2224/48091 , H01L2224/49171 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15787 , H01L2924/1903 , H01L2924/19041 , H01L2924/19042 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01P1/2007 , H05K1/0219 , H05K1/0231 , H05K2201/1053 , H05K2201/10636 , H05K2201/10643 , H05K2203/049 , Y02P70/611 , H01L2924/00014 , H01L2924/00
摘要： This invention is directed to reduce degradation, loss, and reflection of high frequency signals of a coupling circuit for an alternating current. The coupling circuit, for connecting a first circuit element to a second circuit element, comprises a die capacitor and a chip capacitor connected in parallel to each other. The die capacitor has a first electrode that faces to and is in contact with the first circuit element, and a second electrode that is wire-bonded to the second circuit element. The chip capacitor also has a first electrode that is in contact with the first circuit element and a second electrode that is in contact with the second electrode of the die capacitor. The coupling circuit may show both advantages of superior performance at high frequencies attributed to the die-capacitor and relative large capacitance attributed to the chip-capacitor.
摘要翻译：本发明旨在减少交流电耦合电路的高频信号的劣化，损耗和反射。用于将第一电路元件连接到第二电路元件的耦合电路包括彼此并联连接的管芯电容器和片式电容器。管芯电容器具有面向第一电极并与第一电路元件接触的第一电极，以及与第二电路元件引线接合的第二电极。芯片电容器还具有与第一电路元件接触的第一电极和与模具电容器的第二电极接触的第二电极。耦合电路可以显示归因于芯片电容器的高频下的优异性能和归因于芯片电容器的相对大的电容的两个优点。

7. 发明申请

US20110159620A1 METHOD TO FORM SEMICONDUCTOR LASER DIODE 有权
标题翻译：形成半导体激光二极管的方法
公开(公告)号：US20110159620A1
公开(公告)日：2011-06-30
申请号：US12971689
申请日：2010-12-17
申请人： Tomokazu KATSUYAMA
发明人： Tomokazu KATSUYAMA
IPC分类号： H01L33/22 , H01L21/20 , H01L33/30
CPC分类号： H01S5/2275 , B82Y20/00 , H01L21/02392 , H01L21/02543 , H01L21/02546 , H01L21/02576 , H01L21/02579 , H01L21/02581 , H01L21/0262 , H01S5/2222 , H01S5/2224 , H01S5/3213 , H01S5/3406 , H01S5/34306
摘要： The process of the present invention to form a mask made of inorganic material containing silicon reduces the plasma damage induced in the semiconductor layers due to the plasma-ashing. The semiconductor material is heat-treated at a high temperature after the growth thereof to form an oxide layer positively in the surface of the semiconductor material before it is covered by the silicon inorganic film. This inorganic film is dry-etched by an etchant containing fluorine to get a mask for forming a mesa and for growing burying layer selectively.
摘要翻译：本发明形成由含硅的无机材料制成的掩模的方法减少了由于等离子体灰化而在半导体层中引起的等离子体损伤。半导体材料在其生长之后在高温下进行热处理，以在其被硅无机膜覆盖之前在半导体材料的表面中积极地形成氧化物层。通过含氟的蚀刻剂对该无机膜进行干法蚀刻，得到用于形成台面的掩模和选择性地生长掩埋层。

8. 发明授权

US07816157B2 Method of producing semiconductor optical device 有权
标题翻译：制造半导体光学器件的方法
公开(公告)号：US07816157B2
公开(公告)日：2010-10-19
申请号：US12364718
申请日：2009-02-03
申请人： Tomokazu Katsuyama
发明人： Tomokazu Katsuyama
IPC分类号： H01L21/20
CPC分类号： H01S5/0425 , B82Y20/00 , H01S5/0265 , H01S5/12 , H01S5/2275 , H01S5/3054 , H01S5/34306 , H01S2304/04
摘要： The invention discloses a method of producing on a substrate a semiconductor optical device having a laser diode and an EA optical modulator. An etched side face of a first semiconductor portion is formed. Then, for example, a first optical confinement layer and an active layer both for the EA optical modulator are grown by the metal organic vapor phase epitaxy method. The first optical confinement layer is grown by supplying hydrogen chloride in addition to a material gas. When the first optical confinement layer is grown, the formation of a thick semiconductor layer along the etched side face, which is an abnormally grown semiconductor layer, is decreased. Subsequently, the active layer for the EA optical modulator is grown. This method can suppress the active layer for the EA optical modulator from bending caused by the abnormally grown semiconductor layer.
摘要翻译：本发明公开了一种在衬底上制造具有激光二极管和EA光调制器的半导体光学器件的方法。形成第一半导体部分的蚀刻侧面。然后，例如，通过金属有机气相外延法生长用于EA光调制器的第一光限制层和有源层。除了原料气体之外，通过供给氯化氢来生长第一光学限制层。当第一光限制层生长时，沿着作为异常生长的半导体层的蚀刻侧面形成厚半导体层减小。随后，生长用于EA光调制器的有源层。该方法可以抑制EA光调制器的有源层由异常生长的半导体层引起的弯曲。

9. 发明授权

US07678594B2 Integrated optical device and fabrication method thereof 失效
标题翻译：集成光学元件及其制造方法
公开(公告)号：US07678594B2
公开(公告)日：2010-03-16
申请号：US11806067
申请日：2007-05-29
申请人： Tomokazu Katsuyama
发明人： Tomokazu Katsuyama
IPC分类号： H01L21/00
CPC分类号： H01L22/26 , B82Y20/00 , H01L27/15 , H01S5/0265 , H01S5/12 , H01S5/34306
摘要： An integrated optical device comprising a first semiconductor optical element provided on a first region of the main face of a substrate and a second semiconductor optical element provided on a second region and optically coupled to the first semiconductor optical element is fabricated. A first III-V compound semiconductor layer containing Al element is formed on the main face. A second III-V compound semiconductor layer for forming the first semiconductor optical element is then formed on the first III-V compound semiconductor layer. An etching mask M is formed on the first region. The end point of the dry etching is detected by using the etching mask M to dry-etch the second III-V compound semiconductor layer while detecting Al element. The first semiconductor optical element is thus formed. The second semiconductor optical element is formed on the second region.
摘要翻译：一种集成光学器件，其包括设置在基板的主面的第一区域上的第一半导体光学元件和设置在第二区域上并光学耦合到第一半导体光学元件的第二半导体光学元件。在主面上形成含有Al元素的第一III-V族化合物半导体层。然后在第一III-V族化合物半导体层上形成用于形成第一半导体光学元件的第二III-V族化合物半导体层。在第一区域上形成蚀刻掩模M. 通过使用蚀刻掩模M来检测干蚀刻的终点，以在检测Al元素的同时对第二III-V化合物半导体层进行干法蚀刻。由此形成第一半导体光学元件。第二半导体光学元件形成在第二区域上。

10. 发明授权

US07627009B2 Light-emitting device on n-type InP substrate heavily doped with sulfur 有权
标题翻译：在n型InP衬底上重掺杂硫的发光器件
公开(公告)号：US07627009B2
公开(公告)日：2009-12-01
申请号：US11907135
申请日：2007-10-09
申请人： Tomokazu Katsuyama , Michio Murata
发明人： Tomokazu Katsuyama , Michio Murata
IPC分类号： H01S5/20 , H01S5/00 , H01L33/00
CPC分类号： H01S5/305 , H01L33/30 , H01S5/06226 , H01S5/2223 , H01S5/227 , H01S5/2275 , H01S5/3054 , H01S5/3211
摘要： The present invention provides a structure of a light-emitting device which prevents the inter diffusion of impurities from the high-doped n-type InP substrate to a p-type current blocking layer. The substrate of the invention is highly doped with sulfur (S) to obtain high quality surface whose etch pit density (EPD) is less than 100 cm−2. The device includes such substrate, an optical guiding portion with an active layer, and a current blocking portion provided so as to bury the guiding portion. This current blocking portion includes, from the side of the substrate, a p-type layer, an n-type layer and another p-type layer. The device of the invention provides an n-type layer that is moderately doped with silicon between the n-type substrate and the p-type current blocking layer to prevent the inter diffusion of impurities from the substrate to the p-type layer.
摘要翻译：本发明提供了防止杂质从高掺杂n型InP衬底到p型电流阻挡层的相互扩散的发光器件的结构。本发明的衬底高度掺杂有硫（S）以获得蚀刻坑密度（EPD）小于100cm-2的高质量表面。该装置包括这种基板，具有有源层的光引导部分和设置成埋入引导部分的电流阻挡部分。该电流阻挡部分包括从衬底侧的p型层，n型层和另一p型层。本发明的器件提供了在n型衬底和p型电流阻挡层之间适度掺杂硅的n型层，以防止杂质从衬底到p型层的相互扩散。

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